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adrv9361z7035: Rename *box project to *packrf

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Adrian Costina 2019-10-23 13:19:08 +01:00
parent 64f5a99c63
commit de324526e3
7 changed files with 12 additions and 12 deletions
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6
projects/adrv9361z7035/README.md
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@ -8,7 +8,7 @@ This folder contains the ADRV9361Z7035 SOM projects for each of the carrier boar
|---------------|----------------------------------------------------| |---------------|----------------------------------------------------|
|ccbob\_cmos | ADRV9361Z7035\-SOM (CMOS Mode) \+ ADRV1CRR\-BOB | |ccbob\_cmos | ADRV9361Z7035\-SOM (CMOS Mode) \+ ADRV1CRR\-BOB |
|ccbob\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-BOB | |ccbob\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-BOB |
|ccbox\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-BOX | |ccpackrf\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-PACKRF |
|ccfmc\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-FMC | |ccfmc\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-FMC |
|ccpci\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-PCI | |ccpci\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-PCI |
|ccusb\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-USB | |ccusb\_lvds | ADRV9361Z7035\-SOM (LVDS Mode) \+ ADRV1CRR\-USB |
@ -19,7 +19,7 @@ This folder contains the ADRV9361Z7035 SOM projects for each of the carrier boar
|-----------------------------|----------------------------------------| |-----------------------------|----------------------------------------|
|common/adrv9361z7035\_bd.tcl | ADRV9361Z7035\-SOM board design file. | |common/adrv9361z7035\_bd.tcl | ADRV9361Z7035\-SOM board design file. |
|common/ccbob\_bd.tcl | carrier, break out board design file. | |common/ccbob\_bd.tcl | carrier, break out board design file. |
|common/ccbox\_bd.tcl | carrier, box board design file. | |common/ccpackrf\_bd.tcl | carrier, pack rf board design file. |
|common/ccfmc\_bd.tcl | carrier, fmc board design file. | |common/ccfmc\_bd.tcl | carrier, fmc board design file. |
|common/ccpci\_bd.tcl | carrier, pci-e board design file. | |common/ccpci\_bd.tcl | carrier, pci-e board design file. |
|common/ccusb\_bd.tcl | carrier, usb board design file. | |common/ccusb\_bd.tcl | carrier, usb board design file. |
@ -34,7 +34,7 @@ FMC & BOB carrier designs includes loopback daughtercards for connectivity testi
|common/adrv9361z7035\_constr\_cmos.xdc | ADRV9361Z7035\-SOM CMOS mode constraints file. | |common/adrv9361z7035\_constr\_cmos.xdc | ADRV9361Z7035\-SOM CMOS mode constraints file. |
|common/adrv9361z7035\_constr\_lvds.xdc | ADRV9361Z7035\-SOM LVDS mode constraints file. | |common/adrv9361z7035\_constr\_lvds.xdc | ADRV9361Z7035\-SOM LVDS mode constraints file. |
|common/ccbob\_constr.xdc | carrier, break out board constraints file. | |common/ccbob\_constr.xdc | carrier, break out board constraints file. |
|common/ccbox\_constr.xdc | carrier, box board constraints file. | |common/ccpackrf\_constr.xdc | carrier, packrf board constraints file. |
|common/ccfmc\_constr.xdc | carrier, fmc board constraints file. | |common/ccfmc\_constr.xdc | carrier, fmc board constraints file. |
|common/ccpci\_constr.xdc | carrier, pci-e board constraints file. | |common/ccpci\_constr.xdc | carrier, pci-e board constraints file. |
|common/ccusb\_constr.xdc | carrier, usb board constraints file. | |common/ccusb\_constr.xdc | carrier, usb board constraints file. |

6
projects/adrv9361z7035/ccbox_lvds/Makefile → projects/adrv9361z7035/ccpackrf_lvds/Makefile
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@ -3,10 +3,10 @@
## Auto-generated, do not modify! ## Auto-generated, do not modify!
#################################################################################### ####################################################################################
PROJECT_NAME := adrv9361z7035_ccbox_lvds PROJECT_NAME := adrv9361z7035_ccpackrf_lvds
M_DEPS += ../common/ccbox_constr.xdc M_DEPS += ../common/ccpackrf_constr.xdc
M_DEPS += ../common/ccbox_bd.tcl M_DEPS += ../common/ccpackrf_bd.tcl
M_DEPS += ../common/adrv9361z7035_constr_lvds.xdc M_DEPS += ../common/adrv9361z7035_constr_lvds.xdc
M_DEPS += ../common/adrv9361z7035_constr.xdc M_DEPS += ../common/adrv9361z7035_constr.xdc
M_DEPS += ../common/adrv9361z7035_bd.tcl M_DEPS += ../common/adrv9361z7035_bd.tcl

2
projects/adrv9361z7035/ccbox_lvds/system_bd.tcl → projects/adrv9361z7035/ccpackrf_lvds/system_bd.tcl
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@ -1,6 +1,6 @@
source ../common/adrv9361z7035_bd.tcl source ../common/adrv9361z7035_bd.tcl
source ../common/ccbox_bd.tcl source ../common/ccpackrf_bd.tcl
cfg_ad9361_interface LVDS cfg_ad9361_interface LVDS

8
projects/adrv9361z7035/ccbox_lvds/system_project.tcl → projects/adrv9361z7035/ccpackrf_lvds/system_project.tcl
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@ -4,15 +4,15 @@ source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl
set p_device "xc7z035ifbg676-2L" set p_device "xc7z035ifbg676-2L"
adi_project adrv9361z7035_ccbox_lvds adi_project adrv9361z7035_ccpackrf_lvds
adi_project_files adrv9361z7035_ccbox_lvds [list \ adi_project_files adrv9361z7035_ccpackrf_lvds [list \
"$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \ "$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \
"$ad_hdl_dir/library/common/ad_adl5904_rst.v" \ "$ad_hdl_dir/library/common/ad_adl5904_rst.v" \
"../common/adrv9361z7035_constr.xdc" \ "../common/adrv9361z7035_constr.xdc" \
"../common/adrv9361z7035_constr_lvds.xdc" \ "../common/adrv9361z7035_constr_lvds.xdc" \
"../common/ccbox_constr.xdc" \ "../common/ccpackrf_constr.xdc" \
"system_top.v" ] "system_top.v" ]
adi_project_run adrv9361z7035_ccbox_lvds adi_project_run adrv9361z7035_ccpackrf_lvds
source $ad_hdl_dir/library/axi_ad9361/axi_ad9361_delay.tcl source $ad_hdl_dir/library/axi_ad9361/axi_ad9361_delay.tcl

0
projects/adrv9361z7035/ccbox_lvds/system_top.v → projects/adrv9361z7035/ccpackrf_lvds/system_top.v
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0
projects/adrv9361z7035/common/ccbox_bd.tcl → projects/adrv9361z7035/common/ccpackrf_bd.tcl
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2
projects/adrv9361z7035/common/ccbox_constr.xdc → projects/adrv9361z7035/common/ccpackrf_constr.xdc
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@ -1,5 +1,5 @@
## constraints (ccbox.a) ## constraints
## rf-gpio ## rf-gpio
set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS18} [get_ports gpio_rf0] ; ## U1,G5,IO_L02_34_JX4_N,JX4,22,RF_GPIO0_BANK34 set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS18} [get_ports gpio_rf0] ; ## U1,G5,IO_L02_34_JX4_N,JX4,22,RF_GPIO0_BANK34