From ddc7c845e953ce23fac38d4fe3721100f50a32fe Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 9 Oct 2014 19:01:22 +0300 Subject: [PATCH] fmcomms2_udc: Initial check in FMCOMMS2 with an additional SPI port for the up/down converter board --- projects/fmcomms2_udc/common/udconv_bd.tcl | 29 ++ projects/fmcomms2_udc/zc702/system_bd.tcl | 5 + .../fmcomms2_udc/zc702/system_project.tcl | 15 + projects/fmcomms2_udc/zc702/system_top.v | 267 +++++++++++++++ projects/fmcomms2_udc/zc706/system_bd.tcl | 5 + projects/fmcomms2_udc/zc706/system_constr.xdc | 8 + .../fmcomms2_udc/zc706/system_project.tcl | 16 + projects/fmcomms2_udc/zc706/system_top.v | 265 +++++++++++++++ projects/fmcomms2_udc/zed/system_bd.tcl | 5 + projects/fmcomms2_udc/zed/system_constr.xdc | 8 + projects/fmcomms2_udc/zed/system_project.tcl | 16 + projects/fmcomms2_udc/zed/system_top.v | 314 ++++++++++++++++++ 12 files changed, 953 insertions(+) create mode 100644 projects/fmcomms2_udc/common/udconv_bd.tcl create mode 100644 projects/fmcomms2_udc/zc702/system_bd.tcl create mode 100644 projects/fmcomms2_udc/zc702/system_project.tcl create mode 100644 projects/fmcomms2_udc/zc702/system_top.v create mode 100644 projects/fmcomms2_udc/zc706/system_bd.tcl create mode 100644 projects/fmcomms2_udc/zc706/system_constr.xdc create mode 100644 projects/fmcomms2_udc/zc706/system_project.tcl create mode 100644 projects/fmcomms2_udc/zc706/system_top.v create mode 100644 projects/fmcomms2_udc/zed/system_bd.tcl create mode 100644 projects/fmcomms2_udc/zed/system_constr.xdc create mode 100644 projects/fmcomms2_udc/zed/system_project.tcl create mode 100644 projects/fmcomms2_udc/zed/system_top.v diff --git a/projects/fmcomms2_udc/common/udconv_bd.tcl b/projects/fmcomms2_udc/common/udconv_bd.tcl new file mode 100644 index 000000000..796cd5c1f --- /dev/null +++ b/projects/fmcomms2_udc/common/udconv_bd.tcl @@ -0,0 +1,29 @@ + +# spi interface + +set spi_udc_clk_i [create_bd_port -dir I spi_udc_clk_i] +set spi_udc_clk_o [create_bd_port -dir O spi_udc_clk_o] +set spi_udc_csn_i [create_bd_port -dir I spi_udc_csn_i] +set spi_udc_csn_tx_o [create_bd_port -dir O spi_udc_csn_tx_o] +set spi_udc_csn_rx_o [create_bd_port -dir O spi_udc_csn_rx_o] +set spi_udc_mosi_i [create_bd_port -dir I spi_udc_mosi_i] +set spi_udc_mosi_o [create_bd_port -dir O spi_udc_mosi_o] +set spi_udc_miso_i [create_bd_port -dir I spi_udc_miso_i] + +# additions to default configuration + +set_property -dict [list CONFIG.PCW_SPI1_PERIPHERAL_ENABLE {1}] $sys_ps7 +set_property -dict [list CONFIG.PCW_SPI1_SPI1_IO {EMIO}] $sys_ps7 + +# spi connections + +connect_bd_net -net spi_udc_csn_i [get_bd_ports spi_udc_csn_i] [get_bd_pins sys_ps7/SPI1_SS_I] +connect_bd_net -net spi_udc_csn_tx_o [get_bd_ports spi_udc_csn_tx_o] [get_bd_pins sys_ps7/SPI1_SS_O] +connect_bd_net -net spi_udc_csn_rx_o [get_bd_ports spi_udc_csn_rx_o] [get_bd_pins sys_ps7/SPI1_SS1_O] +connect_bd_net -net spi_udc_clk_i [get_bd_ports spi_udc_clk_i] [get_bd_pins sys_ps7/SPI1_SCLK_I] +connect_bd_net -net spi_udc_clk_o [get_bd_ports spi_udc_clk_o] [get_bd_pins sys_ps7/SPI1_SCLK_O] +connect_bd_net -net spi_udc_mosi_i [get_bd_ports spi_udc_mosi_i] [get_bd_pins sys_ps7/SPI1_MOSI_I] +connect_bd_net -net spi_udc_mosi_o [get_bd_ports spi_udc_mosi_o] [get_bd_pins sys_ps7/SPI1_MOSI_O] +connect_bd_net -net spi_udc_miso_i [get_bd_ports spi_udc_miso_i] [get_bd_pins sys_ps7/SPI1_MISO_I] + + diff --git a/projects/fmcomms2_udc/zc702/system_bd.tcl b/projects/fmcomms2_udc/zc702/system_bd.tcl new file mode 100644 index 000000000..8c54d7f9d --- /dev/null +++ b/projects/fmcomms2_udc/zc702/system_bd.tcl @@ -0,0 +1,5 @@ + +source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl +source $ad_hdl_dir/projects/fmcomms2/common/fmcomms2_bd.tcl +source ../common/udconv_bd.tcl + diff --git a/projects/fmcomms2_udc/zc702/system_project.tcl b/projects/fmcomms2_udc/zc702/system_project.tcl new file mode 100644 index 000000000..883785f8d --- /dev/null +++ b/projects/fmcomms2_udc/zc702/system_project.tcl @@ -0,0 +1,15 @@ + +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/projects/scripts/adi_project.tcl + +set project_name udconv_zc702 + +adi_project_create $project_name + +adi_project_files $project_name [list "$ad_hdl_dir/library/common/ad_iobuf.v" \ + "system_top.v" \ + "$ad_hdl_dir/projects/common/zc702/zc702_system_constr.xdc" \ + "$ad_hdl_dir/projects/fmcomms2/zc702/system_constr.xdc"] + +adi_project_run $project_name + diff --git a/projects/fmcomms2_udc/zc702/system_top.v b/projects/fmcomms2_udc/zc702/system_top.v new file mode 100644 index 000000000..3e9fdef15 --- /dev/null +++ b/projects/fmcomms2_udc/zc702/system_top.v @@ -0,0 +1,267 @@ + +// *************************************************************************** +// *************************************************************************** +// Copyright 2011(c) Analog Devices, Inc. +// +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// - Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in +// the documentation and/or other materials provided with the +// distribution. +// - Neither the name of Analog Devices, Inc. nor the names of its +// contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// - The use of this software may or may not infringe the patent rights +// of one or more patent holders. This license does not release you +// from the requirement that you obtain separate licenses from these +// patent holders to use this software. +// - Use of the software either in source or binary form, must be run +// on or directly connected to an Analog Devices Inc. component. +// +// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. +// +// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** + +`timescale 1ns/100ps + +module system_top ( + + DDR_addr, + DDR_ba, + DDR_cas_n, + DDR_ck_n, + DDR_ck_p, + DDR_cke, + DDR_cs_n, + DDR_dm, + DDR_dq, + DDR_dqs_n, + DDR_dqs_p, + DDR_odt, + DDR_ras_n, + DDR_reset_n, + DDR_we_n, + + FIXED_IO_ddr_vrn, + FIXED_IO_ddr_vrp, + FIXED_IO_mio, + FIXED_IO_ps_clk, + FIXED_IO_ps_porb, + FIXED_IO_ps_srstb, + + gpio_bd, + + hdmi_out_clk, + hdmi_vsync, + hdmi_hsync, + hdmi_data_e, + hdmi_data, + + spdif, + + iic_scl, + iic_sda, + + rx_clk_in_p, + rx_clk_in_n, + rx_frame_in_p, + rx_frame_in_n, + rx_data_in_p, + rx_data_in_n, + tx_clk_out_p, + tx_clk_out_n, + tx_frame_out_p, + tx_frame_out_n, + tx_data_out_p, + tx_data_out_n, + + gpio_txnrx, + gpio_enable, + gpio_resetb, + gpio_sync, + gpio_en_agc, + gpio_ctl, + gpio_status, + + spi_csn, + spi_clk, + spi_mosi, + spi_miso); + + inout [14:0] DDR_addr; + inout [ 2:0] DDR_ba; + inout DDR_cas_n; + inout DDR_ck_n; + inout DDR_ck_p; + inout DDR_cke; + inout DDR_cs_n; + inout [ 3:0] DDR_dm; + inout [31:0] DDR_dq; + inout [ 3:0] DDR_dqs_n; + inout [ 3:0] DDR_dqs_p; + inout DDR_odt; + inout DDR_ras_n; + inout DDR_reset_n; + inout DDR_we_n; + + inout FIXED_IO_ddr_vrn; + inout FIXED_IO_ddr_vrp; + inout [53:0] FIXED_IO_mio; + inout FIXED_IO_ps_clk; + inout FIXED_IO_ps_porb; + inout FIXED_IO_ps_srstb; + + inout [15:0] gpio_bd; + + output hdmi_out_clk; + output hdmi_vsync; + output hdmi_hsync; + output hdmi_data_e; + output [15:0] hdmi_data; + + output spdif; + + inout iic_scl; + inout iic_sda; + + input rx_clk_in_p; + input rx_clk_in_n; + input rx_frame_in_p; + input rx_frame_in_n; + input [ 5:0] rx_data_in_p; + input [ 5:0] rx_data_in_n; + output tx_clk_out_p; + output tx_clk_out_n; + output tx_frame_out_p; + output tx_frame_out_n; + output [ 5:0] tx_data_out_p; + output [ 5:0] tx_data_out_n; + + inout gpio_txnrx; + inout gpio_enable; + inout gpio_resetb; + inout gpio_sync; + inout gpio_en_agc; + inout [ 3:0] gpio_ctl; + inout [ 7:0] gpio_status; + + output spi_csn; + output spi_clk; + output spi_mosi; + input spi_miso; + + // internal signals + + wire [48:0] gpio_i; + wire [48:0] gpio_o; + wire [48:0] gpio_t; + + wire spi_udc_csn_tx; + wire spi_udc_csn_rx; + wire spi_udc_sclk; + wire spi_udc_data; + + // instantiations + + ad_iobuf #(.DATA_WIDTH(29)) i_iobuf ( + .dt ({gpio_t[48:32],gpio_t[15:8], gpio_t[3:0]}), + .di ({gpio_o[48:32],gpio_o[15:8], gpio_o[3:0]}), + .do ({gpio_i[48:32],gpio_i[15:8], gpio_i[3:0]}), + .dio({ gpio_txnrx, + gpio_enable, + gpio_resetb, + gpio_sync, + gpio_en_agc, + gpio_ctl, + gpio_status, + gpio_bd[15:8], + gpio_bd[3:0]})); + + // udc spi is just output and connected PMOD2_x_LS + ad_iobuf #(.DATA_WIDTH(4)) i_iobuf_spi ( + .dt ({4'd0}), + .di ({spi_udc_csn_tx, spi_udc_csn_rx, spi_udc_data, spi_udc_sclk}), + .do (), + .dio(gpio_bd[7:4])); + + system_wrapper i_system_wrapper ( + .DDR_addr (DDR_addr), + .DDR_ba (DDR_ba), + .DDR_cas_n (DDR_cas_n), + .DDR_ck_n (DDR_ck_n), + .DDR_ck_p (DDR_ck_p), + .DDR_cke (DDR_cke), + .DDR_cs_n (DDR_cs_n), + .DDR_dm (DDR_dm), + .DDR_dq (DDR_dq), + .DDR_dqs_n (DDR_dqs_n), + .DDR_dqs_p (DDR_dqs_p), + .DDR_odt (DDR_odt), + .DDR_ras_n (DDR_ras_n), + .DDR_reset_n (DDR_reset_n), + .DDR_we_n (DDR_we_n), + .FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn), + .FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp), + .FIXED_IO_mio (FIXED_IO_mio), + .FIXED_IO_ps_clk (FIXED_IO_ps_clk), + .FIXED_IO_ps_porb (FIXED_IO_ps_porb), + .FIXED_IO_ps_srstb (FIXED_IO_ps_srstb), + .GPIO_I (gpio_i), + .GPIO_O (gpio_o), + .GPIO_T (gpio_t), + .hdmi_data (hdmi_data), + .hdmi_data_e (hdmi_data_e), + .hdmi_hsync (hdmi_hsync), + .hdmi_out_clk (hdmi_out_clk), + .hdmi_vsync (hdmi_vsync), + .iic_main_scl_io (iic_scl), + .iic_main_sda_io (iic_sda), + .rx_clk_in_n (rx_clk_in_n), + .rx_clk_in_p (rx_clk_in_p), + .rx_data_in_n (rx_data_in_n), + .rx_data_in_p (rx_data_in_p), + .rx_frame_in_n (rx_frame_in_n), + .rx_frame_in_p (rx_frame_in_p), + .spdif (spdif), + .spi_csn_i (1'b1), + .spi_csn_o (spi_csn), + .spi_miso_i (spi_miso), + .spi_mosi_i (1'b0), + .spi_mosi_o (spi_mosi), + .spi_sclk_i (1'b0), + .spi_sclk_o (spi_clk), + .tx_clk_out_n (tx_clk_out_n), + .tx_clk_out_p (tx_clk_out_p), + .tx_data_out_n (tx_data_out_n), + .tx_data_out_p (tx_data_out_p), + .tx_frame_out_n (tx_frame_out_n), + .tx_frame_out_p (tx_frame_out_p), + .spi_udc_clk_i (1'b0), + .spi_udc_clk_o (spi_udc_sclk), + .spi_udc_csn_i (1'b1), + .spi_udc_csn_tx_o (spi_udc_csn_tx), + .spi_udc_csn_rx_o (spi_udc_csn_rx), + .spi_udc_mosi_i (spi_udc_data), + .spi_udc_mosi_o (spi_udc_data), + .spi_udc_miso_i (1'b0)); + +endmodule + +// *************************************************************************** +// *************************************************************************** diff --git a/projects/fmcomms2_udc/zc706/system_bd.tcl b/projects/fmcomms2_udc/zc706/system_bd.tcl new file mode 100644 index 000000000..84c5881dc --- /dev/null +++ b/projects/fmcomms2_udc/zc706/system_bd.tcl @@ -0,0 +1,5 @@ + +source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl +source $ad_hdl_dir/projects/fmcomms2/common/fmcomms2_bd.tcl +source ../common/udconv_bd.tcl + diff --git a/projects/fmcomms2_udc/zc706/system_constr.xdc b/projects/fmcomms2_udc/zc706/system_constr.xdc new file mode 100644 index 000000000..6cb66d845 --- /dev/null +++ b/projects/fmcomms2_udc/zc706/system_constr.xdc @@ -0,0 +1,8 @@ + +# spi pmod J58 + +set_property -dict {PACKAGE_PIN AJ21 IOSTANDARD LVCMOS25} [get_ports spi_udc_csn_tx] ; ## PMOD1_0_LS +set_property -dict {PACKAGE_PIN AK21 IOSTANDARD LVCMOS25} [get_ports spi_udc_csn_rx] ; ## PMOD1_1_LS +set_property -dict {PACKAGE_PIN AB16 IOSTANDARD LVCMOS25} [get_ports spi_udc_sclk] ; ## PMOD1_3_LS +set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports spi_udc_data] ; ## PMOD1_2_LS + diff --git a/projects/fmcomms2_udc/zc706/system_project.tcl b/projects/fmcomms2_udc/zc706/system_project.tcl new file mode 100644 index 000000000..fbe364bc2 --- /dev/null +++ b/projects/fmcomms2_udc/zc706/system_project.tcl @@ -0,0 +1,16 @@ + +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/projects/scripts/adi_project.tcl + +set project_name udconv_zc706 + +adi_project_create $project_name + +adi_project_files $project_name [list "$ad_hdl_dir/library/common/ad_iobuf.v" \ + "system_top.v" \ + "system_constr.xdc" \ + "$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc" \ + "$ad_hdl_dir/projects/fmcomms2/zc706/system_constr.xdc"] + +adi_project_run $project_name + diff --git a/projects/fmcomms2_udc/zc706/system_top.v b/projects/fmcomms2_udc/zc706/system_top.v new file mode 100644 index 000000000..a5df921c4 --- /dev/null +++ b/projects/fmcomms2_udc/zc706/system_top.v @@ -0,0 +1,265 @@ + +// *************************************************************************** +// *************************************************************************** +// Copyright 2011(c) Analog Devices, Inc. +// +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// - Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in +// the documentation and/or other materials provided with the +// distribution. +// - Neither the name of Analog Devices, Inc. nor the names of its +// contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// - The use of this software may or may not infringe the patent rights +// of one or more patent holders. This license does not release you +// from the requirement that you obtain separate licenses from these +// patent holders to use this software. +// - Use of the software either in source or binary form, must be run +// on or directly connected to an Analog Devices Inc. component. +// +// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. +// +// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** + +`timescale 1ns/100ps + +module system_top ( + + DDR_addr, + DDR_ba, + DDR_cas_n, + DDR_ck_n, + DDR_ck_p, + DDR_cke, + DDR_cs_n, + DDR_dm, + DDR_dq, + DDR_dqs_n, + DDR_dqs_p, + DDR_odt, + DDR_ras_n, + DDR_reset_n, + DDR_we_n, + + FIXED_IO_ddr_vrn, + FIXED_IO_ddr_vrp, + FIXED_IO_mio, + FIXED_IO_ps_clk, + FIXED_IO_ps_porb, + FIXED_IO_ps_srstb, + + gpio_bd, + + hdmi_out_clk, + hdmi_vsync, + hdmi_hsync, + hdmi_data_e, + hdmi_data, + + spdif, + + iic_scl, + iic_sda, + + rx_clk_in_p, + rx_clk_in_n, + rx_frame_in_p, + rx_frame_in_n, + rx_data_in_p, + rx_data_in_n, + tx_clk_out_p, + tx_clk_out_n, + tx_frame_out_p, + tx_frame_out_n, + tx_data_out_p, + tx_data_out_n, + + gpio_txnrx, + gpio_enable, + gpio_resetb, + gpio_sync, + gpio_en_agc, + gpio_ctl, + gpio_status, + + spi_csn, + spi_clk, + spi_mosi, + spi_miso, + + spi_udc_csn_tx, + spi_udc_csn_rx, + spi_udc_sclk, + spi_udc_data); + + inout [14:0] DDR_addr; + inout [ 2:0] DDR_ba; + inout DDR_cas_n; + inout DDR_ck_n; + inout DDR_ck_p; + inout DDR_cke; + inout DDR_cs_n; + inout [ 3:0] DDR_dm; + inout [31:0] DDR_dq; + inout [ 3:0] DDR_dqs_n; + inout [ 3:0] DDR_dqs_p; + inout DDR_odt; + inout DDR_ras_n; + inout DDR_reset_n; + inout DDR_we_n; + + inout FIXED_IO_ddr_vrn; + inout FIXED_IO_ddr_vrp; + inout [53:0] FIXED_IO_mio; + inout FIXED_IO_ps_clk; + inout FIXED_IO_ps_porb; + inout FIXED_IO_ps_srstb; + + inout [14:0] gpio_bd; + + output hdmi_out_clk; + output hdmi_vsync; + output hdmi_hsync; + output hdmi_data_e; + output [23:0] hdmi_data; + + output spdif; + + inout iic_scl; + inout iic_sda; + + input rx_clk_in_p; + input rx_clk_in_n; + input rx_frame_in_p; + input rx_frame_in_n; + input [ 5:0] rx_data_in_p; + input [ 5:0] rx_data_in_n; + output tx_clk_out_p; + output tx_clk_out_n; + output tx_frame_out_p; + output tx_frame_out_n; + output [ 5:0] tx_data_out_p; + output [ 5:0] tx_data_out_n; + + inout gpio_txnrx; + inout gpio_enable; + inout gpio_resetb; + inout gpio_sync; + inout gpio_en_agc; + inout [ 3:0] gpio_ctl; + inout [ 7:0] gpio_status; + + output spi_csn; + output spi_clk; + output spi_mosi; + input spi_miso; + + output spi_udc_csn_tx; + output spi_udc_csn_rx; + output spi_udc_sclk; + output spi_udc_data; + + // internal signals + + wire [48:0] gpio_i; + wire [48:0] gpio_o; + wire [48:0] gpio_t; + + // instantiations + + ad_iobuf #(.DATA_WIDTH(32)) i_iobuf ( + .dt ({gpio_t[48:32],gpio_t[14:0]}), + .di ({gpio_o[48:32],gpio_o[14:0]}), + .do ({gpio_i[48:32],gpio_i[14:0]}), + .dio({ gpio_txnrx, + gpio_enable, + gpio_resetb, + gpio_sync, + gpio_en_agc, + gpio_ctl, + gpio_status, + gpio_bd})); + + system_wrapper i_system_wrapper ( + .DDR_addr (DDR_addr), + .DDR_ba (DDR_ba), + .DDR_cas_n (DDR_cas_n), + .DDR_ck_n (DDR_ck_n), + .DDR_ck_p (DDR_ck_p), + .DDR_cke (DDR_cke), + .DDR_cs_n (DDR_cs_n), + .DDR_dm (DDR_dm), + .DDR_dq (DDR_dq), + .DDR_dqs_n (DDR_dqs_n), + .DDR_dqs_p (DDR_dqs_p), + .DDR_odt (DDR_odt), + .DDR_ras_n (DDR_ras_n), + .DDR_reset_n (DDR_reset_n), + .DDR_we_n (DDR_we_n), + .FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn), + .FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp), + .FIXED_IO_mio (FIXED_IO_mio), + .FIXED_IO_ps_clk (FIXED_IO_ps_clk), + .FIXED_IO_ps_porb (FIXED_IO_ps_porb), + .FIXED_IO_ps_srstb (FIXED_IO_ps_srstb), + .GPIO_I (gpio_i), + .GPIO_O (gpio_o), + .GPIO_T (gpio_t), + .hdmi_data (hdmi_data), + .hdmi_data_e (hdmi_data_e), + .hdmi_hsync (hdmi_hsync), + .hdmi_out_clk (hdmi_out_clk), + .hdmi_vsync (hdmi_vsync), + .iic_main_scl_io (iic_scl), + .iic_main_sda_io (iic_sda), + .rx_clk_in_n (rx_clk_in_n), + .rx_clk_in_p (rx_clk_in_p), + .rx_data_in_n (rx_data_in_n), + .rx_data_in_p (rx_data_in_p), + .rx_frame_in_n (rx_frame_in_n), + .rx_frame_in_p (rx_frame_in_p), + .spdif (spdif), + .spi_csn_i (1'b1), + .spi_csn_o (spi_csn), + .spi_miso_i (spi_miso), + .spi_mosi_i (1'b0), + .spi_mosi_o (spi_mosi), + .spi_sclk_i (1'b0), + .spi_sclk_o (spi_clk), + .tx_clk_out_n (tx_clk_out_n), + .tx_clk_out_p (tx_clk_out_p), + .tx_data_out_n (tx_data_out_n), + .tx_data_out_p (tx_data_out_p), + .tx_frame_out_n (tx_frame_out_n), + .tx_frame_out_p (tx_frame_out_p), + .spi_udc_clk_i (1'b0), + .spi_udc_clk_o (spi_udc_sclk), + .spi_udc_csn_i (1'b1), + .spi_udc_csn_tx_o (spi_udc_csn_tx), + .spi_udc_csn_rx_o (spi_udc_csn_rx), + .spi_udc_mosi_i (spi_udc_data), + .spi_udc_mosi_o (spi_udc_data), + .spi_udc_miso_i (1'b0)); + +endmodule + +// *************************************************************************** +// *************************************************************************** + diff --git a/projects/fmcomms2_udc/zed/system_bd.tcl b/projects/fmcomms2_udc/zed/system_bd.tcl new file mode 100644 index 000000000..9f1d51c69 --- /dev/null +++ b/projects/fmcomms2_udc/zed/system_bd.tcl @@ -0,0 +1,5 @@ + +source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl +source $ad_hdl_dir/projects/fmcomms2/common/fmcomms2_bd.tcl +source ../common/udconv_bd.tcl + diff --git a/projects/fmcomms2_udc/zed/system_constr.xdc b/projects/fmcomms2_udc/zed/system_constr.xdc new file mode 100644 index 000000000..2b660c644 --- /dev/null +++ b/projects/fmcomms2_udc/zed/system_constr.xdc @@ -0,0 +1,8 @@ + +# spi pmod JA1 + +set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS33} [get_ports spi_udc_csn_tx] ; ## JA1 +set_property -dict {PACKAGE_PIN AA11 IOSTANDARD LVCMOS33} [get_ports spi_udc_csn_rx] ; ## JA2 +set_property -dict {PACKAGE_PIN AA9 IOSTANDARD LVCMOS33} [get_ports spi_udc_sclk] ; ## JA4 +set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS33} [get_ports spi_udc_data] ; ## JA3 + diff --git a/projects/fmcomms2_udc/zed/system_project.tcl b/projects/fmcomms2_udc/zed/system_project.tcl new file mode 100644 index 000000000..0624e0689 --- /dev/null +++ b/projects/fmcomms2_udc/zed/system_project.tcl @@ -0,0 +1,16 @@ + +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/projects/scripts/adi_project.tcl + +set project_name udconv_zed + +adi_project_create $project_name + +adi_project_files $project_name [list "$ad_hdl_dir/library/common/ad_iobuf.v" \ + "system_top.v" \ + "system_constr.xdc" \ + "$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc" \ + "$ad_hdl_dir/projects/fmcomms2/zed/system_constr.xdc"] + +adi_project_run $project_name + diff --git a/projects/fmcomms2_udc/zed/system_top.v b/projects/fmcomms2_udc/zed/system_top.v new file mode 100644 index 000000000..c88532049 --- /dev/null +++ b/projects/fmcomms2_udc/zed/system_top.v @@ -0,0 +1,314 @@ + +// *************************************************************************** +// *************************************************************************** +// Copyright 2011(c) Analog Devices, Inc. +// +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// - Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in +// the documentation and/or other materials provided with the +// distribution. +// - Neither the name of Analog Devices, Inc. nor the names of its +// contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// - The use of this software may or may not infringe the patent rights +// of one or more patent holders. This license does not release you +// from the requirement that you obtain separate licenses from these +// patent holders to use this software. +// - Use of the software either in source or binary form, must be run +// on or directly connected to an Analog Devices Inc. component. +// +// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. +// +// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** + +`timescale 1ns/100ps + +module system_top ( + + DDR_addr, + DDR_ba, + DDR_cas_n, + DDR_ck_n, + DDR_ck_p, + DDR_cke, + DDR_cs_n, + DDR_dm, + DDR_dq, + DDR_dqs_n, + DDR_dqs_p, + DDR_odt, + DDR_ras_n, + DDR_reset_n, + DDR_we_n, + + FIXED_IO_ddr_vrn, + FIXED_IO_ddr_vrp, + FIXED_IO_mio, + FIXED_IO_ps_clk, + FIXED_IO_ps_porb, + FIXED_IO_ps_srstb, + + gpio_bd, + + hdmi_out_clk, + hdmi_vsync, + hdmi_hsync, + hdmi_data_e, + hdmi_data, + + i2s_mclk, + i2s_bclk, + i2s_lrclk, + i2s_sdata_out, + i2s_sdata_in, + + spdif, + + iic_scl, + iic_sda, + iic_mux_scl, + iic_mux_sda, + + otg_vbusoc, + + rx_clk_in_p, + rx_clk_in_n, + rx_frame_in_p, + rx_frame_in_n, + rx_data_in_p, + rx_data_in_n, + tx_clk_out_p, + tx_clk_out_n, + tx_frame_out_p, + tx_frame_out_n, + tx_data_out_p, + tx_data_out_n, + + gpio_txnrx, + gpio_enable, + gpio_resetb, + gpio_sync, + gpio_en_agc, + gpio_ctl, + gpio_status, + + spi_csn, + spi_clk, + spi_mosi, + spi_miso, + + spi_udc_csn_tx, + spi_udc_csn_rx, + spi_udc_sclk, + spi_udc_data); + + inout [14:0] DDR_addr; + inout [ 2:0] DDR_ba; + inout DDR_cas_n; + inout DDR_ck_n; + inout DDR_ck_p; + inout DDR_cke; + inout DDR_cs_n; + inout [ 3:0] DDR_dm; + inout [31:0] DDR_dq; + inout [ 3:0] DDR_dqs_n; + inout [ 3:0] DDR_dqs_p; + inout DDR_odt; + inout DDR_ras_n; + inout DDR_reset_n; + inout DDR_we_n; + + inout FIXED_IO_ddr_vrn; + inout FIXED_IO_ddr_vrp; + inout [53:0] FIXED_IO_mio; + inout FIXED_IO_ps_clk; + inout FIXED_IO_ps_porb; + inout FIXED_IO_ps_srstb; + + inout [31:0] gpio_bd; + + output hdmi_out_clk; + output hdmi_vsync; + output hdmi_hsync; + output hdmi_data_e; + output [15:0] hdmi_data; + + output spdif; + + output i2s_mclk; + output i2s_bclk; + output i2s_lrclk; + output i2s_sdata_out; + input i2s_sdata_in; + + inout iic_scl; + inout iic_sda; + inout [ 1:0] iic_mux_scl; + inout [ 1:0] iic_mux_sda; + + input otg_vbusoc; + + input rx_clk_in_p; + input rx_clk_in_n; + input rx_frame_in_p; + input rx_frame_in_n; + input [ 5:0] rx_data_in_p; + input [ 5:0] rx_data_in_n; + output tx_clk_out_p; + output tx_clk_out_n; + output tx_frame_out_p; + output tx_frame_out_n; + output [ 5:0] tx_data_out_p; + output [ 5:0] tx_data_out_n; + + inout gpio_txnrx; + inout gpio_enable; + inout gpio_resetb; + inout gpio_sync; + inout gpio_en_agc; + inout [ 3:0] gpio_ctl; + inout [ 7:0] gpio_status; + + output spi_csn; + output spi_clk; + output spi_mosi; + input spi_miso; + + output spi_udc_csn_tx; + output spi_udc_csn_rx; + output spi_udc_sclk; + output spi_udc_data; + + // internal signals + + wire [48:0] gpio_i; + wire [48:0] gpio_o; + wire [48:0] gpio_t; + wire [ 1:0] iic_mux_scl_i_s; + wire [ 1:0] iic_mux_scl_o_s; + wire iic_mux_scl_t_s; + wire [ 1:0] iic_mux_sda_i_s; + wire [ 1:0] iic_mux_sda_o_s; + wire iic_mux_sda_t_s; + + // instantiations + + ad_iobuf #(.DATA_WIDTH(49)) i_iobuf_gpio ( + .dt ({gpio_t[48:0]}), + .di ({gpio_o[48:0]}), + .do ({gpio_i[48:0]}), + .dio({ gpio_txnrx, + gpio_enable, + gpio_resetb, + gpio_sync, + gpio_en_agc, + gpio_ctl, + gpio_status, + gpio_bd})); + + ad_iobuf #(.DATA_WIDTH(2)) i_iobuf_iic_scl ( + .dt (iic_mux_scl_t_s), + .di (iic_mux_scl_i_s), + .do (iic_mux_scl_o_s), + .dio(iic_mux_scl)); + + ad_iobuf #(.DATA_WIDTH(2)) i_iobuf_iic_sda ( + .dt (iic_mux_sda_t_s), + .di (iic_mux_sda_i_s), + .do (iic_mux_sda_o_s), + .dio(iic_mux_sda)); + + system_wrapper i_system_wrapper ( + .DDR_addr (DDR_addr), + .DDR_ba (DDR_ba), + .DDR_cas_n (DDR_cas_n), + .DDR_ck_n (DDR_ck_n), + .DDR_ck_p (DDR_ck_p), + .DDR_cke (DDR_cke), + .DDR_cs_n (DDR_cs_n), + .DDR_dm (DDR_dm), + .DDR_dq (DDR_dq), + .DDR_dqs_n (DDR_dqs_n), + .DDR_dqs_p (DDR_dqs_p), + .DDR_odt (DDR_odt), + .DDR_ras_n (DDR_ras_n), + .DDR_reset_n (DDR_reset_n), + .DDR_we_n (DDR_we_n), + .FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn), + .FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp), + .FIXED_IO_mio (FIXED_IO_mio), + .FIXED_IO_ps_clk (FIXED_IO_ps_clk), + .FIXED_IO_ps_porb (FIXED_IO_ps_porb), + .FIXED_IO_ps_srstb (FIXED_IO_ps_srstb), + .GPIO_I (gpio_i), + .GPIO_O (gpio_o), + .GPIO_T (gpio_t), + .hdmi_data (hdmi_data), + .hdmi_data_e (hdmi_data_e), + .hdmi_hsync (hdmi_hsync), + .hdmi_out_clk (hdmi_out_clk), + .hdmi_vsync (hdmi_vsync), + .i2s_bclk (i2s_bclk), + .i2s_lrclk (i2s_lrclk), + .i2s_mclk (i2s_mclk), + .i2s_sdata_in (i2s_sdata_in), + .i2s_sdata_out (i2s_sdata_out), + .iic_fmc_scl_io (iic_scl), + .iic_fmc_sda_io (iic_sda), + .iic_mux_scl_I (iic_mux_scl_i_s), + .iic_mux_scl_O (iic_mux_scl_o_s), + .iic_mux_scl_T (iic_mux_scl_t_s), + .iic_mux_sda_I (iic_mux_sda_i_s), + .iic_mux_sda_O (iic_mux_sda_o_s), + .iic_mux_sda_T (iic_mux_sda_t_s), + .otg_vbusoc (otg_vbusoc), + .rx_clk_in_n (rx_clk_in_n), + .rx_clk_in_p (rx_clk_in_p), + .rx_data_in_n (rx_data_in_n), + .rx_data_in_p (rx_data_in_p), + .rx_frame_in_n (rx_frame_in_n), + .rx_frame_in_p (rx_frame_in_p), + .spdif (spdif), + .spi_csn_i (1'b1), + .spi_csn_o (spi_csn), + .spi_miso_i (spi_miso), + .spi_mosi_i (1'b0), + .spi_mosi_o (spi_mosi), + .spi_sclk_i (1'b0), + .spi_sclk_o (spi_clk), + .tx_clk_out_n (tx_clk_out_n), + .tx_clk_out_p (tx_clk_out_p), + .tx_data_out_n (tx_data_out_n), + .tx_data_out_p (tx_data_out_p), + .tx_frame_out_n (tx_frame_out_n), + .tx_frame_out_p (tx_frame_out_p), + .spi_udc_clk_i (1'b0), + .spi_udc_clk_o (spi_udc_sclk), + .spi_udc_csn_i (1'b1), + .spi_udc_csn_tx_o (spi_udc_csn_tx), + .spi_udc_csn_rx_o (spi_udc_csn_rx), + .spi_udc_mosi_i (spi_udc_data), + .spi_udc_mosi_o (spi_udc_data), + .spi_udc_miso_i (1'b0)); + +endmodule + +// *************************************************************************** +// ***************************************************************************