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common/up_dac_common: Add support for explicit disarm control

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Laszlo Nagy 2022-01-21 09:01:02 +00:00 committed by Laszlo Nagy
parent 4e644e4e74
commit db49aa652f
1 changed files with 14 additions and 2 deletions
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16
library/common/up_dac_common.v
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@ -65,6 +65,7 @@ module up_dac_common #(
output dac_symb_8_16b,
output dac_sync,
output dac_ext_sync_arm,
output dac_ext_sync_disarm,
output dac_frame,
output dac_clksel,
output dac_par_type,
@ -128,6 +129,7 @@ module up_dac_common #(
reg up_resetn = 'd0;
reg up_dac_sync = 'd0;
reg up_dac_ext_sync_arm = 'd0;
reg up_dac_ext_sync_disarm = 'd0;
reg [4:0] up_dac_num_lanes = 'd0;
reg up_dac_sdr_ddr_n = 'd0;
reg up_dac_symb_op = 'd0;
@ -193,6 +195,7 @@ module up_dac_common #(
up_resetn <= 'd0;
up_dac_sync <= 'd0;
up_dac_ext_sync_arm <= 'd0;
up_dac_ext_sync_disarm <= 'd0;
up_dac_num_lanes <= 'd0;
up_dac_sdr_ddr_n <= 'd0;
up_dac_symb_op <= 'd0;
@ -235,6 +238,13 @@ module up_dac_common #(
end else if ((up_wreq_s == 1'b1) && (up_waddr[6:0] == 7'h11)) begin
up_dac_ext_sync_arm <= up_wdata[1];
end
if (up_dac_ext_sync_disarm == 1'b1) begin
if (up_xfer_done_s == 1'b1) begin
up_dac_ext_sync_disarm <= 1'b0;
end
end else if ((up_wreq_s == 1'b1) && (up_waddr[6:0] == 7'h11)) begin
up_dac_ext_sync_disarm <= up_wdata[2];
end
if ((up_wreq_s == 1'b1) && (up_waddr[6:0] == 7'h12)) begin
up_dac_sdr_ddr_n <= up_wdata[16];
up_dac_symb_op <= up_wdata[15];
@ -413,7 +423,7 @@ module up_dac_common #(
7'h03: up_rdata_int <= CONFIG;
7'h07: up_rdata_int <= {FPGA_TECHNOLOGY,FPGA_FAMILY,SPEED_GRADE,DEV_PACKAGE}; // [8,8,8,8]
7'h10: up_rdata_int <= {29'd0, up_dac_clk_enb, up_mmcm_resetn, up_resetn};
7'h11: up_rdata_int <= {30'd0, up_dac_ext_sync_arm, up_dac_sync};
7'h11: up_rdata_int <= {29'd0, up_dac_ext_sync_disarm, up_dac_ext_sync_arm, up_dac_sync};
7'h12: up_rdata_int <= {15'd0, up_dac_sdr_ddr_n,
up_dac_symb_op, up_dac_symb_8_16b,
1'd0, up_dac_num_lanes,
@ -452,7 +462,7 @@ module up_dac_common #(
// dac control & status
up_xfer_cntrl #(.DATA_WIDTH(33)) i_xfer_cntrl (
up_xfer_cntrl #(.DATA_WIDTH(34)) i_xfer_cntrl (
.up_rstn (up_rstn),
.up_clk (up_clk),
.up_data_cntrl ({ up_dac_sdr_ddr_n,
@ -460,6 +470,7 @@ module up_dac_common #(
up_dac_symb_8_16b,
up_dac_num_lanes,
up_dac_ext_sync_arm,
up_dac_ext_sync_disarm,
up_dac_sync,
up_dac_clksel,
up_dac_frame,
@ -477,6 +488,7 @@ module up_dac_common #(
dac_symb_8_16b,
dac_num_lanes,
dac_ext_sync_arm,
dac_ext_sync_disarm,
dac_sync_s,
dac_clksel,
dac_frame_s,