adrv9009zu11eg/common: EXT_SYNC updates
- Explicitly enable EXT_SYNC parameter for Rx/Obs - Loopback manual sync for each TPL (we do not combine them yet because it requires extra CDC logic)main
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f245448976
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d949936a1b
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@ -272,6 +272,8 @@ adi_tpl_jesd204_rx_create rx_adrv9009_som_tpl_core $RX_NUM_OF_LANES \
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$RX_SAMPLES_PER_FRAME \
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$RX_SAMPLE_WIDTH
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ad_ip_parameter rx_adrv9009_som_tpl_core/adc_tpl_core CONFIG.EXT_SYNC 1
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ad_ip_instance axi_dmac axi_adrv9009_som_rx_dma
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ad_ip_parameter axi_adrv9009_som_rx_dma CONFIG.DMA_TYPE_SRC 2
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ad_ip_parameter axi_adrv9009_som_rx_dma CONFIG.DMA_TYPE_DEST 0
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@ -303,6 +305,8 @@ adi_tpl_jesd204_rx_create obs_adrv9009_som_tpl_core $OBS_NUM_OF_LANES \
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$OBS_SAMPLES_PER_FRAME \
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$OBS_SAMPLE_WIDTH
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ad_ip_parameter obs_adrv9009_som_tpl_core/adc_tpl_core CONFIG.EXT_SYNC 1
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ad_ip_instance axi_dmac axi_adrv9009_som_obs_dma
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ad_ip_parameter axi_adrv9009_som_obs_dma CONFIG.DMA_TYPE_SRC 2
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ad_ip_parameter axi_adrv9009_som_obs_dma CONFIG.DMA_TYPE_DEST 0
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@ -455,6 +459,11 @@ ad_connect sys_dma_rstgen/ext_reset_in sys_rstgen/peripheral_reset
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ad_connect sys_dma_clk sys_dma_rstgen/slowest_sync_clk
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ad_connect sys_dma_resetn sys_dma_rstgen/peripheral_aresetn
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# Loop back manual sync lines for each TPL
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ad_connect tx_adrv9009_som_tpl_core/dac_tpl_core/dac_sync_manual_req_out tx_adrv9009_som_tpl_core/dac_tpl_core/dac_sync_manual_req_in
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ad_connect rx_adrv9009_som_tpl_core/adc_tpl_core/adc_sync_manual_req_out rx_adrv9009_som_tpl_core/adc_tpl_core/adc_sync_manual_req_in
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ad_connect obs_adrv9009_som_tpl_core/adc_tpl_core/adc_sync_manual_req_out obs_adrv9009_som_tpl_core/adc_tpl_core/adc_sync_manual_req_in
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# interconnect (cpu)
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ad_cpu_interconnect 0x44A00000 rx_adrv9009_som_tpl_core
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