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axi_ad9144: Infer clock signal

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Laszlo Nagy 2018-04-05 13:47:58 +01:00 committed by István Csomortáni
parent 7ae0167a4d
commit d8916e681e
1 changed files with 2 additions and 0 deletions
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library/axi_ad9144/axi_ad9144_ip.tcl
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@ -31,5 +31,7 @@ set_property driver_value 0 [ipx::get_ports *dovf* -of_objects [ipx::current_cor
set_property driver_value 0 [ipx::get_ports *dunf* -of_objects [ipx::current_core]] set_property driver_value 0 [ipx::get_ports *dunf* -of_objects [ipx::current_core]]
set_property driver_value 0 [ipx::get_ports *tx_ready* -of_objects [ipx::current_core]] set_property driver_value 0 [ipx::get_ports *tx_ready* -of_objects [ipx::current_core]]
ipx::infer_bus_interface tx_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
ipx::save_core [ipx::current_core] ipx::save_core [ipx::current_core]