From d8916e681eb2aadf9d90ccf7c124db97643d0624 Mon Sep 17 00:00:00 2001 From: Laszlo Nagy Date: Thu, 5 Apr 2018 13:47:58 +0100 Subject: [PATCH] axi_ad9144: Infer clock signal --- library/axi_ad9144/axi_ad9144_ip.tcl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/library/axi_ad9144/axi_ad9144_ip.tcl b/library/axi_ad9144/axi_ad9144_ip.tcl index 49a91aeb1..a28bb891e 100644 --- a/library/axi_ad9144/axi_ad9144_ip.tcl +++ b/library/axi_ad9144/axi_ad9144_ip.tcl @@ -31,5 +31,7 @@ set_property driver_value 0 [ipx::get_ports *dovf* -of_objects [ipx::current_cor set_property driver_value 0 [ipx::get_ports *dunf* -of_objects [ipx::current_core]] set_property driver_value 0 [ipx::get_ports *tx_ready* -of_objects [ipx::current_core]] +ipx::infer_bus_interface tx_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core] + ipx::save_core [ipx::current_core]