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arradio/c5soc- reset false path for vga dma

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Rejeesh Kutty 2017-03-21 10:15:38 -04:00
parent 8063ba2b66
commit d84e34fe5f
1 changed files with 2 additions and 1 deletions
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projects/arradio/c5soc/system_constr.sdc
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@ -73,5 +73,6 @@ set_output_delay -add_delay -fall -min 0.2 -clock {v_tx_clk} [get_ports {tx_dat
set_output_delay -add_delay -fall -min 0.2 -clock {v_tx_clk} [get_ports {tx_data_out[4]}]
set_output_delay -add_delay -fall -min 0.2 -clock {v_tx_clk} [get_ports {tx_data_out[5]}]
# frame reader seems to use the wrong reset!
set_false_path -from [get_registers *altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out*]