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vcu128/vcu128_system_constr: Enable internal diff term for Ethernet clock 

There are no external termination resistors on the VCU118 and VCU128 for
the SGMII clock lines.
The board files of the VCU118 enables them, but this was not reflected in the
constraint files.

For VCU128 the clocking is similar, even if diff terms are not set in the
board files we should have a consistent approach with the VCU118.
main
Laszlo Nagy 2022-02-14 10:54:42 +00:00 committed by Filip Gherman
parent c871a3a9ee
commit d4fb7062d9
1 changed files with 2 additions and 2 deletions
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4
projects/common/vcu128/vcu128_system_constr.xdc
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@ -16,8 +16,8 @@ set_property PACKAGE_PIN BH22 [get_ports phy_tx_n]
set_property PACKAGE_PIN BJ22 [get_ports phy_rx_p] set_property PACKAGE_PIN BJ22 [get_ports phy_rx_p]
set_property PACKAGE_PIN BK21 [get_ports phy_rx_n] set_property PACKAGE_PIN BK21 [get_ports phy_rx_n]
set_property -dict {PACKAGE_PIN BH27 IOSTANDARD LVDS} [get_ports phy_clk_p] set_property -dict {PACKAGE_PIN BH27 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports phy_clk_p]
set_property -dict {PACKAGE_PIN BJ27 IOSTANDARD LVDS} [get_ports phy_clk_n] set_property -dict {PACKAGE_PIN BJ27 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports phy_clk_n]
set_property -dict {PACKAGE_PIN BN27 IOSTANDARD LVCMOS18} [get_ports mdio_mdc] set_property -dict {PACKAGE_PIN BN27 IOSTANDARD LVCMOS18} [get_ports mdio_mdc]
set_property -dict {PACKAGE_PIN BG23 IOSTANDARD LVCMOS18} [get_ports mdio_mdio] set_property -dict {PACKAGE_PIN BG23 IOSTANDARD LVCMOS18} [get_ports mdio_mdio]