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adrv9009zu11eg: Added additional GPIOs and CS to the GPIO expander 

This should integrate seamlessly with SYNCHRONA14
main
Adrian Costina 2022-02-11 08:38:35 +00:00
parent 6c0a07c24b
commit d40db9e204
5 changed files with 88 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
projects/adrv9009zu11eg/adrv2crr_fmc/system_top.v
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@ -52,12 +52,14 @@ module system_top (
inout pmod0_d5, inout pmod0_d5,
inout pmod0_d6, inout pmod0_d6,
inout pmod0_d7, inout pmod0_d7,
output gpio_0_exp_n, //CS0n output gpio_0_exp_n, //CS_HMC7044
output gpio_0_exp_p, //MOSI output gpio_0_exp_p, //MOSI
input gpio_1_exp_n, //MISO input gpio_1_exp_n, //MISO
output gpio_1_exp_p, //SCK output gpio_1_exp_p, //SCK
output gpio_2_exp_n, //CS2n output gpio_2_exp_n, //CS_AD9545
output gpio_2_exp_p, //CS2p inout gpio_3_exp_n, //RESET_HMC7044
inout gpio_3_exp_p, //RESET_AD9545
inout gpio_4_exp_n, //VCXO_SELECT
output led_gpio_0, output led_gpio_0,
output led_gpio_1, output led_gpio_1,
output led_gpio_2, output led_gpio_2,
@ -265,10 +267,9 @@ module system_top (
assign spi_csn_hmc7044_car = spi_3_to_8_csn[3]; assign spi_csn_hmc7044_car = spi_3_to_8_csn[3];
assign gpio_0_exp_n = spi_3_to_8_csn[4]; assign gpio_0_exp_n = spi_3_to_8_csn[4];
assign gpio_1_exp_p = spi_clk; assign gpio_1_exp_p = spi_clk;
assign gpio_0_exp_p = spi_3_to_8_csn[4] == 1'b0 ? spi_mosi : 1'bZ; assign gpio_0_exp_p = spi_mosi;
assign spi_miso_s = spi_3_to_8_csn[4] == 1'b0 ? gpio_1_exp_n : spi_miso; assign spi_miso_s = ((spi_3_to_8_csn[4] == 1'b0) | (spi_3_to_8_csn[5] == 1'b0))? gpio_1_exp_n : spi_miso;
assign gpio_2_exp_n = spi_3_to_8_csn[5]; assign gpio_2_exp_n = spi_3_to_8_csn[5];
assign gpio_2_exp_p = spi_3_to_8_csn[6];
adrv9009zu11eg_spi i_spi ( adrv9009zu11eg_spi i_spi (
.spi_csn(spi_3_to_8_csn), .spi_csn(spi_3_to_8_csn),
@ -280,15 +281,18 @@ module system_top (
assign tx_sync = tx_sync_a & tx_sync_b; assign tx_sync = tx_sync_a & tx_sync_b;
assign gpio_i[94:90] = gpio_o[94:90]; assign gpio_i[94:93] = gpio_o[94:93];
assign gpio_i[31:28] = gpio_o[31:28]; assign gpio_i[31:28] = gpio_o[31:28];
assign gpio_i[21:20] = gpio_o[21:20]; assign gpio_i[21:20] = gpio_o[21:20];
ad_iobuf #(.DATA_WIDTH(58)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(61)) i_iobuf (
.dio_t ({gpio_t[89:32]}), .dio_t ({gpio_t[92:32]}),
.dio_i ({gpio_o[89:32]}), .dio_i ({gpio_o[92:32]}),
.dio_o ({gpio_i[89:32]}), .dio_o ({gpio_i[92:32]}),
.dio_p ({ .dio_p ({
gpio_4_exp_n, // 92
gpio_3_exp_n, // 91
gpio_3_exp_p, // 90
hmc7044_gpio_4, // 89 hmc7044_gpio_4, // 89
hmc7044_gpio_3, // 88 hmc7044_gpio_3, // 88
hmc7044_gpio_1, // 87 hmc7044_gpio_1, // 87
@ -414,11 +418,11 @@ module system_top (
.I (core_clk_a_p), .I (core_clk_a_p),
.IB (core_clk_a_n), .IB (core_clk_a_n),
.O (core_clk_a_ds)); .O (core_clk_a_ds));
BUFG i_clk_bufg_1 ( BUFG i_clk_bufg_1 (
.I (core_clk_a_ds), .I (core_clk_a_ds),
.O (core_clk_a)); .O (core_clk_a));
IBUFDS i_rx_clk_ibuf_2 ( IBUFDS i_rx_clk_ibuf_2 (
.I (core_clk_b_p), .I (core_clk_b_p),
.IB (core_clk_b_n), .IB (core_clk_b_n),
@ -462,7 +466,6 @@ module system_top (
.gpio_i (gpio_i), .gpio_i (gpio_i),
.gpio_o (gpio_o), .gpio_o (gpio_o),
.gpio_t (gpio_t), .gpio_t (gpio_t),
.ddr4_rtl_1_act_n(ddr4_rtl_1_act_n), .ddr4_rtl_1_act_n(ddr4_rtl_1_act_n),
.ddr4_rtl_1_adr(ddr4_rtl_1_adr), .ddr4_rtl_1_adr(ddr4_rtl_1_adr),
.ddr4_rtl_1_ba(ddr4_rtl_1_ba), .ddr4_rtl_1_ba(ddr4_rtl_1_ba),

26
projects/adrv9009zu11eg/adrv2crr_fmcomms8/system_top.v
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@ -52,12 +52,14 @@ module system_top (
inout pmod0_d5, inout pmod0_d5,
inout pmod0_d6, inout pmod0_d6,
inout pmod0_d7, inout pmod0_d7,
output gpio_0_exp_n, //CS0n output gpio_0_exp_n, //CS_HMC7044
output gpio_0_exp_p, //MOSI output gpio_0_exp_p, //MOSI
input gpio_1_exp_n, //MISO input gpio_1_exp_n, //MISO
output gpio_1_exp_p, //SCK output gpio_1_exp_p, //SCK
output gpio_2_exp_n, //CS2n output gpio_2_exp_n, //CS_AD9545
output gpio_2_exp_p, //CS2p inout gpio_3_exp_n, //RESET_HMC7044
inout gpio_3_exp_p, //RESET_AD9545
inout gpio_4_exp_n, //VCXO_SELECT
output led_gpio_0, output led_gpio_0,
output led_gpio_1, output led_gpio_1,
output led_gpio_2, output led_gpio_2,
@ -377,10 +379,9 @@ module system_top (
assign spi_csn_hmc7044_car = spi_3_to_8_csn[3]; assign spi_csn_hmc7044_car = spi_3_to_8_csn[3];
assign gpio_0_exp_n = spi_3_to_8_csn[4]; assign gpio_0_exp_n = spi_3_to_8_csn[4];
assign gpio_1_exp_p = spi_clk; assign gpio_1_exp_p = spi_clk;
assign gpio_0_exp_p = spi_3_to_8_csn[4] == 1'b0 ? spi_mosi : 1'bZ; assign gpio_0_exp_p = spi_mosi;
assign spi_miso_s = spi_3_to_8_csn[4] == 1'b0 ? gpio_1_exp_n : spi_miso; assign spi_miso_s = ((spi_3_to_8_csn[4] == 1'b0) | (spi_3_to_8_csn[5] == 1'b0))? gpio_1_exp_n : spi_miso;
assign gpio_2_exp_n = spi_3_to_8_csn[5]; assign gpio_2_exp_n = spi_3_to_8_csn[5];
assign gpio_2_exp_p = spi_3_to_8_csn[6];
assign spi_csn_adrv9009_c = spi_fmcomms8_3_to_8_csn[0]; assign spi_csn_adrv9009_c = spi_fmcomms8_3_to_8_csn[0];
assign spi_csn_adrv9009_d = spi_fmcomms8_3_to_8_csn[1]; assign spi_csn_adrv9009_d = spi_fmcomms8_3_to_8_csn[1];
@ -404,7 +405,7 @@ module system_top (
assign tx_sync = tx_sync_a & tx_sync_b & tx_sync_c & tx_sync_d; assign tx_sync = tx_sync_a & tx_sync_b & tx_sync_c & tx_sync_d;
assign gpio_i[94:90] = gpio_o[94:90]; assign gpio_i[94:93] = gpio_o[94:93];
assign gpio_i[31:28] = gpio_o[31:28]; assign gpio_i[31:28] = gpio_o[31:28];
assign gpio_i[21:20] = gpio_o[21:20]; assign gpio_i[21:20] = gpio_o[21:20];
@ -452,11 +453,14 @@ module system_top (
adrv9009_gpio_01_c, // 01 adrv9009_gpio_01_c, // 01
adrv9009_gpio_00_c})); // 00 adrv9009_gpio_00_c})); // 00
ad_iobuf #(.DATA_WIDTH(58)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(61)) i_iobuf (
.dio_t ({gpio_t[89:32]}), .dio_t ({gpio_t[92:32]}),
.dio_i ({gpio_o[89:32]}), .dio_i ({gpio_o[92:32]}),
.dio_o ({gpio_i[89:32]}), .dio_o ({gpio_i[92:32]}),
.dio_p ({ .dio_p ({
gpio_4_exp_n, // 92
gpio_3_exp_n, // 91
gpio_3_exp_p, // 90
hmc7044_gpio_4, // 89 hmc7044_gpio_4, // 89
hmc7044_gpio_3, // 88 hmc7044_gpio_3, // 88
hmc7044_gpio_2, // 87 hmc7044_gpio_2, // 87

30
projects/adrv9009zu11eg/adrv2crr_fmcxmwbr1/system_top.v
View File

@ -52,12 +52,14 @@ module system_top (
inout pmod0_d5, inout pmod0_d5,
inout pmod0_d6, inout pmod0_d6,
inout pmod0_d7, inout pmod0_d7,
output gpio_0_exp_n, //CS0n output gpio_0_exp_n, //CS_HMC7044
output gpio_0_exp_p, //MOSI output gpio_0_exp_p, //MOSI
input gpio_1_exp_n, //MISO input gpio_1_exp_n, //MISO
output gpio_1_exp_p, //SCK output gpio_1_exp_p, //SCK
output gpio_2_exp_n, //CS2n output gpio_2_exp_n, //CS_AD9545
output gpio_2_exp_p, //CS2p inout gpio_3_exp_n, //RESET_HMC7044
inout gpio_3_exp_p, //RESET_AD9545
inout gpio_4_exp_n, //VCXO_SELECT
output led_gpio_0, output led_gpio_0,
output led_gpio_1, output led_gpio_1,
output led_gpio_2, output led_gpio_2,
@ -274,7 +276,6 @@ module system_top (
inout dir_gpio7 inout dir_gpio7
); );
// internal signals // internal signals
wire [94:0] gpio_i; wire [94:0] gpio_i;
@ -303,6 +304,9 @@ module system_top (
wire tx_sync_b; wire tx_sync_b;
wire sysref_b; wire sysref_b;
wire tx_sync; wire tx_sync;
wire spi_mosi;
wire spi0_miso;
wire spi_miso_s;
reg [7:0] spi_3_to_8_csn; reg [7:0] spi_3_to_8_csn;
@ -325,10 +329,9 @@ module system_top (
assign spi_csn_hmc7044_car = spi_3_to_8_csn[3]; assign spi_csn_hmc7044_car = spi_3_to_8_csn[3];
assign gpio_0_exp_n = spi_3_to_8_csn[4]; assign gpio_0_exp_n = spi_3_to_8_csn[4];
assign gpio_1_exp_p = spi_clk; assign gpio_1_exp_p = spi_clk;
assign gpio_0_exp_p = spi_3_to_8_csn[4] == 1'b0 ? spi_mosi : 1'bZ; assign gpio_0_exp_p = spi_mosi;
assign spi_miso_s = spi_3_to_8_csn[4] == 1'b0 ? gpio_1_exp_n : spi_miso; assign spi_miso_s = ((spi_3_to_8_csn[4] == 1'b0) | (spi_3_to_8_csn[5] == 1'b0))? gpio_1_exp_n : spi_miso;
assign gpio_2_exp_n = spi_3_to_8_csn[5]; assign gpio_2_exp_n = spi_3_to_8_csn[5];
assign gpio_2_exp_p = spi_3_to_8_csn[6];
assign spi1_cs0 = spi1_csn[0]; assign spi1_cs0 = spi1_csn[0];
assign spi2_cs0 = spi2_csn[0]; assign spi2_cs0 = spi2_csn[0];
@ -343,7 +346,7 @@ module system_top (
assign tx_sync = tx_sync_a & tx_sync_b; assign tx_sync = tx_sync_a & tx_sync_b;
assign gpio_i[94:90] = gpio_o[94:90]; assign gpio_i[94:93] = gpio_o[94:93];
assign gpio_i[31:28] = gpio_o[31:28]; assign gpio_i[31:28] = gpio_o[31:28];
assign gpio_i[21:20] = gpio_o[21:20]; assign gpio_i[21:20] = gpio_o[21:20];
@ -385,11 +388,14 @@ module system_top (
gpio1, // 01 gpio1, // 01
gpio0})); // 00 gpio0})); // 00
ad_iobuf #(.DATA_WIDTH(58)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(61)) i_iobuf (
.dio_t ({gpio_t[89:32]}), .dio_t ({gpio_t[92:32]}),
.dio_i ({gpio_o[89:32]}), .dio_i ({gpio_o[92:32]}),
.dio_o ({gpio_i[89:32]}), .dio_o ({gpio_i[92:32]}),
.dio_p ({ .dio_p ({
gpio_4_exp_n, // 92
gpio_3_exp_n, // 91
gpio_3_exp_p, // 90
hmc7044_gpio_4, // 89 hmc7044_gpio_4, // 89
hmc7044_gpio_3, // 88 hmc7044_gpio_3, // 88
hmc7044_gpio_1, // 87 hmc7044_gpio_1, // 87

65
projects/adrv9009zu11eg/adrv2crr_xmicrowave/system_top.v
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@ -52,12 +52,14 @@ module system_top (
inout pmod0_d5, inout pmod0_d5,
inout pmod0_d6, inout pmod0_d6,
inout pmod0_d7, inout pmod0_d7,
output gpio_0_exp_n, //CS0n output gpio_0_exp_n, //CS_HMC7044
output gpio_0_exp_p, //MOSI output gpio_0_exp_p, //MOSI
input gpio_1_exp_n, //MISO input gpio_1_exp_n, //MISO
output gpio_1_exp_p, //SCK output gpio_1_exp_p, //SCK
output gpio_2_exp_n, //CS2n output gpio_2_exp_n, //CS_AD9545
output gpio_2_exp_p, //CS2p inout gpio_3_exp_n, //RESET_HMC7044
inout gpio_3_exp_p, //RESET_AD9545
inout gpio_4_exp_n, //VCXO_SELECT
output led_gpio_0, output led_gpio_0,
output led_gpio_1, output led_gpio_1,
output led_gpio_2, output led_gpio_2,
@ -193,7 +195,7 @@ module system_top (
output spi_csn_adrv9009_a, output spi_csn_adrv9009_a,
output spi_csn_adrv9009_b, output spi_csn_adrv9009_b,
output spi_csn_hmc7044, output spi_csn_hmc7044,
input ddr4_ref_1_clk_n, input ddr4_ref_1_clk_n,
input ddr4_ref_1_clk_p, input ddr4_ref_1_clk_p,
@ -213,20 +215,20 @@ module system_top (
output ddr4_rtl_1_reset_n, output ddr4_rtl_1_reset_n,
output ddr4_rtl_1_par, output ddr4_rtl_1_par,
input ddr4_rtl_1_alert_n, input ddr4_rtl_1_alert_n,
output spi_clk, output spi_clk,
inout spi_sdio, inout spi_sdio,
input spi_miso, input spi_miso,
//iic //iic
output sclout1, output sclout1,
inout sdaout1, inout sdaout1,
output sclout2, output sclout2,
inout sdaout2, inout sdaout2,
//spi //spi
output spi1_clk, output spi1_clk,
output spi1_copi, output spi1_copi,
input spi1_cipo, input spi1_cipo,
@ -238,7 +240,7 @@ module system_top (
output spi1_cs5, output spi1_cs5,
output spi1_cs6, output spi1_cs6,
output spi1_cs7, output spi1_cs7,
output spi2_clk, output spi2_clk,
output spi2_copi, output spi2_copi,
input spi2_cipo, input spi2_cipo,
@ -253,7 +255,7 @@ module system_top (
// gpio // gpio
inout gpio0, inout gpio0,
inout gpio1, inout gpio1,
inout gpio2, inout gpio2,
inout gpio3, inout gpio3,
@ -261,9 +263,9 @@ module system_top (
inout gpio5, inout gpio5,
inout gpio6, inout gpio6,
inout gpio7, inout gpio7,
// gpio dir // gpio dir
inout dir_gpio0, inout dir_gpio0,
inout dir_gpio1, inout dir_gpio1,
inout dir_gpio2, inout dir_gpio2,
@ -274,16 +276,15 @@ module system_top (
inout dir_gpio7 inout dir_gpio7
); );
// internal signals // internal signals
wire [94:0] gpio_i; wire [94:0] gpio_i;
wire [94:0] gpio_o; wire [94:0] gpio_o;
wire [94:0] gpio_t; wire [94:0] gpio_t;
wire [63:0] xmicrowave_gpio_i; wire [63:0] xmicrowave_gpio_i;
wire [63:0] xmicrowave_gpio_o; wire [63:0] xmicrowave_gpio_o;
wire [63:0] xmicrowave_gpio_t; wire [63:0] xmicrowave_gpio_t;
wire [2:0] spi_csn; wire [2:0] spi_csn;
wire [7:0] spi1_csn; wire [7:0] spi1_csn;
@ -303,9 +304,12 @@ module system_top (
wire tx_sync_b; wire tx_sync_b;
wire sysref_b; wire sysref_b;
wire tx_sync; wire tx_sync;
wire spi_mosi;
wire spi0_miso;
wire spi_miso_s;
reg [7:0] spi_3_to_8_csn; reg [7:0] spi_3_to_8_csn;
always @(*) begin always @(*) begin
case (spi_csn) case (spi_csn)
3'h0: spi_3_to_8_csn = 8'b11111110; 3'h0: spi_3_to_8_csn = 8'b11111110;
@ -318,17 +322,16 @@ module system_top (
default: spi_3_to_8_csn = 8'b11111111; default: spi_3_to_8_csn = 8'b11111111;
endcase endcase
end end
assign spi_csn_adrv9009_a = spi_3_to_8_csn[0]; assign spi_csn_adrv9009_a = spi_3_to_8_csn[0];
assign spi_csn_adrv9009_b = spi_3_to_8_csn[1]; assign spi_csn_adrv9009_b = spi_3_to_8_csn[1];
assign spi_csn_hmc7044 = spi_3_to_8_csn[2]; assign spi_csn_hmc7044 = spi_3_to_8_csn[2];
assign spi_csn_hmc7044_car = spi_3_to_8_csn[3]; assign spi_csn_hmc7044_car = spi_3_to_8_csn[3];
assign gpio_0_exp_n = spi_3_to_8_csn[4]; assign gpio_0_exp_n = spi_3_to_8_csn[4];
assign gpio_1_exp_p = spi_clk; assign gpio_1_exp_p = spi_clk;
assign gpio_0_exp_p = spi_3_to_8_csn[4] == 1'b0 ? spi_mosi : 1'bZ; assign gpio_0_exp_p = spi_mosi;
assign spi_miso_s = spi_3_to_8_csn[4] == 1'b0 ? gpio_1_exp_n : spi_miso; assign spi_miso_s = ((spi_3_to_8_csn[4] == 1'b0) | (spi_3_to_8_csn[5] == 1'b0))? gpio_1_exp_n : spi_miso;
assign gpio_2_exp_n = spi_3_to_8_csn[5]; assign gpio_2_exp_n = spi_3_to_8_csn[5];
assign gpio_2_exp_p = spi_3_to_8_csn[6];
assign spi1_cs0 = spi1_csn[0]; assign spi1_cs0 = spi1_csn[0];
assign spi1_cs1 = spi1_csn[1]; assign spi1_cs1 = spi1_csn[1];
@ -338,7 +341,7 @@ module system_top (
assign spi1_cs5 = spi1_csn[5]; assign spi1_cs5 = spi1_csn[5];
assign spi1_cs6 = spi1_csn[6]; assign spi1_cs6 = spi1_csn[6];
assign spi1_cs7 = spi1_csn[7]; assign spi1_cs7 = spi1_csn[7];
assign spi2_cs0 = spi2_csn[0]; assign spi2_cs0 = spi2_csn[0];
assign spi2_cs1 = spi2_csn[1]; assign spi2_cs1 = spi2_csn[1];
assign spi2_cs2 = spi2_csn[2]; assign spi2_cs2 = spi2_csn[2];
@ -347,7 +350,7 @@ module system_top (
assign spi2_cs5 = spi2_csn[5]; assign spi2_cs5 = spi2_csn[5];
assign spi2_cs6 = spi2_csn[6]; assign spi2_cs6 = spi2_csn[6];
assign spi2_cs7 = spi2_csn[7]; assign spi2_cs7 = spi2_csn[7];
adrv9009zu11eg_spi i_spi ( adrv9009zu11eg_spi i_spi (
.spi_csn(spi_3_to_8_csn), .spi_csn(spi_3_to_8_csn),
.spi_clk(spi_clk), .spi_clk(spi_clk),
@ -358,10 +361,10 @@ module system_top (
assign tx_sync = tx_sync_a & tx_sync_b; assign tx_sync = tx_sync_a & tx_sync_b;
assign gpio_i[94:90] = gpio_o[94:90]; assign gpio_i[94:93] = gpio_o[94:93];
assign gpio_i[31:28] = gpio_o[31:28]; assign gpio_i[31:28] = gpio_o[31:28];
assign gpio_i[21:20] = gpio_o[21:20]; assign gpio_i[21:20] = gpio_o[21:20];
assign xmicrowave_gpio_i[63:16] = xmicrowave_gpio_o[63:16]; assign xmicrowave_gpio_i[63:16] = xmicrowave_gpio_o[63:16];
ad_iobuf #(.DATA_WIDTH(16)) i_xmicrowave_iobuf ( ad_iobuf #(.DATA_WIDTH(16)) i_xmicrowave_iobuf (
@ -386,11 +389,14 @@ module system_top (
gpio1, // 01 gpio1, // 01
gpio0})); // 00 gpio0})); // 00
ad_iobuf #(.DATA_WIDTH(58)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(61)) i_iobuf (
.dio_t ({gpio_t[89:32]}), .dio_t ({gpio_t[92:32]}),
.dio_i ({gpio_o[89:32]}), .dio_i ({gpio_o[92:32]}),
.dio_o ({gpio_i[89:32]}), .dio_o ({gpio_i[92:32]}),
.dio_p ({ .dio_p ({
gpio_4_exp_n, // 92
gpio_3_exp_n, // 91
gpio_3_exp_p, // 90
hmc7044_gpio_4, // 89 hmc7044_gpio_4, // 89
hmc7044_gpio_3, // 88 hmc7044_gpio_3, // 88
hmc7044_gpio_1, // 87 hmc7044_gpio_1, // 87
@ -564,7 +570,6 @@ module system_top (
.gpio_i (gpio_i), .gpio_i (gpio_i),
.gpio_o (gpio_o), .gpio_o (gpio_o),
.gpio_t (gpio_t), .gpio_t (gpio_t),
.ddr4_rtl_1_act_n(ddr4_rtl_1_act_n), .ddr4_rtl_1_act_n(ddr4_rtl_1_act_n),
.ddr4_rtl_1_adr(ddr4_rtl_1_adr), .ddr4_rtl_1_adr(ddr4_rtl_1_adr),
.ddr4_rtl_1_ba(ddr4_rtl_1_ba), .ddr4_rtl_1_ba(ddr4_rtl_1_ba),

4
projects/adrv9009zu11eg/common/adrv2crr_fmc_constr.xdc
View File

@ -32,7 +32,9 @@ set_property -dict {PACKAGE_PIN AL16 IOSTANDARD LVCMOS18} [get_ports gpio_0_exp
set_property -dict {PACKAGE_PIN AK17 IOSTANDARD LVCMOS18} [get_ports gpio_1_exp_n] set_property -dict {PACKAGE_PIN AK17 IOSTANDARD LVCMOS18} [get_ports gpio_1_exp_n]
set_property -dict {PACKAGE_PIN AJ17 IOSTANDARD LVCMOS18} [get_ports gpio_1_exp_p] set_property -dict {PACKAGE_PIN AJ17 IOSTANDARD LVCMOS18} [get_ports gpio_1_exp_p]
set_property -dict {PACKAGE_PIN AK13 IOSTANDARD LVCMOS18} [get_ports gpio_2_exp_n] set_property -dict {PACKAGE_PIN AK13 IOSTANDARD LVCMOS18} [get_ports gpio_2_exp_n]
set_property -dict {PACKAGE_PIN AJ14 IOSTANDARD LVCMOS18} [get_ports gpio_2_exp_p] set_property -dict {PACKAGE_PIN AM15 IOSTANDARD LVCMOS18} [get_ports gpio_3_exp_p]
set_property -dict {PACKAGE_PIN AN14 IOSTANDARD LVCMOS18} [get_ports gpio_3_exp_n]
set_property -dict {PACKAGE_PIN AJ14 IOSTANDARD LVCMOS18} [get_ports gpio_4_exp_n]
set_property -dict {PACKAGE_PIN AR19 IOSTANDARD LVCMOS18} [get_ports resetb_ad9545] set_property -dict {PACKAGE_PIN AR19 IOSTANDARD LVCMOS18} [get_ports resetb_ad9545]
set_property -dict {PACKAGE_PIN AP19 IOSTANDARD LVCMOS18} [get_ports hmc7044_car_reset] set_property -dict {PACKAGE_PIN AP19 IOSTANDARD LVCMOS18} [get_ports hmc7044_car_reset]