diff --git a/projects/usdrx1/common/usdrx1_bd.tcl b/projects/usdrx1/common/usdrx1_bd.tcl old mode 100755 new mode 100644 index d5afeed87..edc9d01f6 --- a/projects/usdrx1/common/usdrx1_bd.tcl +++ b/projects/usdrx1/common/usdrx1_bd.tcl @@ -95,7 +95,7 @@ set_property -dict [list CONFIG.NUM_MI {1}] $axi_usdrx1_dma_interconnect set axi_usdrx1_spi [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.1 axi_usdrx1_spi] set_property -dict [list CONFIG.C_USE_STARTUP {0}] $axi_usdrx1_spi set_property -dict [list CONFIG.C_NUM_SS_BITS {11}] $axi_usdrx1_spi -set_property -dict [list CONFIG.C_SCK_RATIO {8}] $axi_usdrx1_spi +set_property -dict [list CONFIG.C_SCK_RATIO {16}] $axi_usdrx1_spi # additions to default configuration @@ -108,7 +108,7 @@ set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {200.0}] $sys_ps7 set_property -dict [list CONFIG.PCW_FPGA3_PERIPHERAL_FREQMHZ {40}] $sys_ps7 set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {44}] $sys_ps7 +set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {59}] $sys_ps7 set_property LEFT 43 [get_bd_ports GPIO_I] set_property LEFT 43 [get_bd_ports GPIO_O] @@ -124,25 +124,25 @@ connect_bd_net -net axi_spi_1_sdo_i [get_bd_ports spi_sdo_i] [get_bd_pins axi_u connect_bd_net -net axi_spi_1_sdo_o [get_bd_ports spi_sdo_o] [get_bd_pins axi_usdrx1_spi/io0_o] connect_bd_net -net axi_spi_1_sdi_i [get_bd_ports spi_sdi_i] [get_bd_pins axi_usdrx1_spi/io1_i] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_spi/ext_spi_clk] -connect_bd_net -net axi_spi_1_irq [get_bd_pins axi_usdrx1_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In3] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_spi/ext_spi_clk] +connect_bd_net -net axi_spi_1_irq [get_bd_pins axi_usdrx1_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In3] # connections (gt) -connect_bd_net -net axi_usdrx1_gt_ref_clk_c [get_bd_pins axi_usdrx1_gt/ref_clk_c] [get_bd_ports rx_ref_clk] -connect_bd_net -net axi_usdrx1_gt_rx_data_p [get_bd_pins axi_usdrx1_gt/rx_data_p] [get_bd_ports rx_data_p] -connect_bd_net -net axi_usdrx1_gt_rx_data_n [get_bd_pins axi_usdrx1_gt/rx_data_n] [get_bd_ports rx_data_n] -connect_bd_net -net axi_usdrx1_gt_rx_sync [get_bd_pins axi_usdrx1_gt/rx_sync] [get_bd_ports rx_sync] -connect_bd_net -net axi_usdrx1_gt_rx_sysref [get_bd_pins axi_usdrx1_gt/rx_sysref] [get_bd_ports rx_sysref] +connect_bd_net -net axi_usdrx1_gt_ref_clk_c [get_bd_pins axi_usdrx1_gt/ref_clk_c] [get_bd_ports rx_ref_clk] +connect_bd_net -net axi_usdrx1_gt_rx_data_p [get_bd_pins axi_usdrx1_gt/rx_data_p] [get_bd_ports rx_data_p] +connect_bd_net -net axi_usdrx1_gt_rx_data_n [get_bd_pins axi_usdrx1_gt/rx_data_n] [get_bd_ports rx_data_n] +connect_bd_net -net axi_usdrx1_gt_rx_sync [get_bd_pins axi_usdrx1_gt/rx_sync] [get_bd_ports rx_sync] +connect_bd_net -net axi_usdrx1_gt_rx_sysref [get_bd_pins axi_usdrx1_gt/rx_sysref] [get_bd_ports rx_sysref] # connections (adc) connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_usdrx1_gt/rx_clk_g] connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_usdrx1_gt/rx_clk] -connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_0/rx_clk] -connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_1/rx_clk] -connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_2/rx_clk] -connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_3/rx_clk] +connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_0/rx_clk] +connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_1/rx_clk] +connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_2/rx_clk] +connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_ad9671_core_3/rx_clk] connect_bd_net -net axi_usdrx1_gt_rx_clk [get_bd_pins axi_usdrx1_jesd/rx_core_clk] connect_bd_net -net axi_usdrx1_gt_rx_rst [get_bd_pins axi_usdrx1_gt/rx_rst] [get_bd_pins axi_usdrx1_jesd/rx_reset] @@ -181,7 +181,7 @@ connect_bd_net -net axi_ad9671_core_adc_dovf_3 [get_bd_pins axi_ad9671_core connect_bd_net -net axi_ad9671_dma_wr_en [get_bd_pins axi_usdrx1_dma/fifo_wr_en] [get_bd_ports adc_wr_en] connect_bd_net -net axi_ad9671_dma_adc_data [get_bd_pins axi_usdrx1_dma/fifo_wr_din] [get_bd_ports adc_data] connect_bd_net -net axi_ad9671_dma_adc_dovf [get_bd_pins axi_usdrx1_dma/fifo_wr_overflow] [get_bd_ports adc_dovf] -connect_bd_net -net axi_usdrx1_dma_irq [get_bd_pins axi_usdrx1_dma/irq] [get_bd_pins sys_concat_intc/In2] +connect_bd_net -net axi_usdrx1_dma_irq [get_bd_pins axi_usdrx1_dma/irq] [get_bd_pins sys_concat_intc/In2] # interconnect (cpu) @@ -201,14 +201,14 @@ connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M11_ACLK] $sy connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M12_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M13_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M14_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_gt/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_0/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_1/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_2/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_3/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_jesd/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_dma/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_spi/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_gt/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_0/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_1/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_2/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9671_core_3/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_jesd/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_dma/s_axi_aclk] +connect_bd_net -net sys_100m_clk [get_bd_pins axi_usdrx1_spi/s_axi_aclk] connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source @@ -217,14 +217,14 @@ connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M11_ARESET connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M12_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M13_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M14_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_gt/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_0/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_1/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_2/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_3/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_jesd/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_dma/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_spi/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_gt/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_0/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_1/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_2/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9671_core_3/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_jesd/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_dma/s_axi_aresetn] +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_usdrx1_spi/s_axi_aresetn] # interconnect (gt es) @@ -250,7 +250,7 @@ connect_bd_net -net sys_fmc_dma_clk $sys_fmc_dma_clk_source connect_bd_net -net sys_fmc_dma_resetn $sys_fmc_dma_resetn_source connect_bd_intf_net -intf_net axi_usdrx1_dma_interconnect_m00_axi [get_bd_intf_pins axi_usdrx1_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP2] -connect_bd_intf_net -intf_net axi_usdrx1_dma_interconnect_s00_axi [get_bd_intf_pins axi_usdrx1_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_usdrx1_dma/m_dest_axi] +connect_bd_intf_net -intf_net axi_usdrx1_dma_interconnect_s00_axi [get_bd_intf_pins axi_usdrx1_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_usdrx1_dma/m_dest_axi] connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_usdrx1_dma_interconnect/ACLK] $sys_fmc_dma_clk_source connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_usdrx1_dma_interconnect/S00_ACLK] $sys_fmc_dma_clk_source connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_usdrx1_dma_interconnect/M00_ACLK] $sys_fmc_dma_clk_source @@ -259,7 +259,7 @@ connect_bd_net -net sys_fmc_dma_clk [get_bd_pins axi_usdrx1_dma/m_dest_axi_aclk] connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_usdrx1_dma_interconnect/ARESETN] $sys_fmc_dma_resetn_source connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_usdrx1_dma_interconnect/S00_ARESETN] $sys_fmc_dma_resetn_source connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_usdrx1_dma_interconnect/M00_ARESETN] $sys_fmc_dma_resetn_source -connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_usdrx1_dma/m_dest_axi_aresetn] +connect_bd_net -net sys_fmc_dma_resetn [get_bd_pins axi_usdrx1_dma/m_dest_axi_aresetn] # ila diff --git a/projects/usdrx1/zc706/system_bd.tcl b/projects/usdrx1/zc706/system_bd.tcl old mode 100755 new mode 100644 diff --git a/projects/usdrx1/zc706/system_project.tcl b/projects/usdrx1/zc706/system_project.tcl old mode 100755 new mode 100644 diff --git a/projects/usdrx1/zc706/system_top.v b/projects/usdrx1/zc706/system_top.v index 4a5d6b3e6..410d3a0cd 100644 --- a/projects/usdrx1/zc706/system_top.v +++ b/projects/usdrx1/zc706/system_top.v @@ -101,8 +101,6 @@ module system_top ( spi_clk_clk, spi_clk_sdio, - // afe_mlo_p, - // afe_mlo_n, afe_rst_p, afe_rst_n, afe_trig_p, @@ -181,21 +179,19 @@ module system_top ( output spi_clk_clk; inout spi_clk_sdio; - // output afe_mlo_p; - //output afe_mlo_n; output afe_rst_p; output afe_rst_n; output afe_trig_p; output afe_trig_n; - inout dac_sleep; - inout [13:0] dac_data; - inout afe_pdn; - inout afe_stby; - inout clk_resetn; - inout clk_syncn; - inout clk_status; - inout amp_disbn; + output dac_sleep; + output [13:0] dac_data; + output afe_pdn; + output afe_stby; + output clk_resetn; + output clk_syncn; + input clk_status; + output amp_disbn; inout prc_sck; inout prc_cnv; inout prc_sdo_i; @@ -234,13 +230,10 @@ module system_top ( wire [63:0] gt_rx_data_1; wire [63:0] gt_rx_data_2; wire [63:0] gt_rx_data_3; - wire [43:0] gpio_i; - wire [43:0] gpio_o; - wire [43:0] gpio_t; - wire afe_mlo; + wire [58:0] gpio_i; + wire [58:0] gpio_o; + wire [58:0] gpio_t; - reg afe_trig_d; - reg afe_trig_s; // spi assignments assign spi_fout_enb_clk = ~spi_csn[10:10]; @@ -301,11 +294,6 @@ module system_top ( // gpio/control interface - /* OBUFDS i_obufds_mlo ( - .I (afe_mlo), - .O (afe_mlo_p), - .OB (afe_mlo_n));*/ - IOBUF i_iobuf_gpio_prc_sdo_q ( .I (gpio_o[43]), .O (gpio_i[43]), @@ -330,48 +318,14 @@ module system_top ( .T (gpio_t[40]), .IO (prc_sck)); - IOBUF i_iobuf_gpio_amp_disbn ( - .I (gpio_o[39]), - .O (gpio_i[39]), - .T (gpio_t[39]), - .IO (amp_disbn)); + assign dac_sleep = gpio_o[44]; + assign amp_disbn = gpio_o[39]; + assign gpio_i[38] = clk_status; + assign clk_syncn = gpio_o[37]; + assign clk_resetn = gpio_o[36]; + assign afe_stby = gpio_o[35]; + assign afe_pdn = gpio_o[34]; - IOBUF i_iobuf_gpio_clk_status ( - .I (gpio_o[38]), - .O (gpio_i[38]), - .T (gpio_t[38]), - .IO (clk_status)); - - IOBUF i_iobuf_gpio_clk_syncn ( - .I (gpio_o[37]), - .O (gpio_i[37]), - .T (gpio_t[37]), - .IO (clk_syncn)); - - IOBUF i_iobuf_gpio_clk_resetn ( - .I (gpio_o[36]), - .O (gpio_i[36]), - .T (gpio_t[36]), - .IO (clk_resetn)); - - IOBUF i_iobuf_gpio_afe_stby ( - .I (gpio_o[35]), - .O (gpio_i[35]), - .T (gpio_t[35]), - .IO (afe_stby)); - - IOBUF i_iobuf_gpio_afe_pdn ( - .I (gpio_o[34]), - .O (gpio_i[34]), - .T (gpio_t[34]), - .IO (afe_pdn)); - - // synchronize the gpio with ref_clk - /* always @(negedge rx_ref_clk) - begin - afe_trig_d <= gpio_o[33]; - afe_trig_s <= afe_trig_d; - end*/ OBUFDS i_obufds_gpio_afe_trig ( .I (gpio_o[33]), .O (afe_trig_p), @@ -382,20 +336,10 @@ module system_top ( .O (afe_rst_p), .OB (afe_rst_n)); - IOBUF i_iobuf_gpio_dac_sleep ( - .I (gpio_o[30]), - .O (gpio_i[30]), - .T (gpio_t[30]), - .IO (dac_sleep)); - genvar n; generate for (n = 0; n <= 13; n = n + 1) begin: g_iobuf_gpio_dac_data - IOBUF i_iobuf_gpio_dac_data ( - .I (gpio_o[16+n]), - .O (gpio_i[16+n]), - .T (gpio_t[16+n]), - .IO (dac_data[n])); + assign dac_data[n] = gpio_o[45+n]; end for (n = 0; n <= 14; n = n + 1) begin: g_iobuf_gpio_bd IOBUF i_iobuf_gpio_bd ( @@ -462,7 +406,6 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), - // .mlo_clk (afe_mlo), .rx_data_n (rx_data_n), .rx_data_p (rx_data_p), .rx_ref_clk (rx_ref_clk),