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fmcomms2: updated zc706 project with new constraint style

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Adrian Costina 2014-10-27 19:27:36 +02:00
parent e086f5eb9f
commit d04a545a41
2 changed files with 1 additions and 9 deletions
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6
projects/fmcomms2/common/fmcomms2_bd.tcl
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@ -68,11 +68,6 @@ if {$sys_zynq == 1} {
set util_dac_unpack [create_bd_cell -type ip -vlnv analog.com:user:util_dac_unpack:1.0 util_dac_unpack] set util_dac_unpack [create_bd_cell -type ip -vlnv analog.com:user:util_dac_unpack:1.0 util_dac_unpack]
set_property -dict [list CONFIG.CHANNELS {4}] $util_dac_unpack set_property -dict [list CONFIG.CHANNELS {4}] $util_dac_unpack
# constant 0
set constant_0 [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_0]
set_property -dict [list CONFIG.CONST_VAL {0}] $constant_0
if {$sys_zynq == 1} { if {$sys_zynq == 1} {
set_property -dict [list CONFIG.C_DMA_AXI_PROTOCOL_SRC {1}] $axi_ad9361_dac_dma set_property -dict [list CONFIG.C_DMA_AXI_PROTOCOL_SRC {1}] $axi_ad9361_dac_dma
} }
@ -323,6 +318,7 @@ if {$sys_zynq == 0} {
# ila (adc) # ila (adc)
set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_adc] set ila_adc [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_adc]
set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc
set_property -dict [list CONFIG.C_NUM_OF_PROBES {8}] $ila_adc set_property -dict [list CONFIG.C_NUM_OF_PROBES {8}] $ila_adc
set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc
set_property -dict [list CONFIG.C_PROBE1_WIDTH {1}] $ila_adc set_property -dict [list CONFIG.C_PROBE1_WIDTH {1}] $ila_adc

4
projects/fmcomms2/zc706/system_constr.xdc
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@ -69,7 +69,3 @@ set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports sp
create_clock -name rx_clk -period 4.00 [get_ports rx_clk_in_p] create_clock -name rx_clk -period 4.00 [get_ports rx_clk_in_p]
create_clock -name ad9361_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_ad9361/clk] create_clock -name ad9361_clk -period 4.00 [get_pins i_system_wrapper/system_i/axi_ad9361/clk]
set_clock_groups -asynchronous -group {ad9361_clk}
set_clock_groups -asynchronous -group {rx_clk}