ad_ip_jesd204_tpl_dac: hw.tcl: Fix typo
s/witdh/width/g Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
parent
1c75c7b9ca
commit
d034fea754
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@ -78,7 +78,7 @@ proc p_ad_ip_jesd204_tpl_dac_elab {} {
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set m_num_of_lanes [get_parameter_value "NUM_LANES"]
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set m_num_of_lanes [get_parameter_value "NUM_LANES"]
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set m_num_of_channels [get_parameter_value "NUM_CHANNELS"]
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set m_num_of_channels [get_parameter_value "NUM_CHANNELS"]
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set channel_bus_witdh [expr 32*$m_num_of_lanes/$m_num_of_channels]
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set channel_bus_width [expr 32*$m_num_of_lanes/$m_num_of_channels]
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# link layer interface
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# link layer interface
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@ -97,9 +97,9 @@ proc p_ad_ip_jesd204_tpl_dac_elab {} {
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set_port_property dac_enable_$i fragment_list [format "enable(%d:%d)" $i $i]
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set_port_property dac_enable_$i fragment_list [format "enable(%d:%d)" $i $i]
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add_interface_port dac_ch_$i dac_valid_$i valid output 1
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add_interface_port dac_ch_$i dac_valid_$i valid output 1
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set_port_property dac_valid_$i fragment_list [format "dac_valid(%d:%d)" $i $i]
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set_port_property dac_valid_$i fragment_list [format "dac_valid(%d:%d)" $i $i]
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add_interface_port dac_ch_$i dac_data_$i data input $channel_bus_witdh
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add_interface_port dac_ch_$i dac_data_$i data input $channel_bus_width
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set_port_property dac_data_$i fragment_list \
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set_port_property dac_data_$i fragment_list \
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[format "dac_ddata(%d:%d)" [expr $channel_bus_witdh*$i+$channel_bus_witdh-1] [expr $channel_bus_witdh*$i]]
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[format "dac_ddata(%d:%d)" [expr $channel_bus_width*$i+$channel_bus_width-1] [expr $channel_bus_width*$i]]
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set_interface_property dac_ch_$i associatedClock link_clk
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set_interface_property dac_ch_$i associatedClock link_clk
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}
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}
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