Remove duplicare wire declaration

-Introduced by updating to verilog-2001
main
AndreiGrozav 2017-05-16 16:35:37 +03:00
parent 41e25e7c96
commit cf3737122b
4 changed files with 0 additions and 4 deletions

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@ -103,7 +103,6 @@ module axi_ad6676 #(
// internal clocks & resets
wire adc_rst;
wire up_rstn;
wire up_clk;

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@ -105,7 +105,6 @@ module axi_ad9265 #(
// internal clocks & resets
wire adc_rst;
wire up_rstn;
wire up_clk;
wire delay_rst;

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@ -108,7 +108,6 @@ module axi_ad9643 #(
// internal clocks & resets
wire adc_rst;
wire up_rstn;
wire up_clk;
wire delay_rst;

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@ -108,7 +108,6 @@ module axi_ad9652 #(
// internal clocks & resets
wire adc_rst;
wire up_rstn;
wire up_clk;
wire delay_rst;