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scripts/adi_ip.tcl: Add option to specify reset interface direction 

Allow to specify the direction of the reset signal for a interface, this is
useful if the core itself generates the reset signal.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2015-04-28 15:28:47 +02:00
parent 6b9906b22b
commit cefbe3a0ff
1 changed files with 2 additions and 1 deletions
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3
library/scripts/adi_ip.tcl
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@ -150,7 +150,7 @@ proc adi_add_bus {bus_name mode abs_type bus_type port_maps} {
}
}
proc adi_add_bus_clock {clock_signal_name bus_inf_name {reset_signal_name ""}} {
proc adi_add_bus_clock {clock_signal_name bus_inf_name {reset_signal_name ""} {reset_signal_mode "slave"}} {
set bus_inf_name_clean [string map {":" "_"} $bus_inf_name]
set clock_inf_name [format "%s%s" $bus_inf_name_clean "_signal_clock"]
set clock_inf [ipx::add_bus_interface $clock_inf_name [ipx::current_core]]
@ -172,6 +172,7 @@ proc adi_add_bus_clock {clock_signal_name bus_inf_name {reset_signal_name ""}} {
set_property abstraction_type_vlnv "xilinx.com:signal:reset_rtl:1.0" $reset_inf
set_property bus_type_vlnv "xilinx.com:signal:reset:1.0" $reset_inf
set_property display_name $reset_inf_name $reset_inf
set_property interface_mode $reset_signal_mode $reset_inf
set reset_map [ipx::add_port_map "RST" $reset_inf]
set_property physical_name $reset_signal_name $reset_map