From cac4057449e72d226b419e3adaac2271bfac3f4b Mon Sep 17 00:00:00 2001 From: AndreiGrozav Date: Thu, 10 Nov 2016 16:21:52 +0200 Subject: [PATCH] daq2/common: Altera updates --- projects/daq2/common/daq2_qsys.tcl | 72 +++++++++++------------------- 1 file changed, 26 insertions(+), 46 deletions(-) diff --git a/projects/daq2/common/daq2_qsys.tcl b/projects/daq2/common/daq2_qsys.tcl index d831ead53..e4207aca3 100644 --- a/projects/daq2/common/daq2_qsys.tcl +++ b/projects/daq2/common/daq2_qsys.tcl @@ -40,9 +40,6 @@ add_connection avl_ad9144_xcvr.tx_ip_d_0 avl_ad9144_xcvr.tx_phy_d_0 add_connection avl_ad9144_xcvr.tx_ip_d_3 avl_ad9144_xcvr.tx_phy_d_1 add_connection avl_ad9144_xcvr.tx_ip_d_1 avl_ad9144_xcvr.tx_phy_d_2 add_connection avl_ad9144_xcvr.tx_ip_d_2 avl_ad9144_xcvr.tx_phy_d_3 -add_connection sys_cpu.data_master avl_ad9144_xcvr.core_pll_reconfig -add_connection sys_cpu.data_master avl_ad9144_xcvr.lane_pll_reconfig -add_connection sys_cpu.data_master avl_ad9144_xcvr.ip_reconfig # ad9144-xcvr @@ -56,7 +53,6 @@ add_connection sys_clk.clk_reset axi_ad9144_xcvr.s_axi_reset add_connection axi_ad9144_xcvr.if_up_rst avl_ad9144_xcvr.rst add_connection avl_ad9144_xcvr.ready axi_ad9144_xcvr.ready add_connection axi_ad9144_xcvr.core_pll_locked avl_ad9144_xcvr.core_pll_locked -add_connection sys_cpu.data_master axi_ad9144_xcvr.s_axi # ad9144-core @@ -67,7 +63,6 @@ add_connection avl_ad9144_xcvr.core_clk axi_ad9144_core.if_tx_clk add_connection axi_ad9144_core.if_tx_data avl_ad9144_xcvr.ip_data add_connection sys_clk.clk_reset axi_ad9144_core.s_axi_reset add_connection sys_clk.clk axi_ad9144_core.s_axi_clock -add_connection sys_cpu.data_master axi_ad9144_core.s_axi # ad9144-unpack @@ -94,11 +89,8 @@ add_connection util_ad9144_upack.if_dac_data axi_ad9144_dma.if_fifo_rd_dout add_connection axi_ad9144_dma.if_fifo_rd_underflow axi_ad9144_core.if_dac_dunf add_connection sys_clk.clk_reset axi_ad9144_dma.s_axi_reset add_connection sys_clk.clk axi_ad9144_dma.s_axi_clock -add_connection sys_cpu.data_master axi_ad9144_dma.s_axi add_connection sys_ddr3_cntrl.emif_usr_reset_n axi_ad9144_dma.m_src_axi_reset add_connection sys_ddr3_cntrl.emif_usr_clk axi_ad9144_dma.m_src_axi_clock -add_connection axi_ad9144_dma.m_src_axi sys_ddr3_cntrl.ctrl_amm_0 -add_connection sys_cpu.irq axi_ad9144_dma.interrupt_sender # ad9680-xcvr @@ -133,8 +125,6 @@ add_interface rx_sysref conduit end set_interface_property rx_sysref EXPORT_OF avl_ad9680_xcvr.sysref add_interface rx_sync conduit end set_interface_property rx_sync EXPORT_OF avl_ad9680_xcvr.sync -add_connection sys_cpu.data_master avl_ad9680_xcvr.core_pll_reconfig -add_connection sys_cpu.data_master avl_ad9680_xcvr.ip_reconfig # ad9680-xcvr @@ -148,7 +138,6 @@ add_connection sys_clk.clk_reset axi_ad9680_xcvr.s_axi_reset add_connection axi_ad9680_xcvr.if_up_rst avl_ad9680_xcvr.rst add_connection avl_ad9680_xcvr.ready axi_ad9680_xcvr.ready add_connection axi_ad9680_xcvr.core_pll_locked avl_ad9680_xcvr.core_pll_locked -add_connection sys_cpu.data_master axi_ad9680_xcvr.s_axi # ad9680 @@ -159,7 +148,6 @@ add_connection avl_ad9680_xcvr.ip_sof axi_ad9680_core.if_rx_sof add_connection avl_ad9680_xcvr.ip_data axi_ad9680_core.if_rx_data add_connection sys_clk.clk_reset axi_ad9680_core.s_axi_reset add_connection sys_clk.clk axi_ad9680_core.s_axi_clock -add_connection sys_cpu.data_master axi_ad9680_core.s_axi # ad9680-pack @@ -207,71 +195,63 @@ add_connection ad9680_adcfifo.if_dma_xfer_req axi_ad9680_dma.if_s_axis_xfer_req add_connection ad9680_adcfifo.if_adc_wovf axi_ad9680_core.if_adc_dovf add_connection sys_clk.clk_reset axi_ad9680_dma.s_axi_reset add_connection sys_clk.clk axi_ad9680_dma.s_axi_clock -add_connection sys_cpu.data_master axi_ad9680_dma.s_axi add_connection sys_ddr3_cntrl.emif_usr_reset_n axi_ad9680_dma.m_dest_axi_reset add_connection sys_ddr3_cntrl.emif_usr_clk axi_ad9680_dma.m_dest_axi_clock -add_connection axi_ad9680_dma.m_dest_axi sys_ddr3_cntrl.ctrl_amm_0 -add_connection sys_cpu.irq axi_ad9680_dma.interrupt_sender # reconfig sharing add_instance avl_adxcfg_0 avl_adxcfg 1.0 add_connection sys_clk.clk avl_adxcfg_0.rcfg_clk add_connection sys_clk.clk_reset avl_adxcfg_0.rcfg_reset_n -add_connection sys_cpu.data_master avl_adxcfg_0.rcfg_s0 -add_connection sys_cpu.data_master avl_adxcfg_0.rcfg_s1 add_connection avl_adxcfg_0.rcfg_m0 avl_ad9144_xcvr.phy_reconfig_0 add_connection avl_adxcfg_0.rcfg_m1 avl_ad9680_xcvr.phy_reconfig_0 add_instance avl_adxcfg_1 avl_adxcfg 1.0 add_connection sys_clk.clk avl_adxcfg_1.rcfg_clk add_connection sys_clk.clk_reset avl_adxcfg_1.rcfg_reset_n -add_connection sys_cpu.data_master avl_adxcfg_1.rcfg_s0 -add_connection sys_cpu.data_master avl_adxcfg_1.rcfg_s1 add_connection avl_adxcfg_1.rcfg_m0 avl_ad9144_xcvr.phy_reconfig_1 add_connection avl_adxcfg_1.rcfg_m1 avl_ad9680_xcvr.phy_reconfig_1 add_instance avl_adxcfg_2 avl_adxcfg 1.0 add_connection sys_clk.clk avl_adxcfg_2.rcfg_clk add_connection sys_clk.clk_reset avl_adxcfg_2.rcfg_reset_n -add_connection sys_cpu.data_master avl_adxcfg_2.rcfg_s0 -add_connection sys_cpu.data_master avl_adxcfg_2.rcfg_s1 add_connection avl_adxcfg_2.rcfg_m0 avl_ad9144_xcvr.phy_reconfig_2 add_connection avl_adxcfg_2.rcfg_m1 avl_ad9680_xcvr.phy_reconfig_2 add_instance avl_adxcfg_3 avl_adxcfg 1.0 add_connection sys_clk.clk avl_adxcfg_3.rcfg_clk add_connection sys_clk.clk_reset avl_adxcfg_3.rcfg_reset_n -add_connection sys_cpu.data_master avl_adxcfg_3.rcfg_s0 -add_connection sys_cpu.data_master avl_adxcfg_3.rcfg_s1 add_connection avl_adxcfg_3.rcfg_m0 avl_ad9144_xcvr.phy_reconfig_3 add_connection avl_adxcfg_3.rcfg_m1 avl_ad9680_xcvr.phy_reconfig_3 # addresses -set_connection_parameter_value sys_cpu.data_master/avl_ad9144_xcvr.core_pll_reconfig baseAddress {0x10400000} -set_connection_parameter_value sys_cpu.data_master/avl_ad9144_xcvr.ip_reconfig baseAddress {0x10401000} -set_connection_parameter_value sys_cpu.data_master/avl_ad9144_xcvr.lane_pll_reconfig baseAddress {0x10402000} -set_connection_parameter_value sys_cpu.data_master/axi_ad9144_dma.s_axi baseAddress {0x1040c000} -set_connection_parameter_value sys_cpu.data_master/axi_ad9144_xcvr.s_axi baseAddress {0x10410000} -set_connection_parameter_value sys_cpu.data_master/axi_ad9144_core.s_axi baseAddress {0x10420000} -set_connection_parameter_value sys_cpu.data_master/avl_ad9680_xcvr.core_pll_reconfig baseAddress {0x10500000} -set_connection_parameter_value sys_cpu.data_master/avl_ad9680_xcvr.ip_reconfig baseAddress {0x10501000} -set_connection_parameter_value sys_cpu.data_master/axi_ad9680_dma.s_axi baseAddress {0x1050c000} -set_connection_parameter_value sys_cpu.data_master/axi_ad9680_xcvr.s_axi baseAddress {0x10510000} -set_connection_parameter_value sys_cpu.data_master/axi_ad9680_core.s_axi baseAddress {0x10520000} -set_connection_parameter_value axi_ad9144_dma.m_src_axi/sys_ddr3_cntrl.ctrl_amm_0 baseAddress {0x00000000} -set_connection_parameter_value axi_ad9680_dma.m_dest_axi/sys_ddr3_cntrl.ctrl_amm_0 baseAddress {0x00000000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_0.rcfg_s0 baseAddress {0x10404000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_1.rcfg_s0 baseAddress {0x10405000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_2.rcfg_s0 baseAddress {0x10406000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_3.rcfg_s0 baseAddress {0x10407000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_0.rcfg_s1 baseAddress {0x10504000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_1.rcfg_s1 baseAddress {0x10505000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_2.rcfg_s1 baseAddress {0x10506000} -set_connection_parameter_value sys_cpu.data_master/avl_adxcfg_3.rcfg_s1 baseAddress {0x10507000} +ad_cpu_interconnect 0x10404000 avl_adxcfg_0.rcfg_s0 +ad_cpu_interconnect 0x10504000 avl_adxcfg_0.rcfg_s1 +ad_cpu_interconnect 0x10405000 avl_adxcfg_1.rcfg_s0 +ad_cpu_interconnect 0x10505000 avl_adxcfg_1.rcfg_s1 +ad_cpu_interconnect 0x10406000 avl_adxcfg_2.rcfg_s0 +ad_cpu_interconnect 0x10506000 avl_adxcfg_2.rcfg_s1 +ad_cpu_interconnect 0x10407000 avl_adxcfg_3.rcfg_s0 +ad_cpu_interconnect 0x10507000 avl_adxcfg_3.rcfg_s1 +ad_cpu_interconnect 0x10400000 avl_ad9144_xcvr.core_pll_reconfig +ad_cpu_interconnect 0x10402000 avl_ad9144_xcvr.lane_pll_reconfig +ad_cpu_interconnect 0x10401000 avl_ad9144_xcvr.ip_reconfig +ad_cpu_interconnect 0x1040c000 axi_ad9144_dma.s_axi +ad_cpu_interconnect 0x10410000 axi_ad9144_xcvr.s_axi +ad_cpu_interconnect 0x10420000 axi_ad9144_core.s_axi +ad_cpu_interconnect 0x10500000 avl_ad9680_xcvr.core_pll_reconfig +ad_cpu_interconnect 0x10501000 avl_ad9680_xcvr.ip_reconfig +ad_cpu_interconnect 0x1050c000 axi_ad9680_dma.s_axi +ad_cpu_interconnect 0x10510000 axi_ad9680_xcvr.s_axi +ad_cpu_interconnect 0x10520000 axi_ad9680_core.s_axi + +# dma interconnects + +ad_dma_interconnect axi_ad9144_dma.m_src_axi +ad_dma_interconnect axi_ad9680_dma.m_dest_axi # interrupts -set_connection_parameter_value sys_cpu.irq/axi_ad9144_dma.interrupt_sender irqNumber {11} -set_connection_parameter_value sys_cpu.irq/axi_ad9680_dma.interrupt_sender irqNumber {10} +ad_cpu_interrupt 10 axi_ad9680_dma.interrupt_sender +ad_cpu_interrupt 11 axi_ad9144_dma.interrupt_sender