usdrx1: Disable SYNC_TRANSFER_START for the DMA
There is no sync signal in this design, so the flag needs to be set to 0. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
parent
e0b5044aa3
commit
c67aecc1eb
|
@ -84,7 +84,7 @@ set_property -dict [list CONFIG.ID {0}] $axi_usdrx1_dma
|
||||||
set_property -dict [list CONFIG.AXI_SLICE_SRC {0}] $axi_usdrx1_dma
|
set_property -dict [list CONFIG.AXI_SLICE_SRC {0}] $axi_usdrx1_dma
|
||||||
set_property -dict [list CONFIG.AXI_SLICE_DEST {0}] $axi_usdrx1_dma
|
set_property -dict [list CONFIG.AXI_SLICE_DEST {0}] $axi_usdrx1_dma
|
||||||
set_property -dict [list CONFIG.ASYNC_CLK_DEST_REQ {1}] $axi_usdrx1_dma
|
set_property -dict [list CONFIG.ASYNC_CLK_DEST_REQ {1}] $axi_usdrx1_dma
|
||||||
set_property -dict [list CONFIG.SYNC_TRANSFER_START {1}] $axi_usdrx1_dma
|
set_property -dict [list CONFIG.SYNC_TRANSFER_START {0}] $axi_usdrx1_dma
|
||||||
set_property -dict [list CONFIG.DMA_LENGTH_WIDTH {24}] $axi_usdrx1_dma
|
set_property -dict [list CONFIG.DMA_LENGTH_WIDTH {24}] $axi_usdrx1_dma
|
||||||
set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_usdrx1_dma
|
set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_usdrx1_dma
|
||||||
set_property -dict [list CONFIG.CYCLIC {0}] $axi_usdrx1_dma
|
set_property -dict [list CONFIG.CYCLIC {0}] $axi_usdrx1_dma
|
||||||
|
|
Loading…
Reference in New Issue