From c53f8c15ee7aa70eb0752f4a74ef4b9280c11e63 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Wed, 1 Apr 2015 12:13:49 +0200 Subject: [PATCH] Add CN0363 project Add support for the CN0363 (colorimeter) board connected to the ZED board. Signed-off-by: Lars-Peter Clausen --- library/Makefile | 4 + library/cn0363/cn0363_dma_sequencer/Makefile | 42 + .../cn0363_dma_sequencer.v | 160 +++ .../cn0363_dma_sequencer_ip.tcl | 72 ++ .../cn0363/cn0363_phase_data_sync/Makefile | 42 + .../cn0363_phase_data_sync.v | 131 +++ .../cn0363_phase_data_sync_ip.tcl | 41 + projects/Makefile | 3 + projects/cn0363/zed/filters/hpf.mat | 520 +++++++++ projects/cn0363/zed/filters/lpf.mat | 1031 +++++++++++++++++ projects/cn0363/zed/system_bd.tcl | 300 +++++ projects/cn0363/zed/system_constr.xdc | 23 + projects/cn0363/zed/system_project.tcl | 12 + projects/cn0363/zed/system_top.v | 276 +++++ projects/scripts/adi_board.tcl | 6 +- 15 files changed, 2660 insertions(+), 3 deletions(-) create mode 100644 library/cn0363/cn0363_dma_sequencer/Makefile create mode 100644 library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v create mode 100644 library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer_ip.tcl create mode 100644 library/cn0363/cn0363_phase_data_sync/Makefile create mode 100644 library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v create mode 100644 library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync_ip.tcl create mode 100644 projects/cn0363/zed/filters/hpf.mat create mode 100644 projects/cn0363/zed/filters/lpf.mat create mode 100644 projects/cn0363/zed/system_bd.tcl create mode 100644 projects/cn0363/zed/system_constr.xdc create mode 100644 projects/cn0363/zed/system_project.tcl create mode 100644 projects/cn0363/zed/system_top.v diff --git a/library/Makefile b/library/Makefile index 08a7551c1..7b7b4e429 100644 --- a/library/Makefile +++ b/library/Makefile @@ -39,6 +39,8 @@ clean: make -C axi_mc_current_monitor clean make -C axi_mc_speed clean make -C axi_spdif_tx clean + make -C cn0363/cn0363_dma_sequencer clean + make -C cn0363/cn0363_phase_data_sync clean make -C controllerperipheralhdladi_pcore clean make -C cordic_demod clean make -C spi_engine/axi_spi_engine clean @@ -97,6 +99,8 @@ lib: -make -C axi_mc_current_monitor -make -C axi_mc_speed -make -C axi_spdif_tx + -make -C cn0363/cn0363_dma_sequencer + -make -C cn0363/cn0363_phase_data_sync -make -C controllerperipheralhdladi_pcore -make -C cordic_demod -make -C spi_engine/axi_spi_engine diff --git a/library/cn0363/cn0363_dma_sequencer/Makefile b/library/cn0363/cn0363_dma_sequencer/Makefile new file mode 100644 index 000000000..29972c388 --- /dev/null +++ b/library/cn0363/cn0363_dma_sequencer/Makefile @@ -0,0 +1,42 @@ +#################################################################################### +#################################################################################### +## Copyright 2011(c) Analog Devices, Inc. +## Auto-generated, do not modify! +#################################################################################### +#################################################################################### + +M_DEPS := cn0363_dma_sequencer_ip.tcl +M_DEPS += ../../scripts/adi_env.tcl +M_DEPS += ../../scripts/adi_ip.tcl +M_DEPS += cn0363_dma_sequencer.v + +M_VIVADO := vivado -mode batch -source + +M_FLIST := *.cache +M_FLIST += *.data +M_FLIST += *.xpr +M_FLIST += *.log +M_FLIST += component.xml +M_FLIST += *.jou +M_FLIST += xgui +M_FLIST += .Xil + + + +.PHONY: all clean clean-all +all: cn0363_dma_sequencer.xpr + + +clean:clean-all + + +clean-all: + rm -rf $(M_FLIST) + + +cn0363_dma_sequencer.xpr: $(M_DEPS) + rm -rf $(M_FLIST) + $(M_VIVADO) cn0363_dma_sequencer_ip.tcl >> cn0363_dma_sequencer_ip.log 2>&1 + +#################################################################################### +#################################################################################### diff --git a/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v b/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v new file mode 100644 index 000000000..dac6814b8 --- /dev/null +++ b/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v @@ -0,0 +1,160 @@ +module cn0363_dma_sequencer ( + input clk, + input resetn, + + input [31:0] phase, + input phase_valid, + output reg phase_ready, + + input [23:0] data, + input data_valid, + output reg data_ready, + + input [31:0] data_filtered, + input data_filtered_valid, + output reg data_filtered_ready, + + input [31:0] i_q, + input i_q_valid, + output reg i_q_ready, + + input [31:0] i_q_filtered, + input i_q_filtered_valid, + output reg i_q_filtered_ready, + + output overflow, + + output reg [31:0] dma_wr_data, + output reg dma_wr_en, + output reg dma_wr_sync, + input dma_wr_overflow, + input dma_wr_xfer_req, + + input [13:0] channel_enable, + + output processing_resetn +); + +reg [3:0] count = 'h00; + +assign overflow = dma_wr_overflow; +assign processing_resetn = dma_wr_xfer_req; + +always @(posedge clk) begin + if (processing_resetn == 1'b0) begin + count <= 'h0; + end else begin + case (count) + 'h0: if (phase_valid) count <= count + 1; + 'h1: if (data_valid) count <= count + 1; + 'h2: if (data_filtered_valid) count <= count + 1; + 'h3: if (i_q_valid) count <= count + 1; + 'h4: if (i_q_valid) count <= count + 1; + 'h5: if (i_q_filtered_valid) count <= count + 1; + 'h6: if (i_q_filtered_valid) count <= count + 1; + 'h7: if (phase_valid) count <= count + 1; + 'h8: if (data_valid) count <= count + 1; + 'h9: if (data_filtered_valid) count <= count + 1; + 'ha: if (i_q_valid) count <= count + 1; + 'hb: if (i_q_valid) count <= count + 1; + 'hc: if (i_q_filtered_valid) count <= count + 1; + 'hd: if (i_q_filtered_valid) count <= 'h00; + endcase + end +end + +always @(posedge clk) begin + case (count) + 'h0: dma_wr_data <= phase; + 'h1: dma_wr_data <= {8'h00,data[23:0]}; + 'h2: dma_wr_data <= data_filtered; + 'h3: dma_wr_data <= i_q; + 'h4: dma_wr_data <= i_q; + 'h5: dma_wr_data <= i_q_filtered; + 'h6: dma_wr_data <= i_q_filtered; + 'h7: dma_wr_data <= phase; + 'h8: dma_wr_data <= {8'h00,data[23:0]}; + 'h9: dma_wr_data <= data_filtered; + 'ha: dma_wr_data <= i_q; + 'hb: dma_wr_data <= i_q; + 'hc: dma_wr_data <= i_q_filtered; + 'hd: dma_wr_data <= i_q_filtered; + endcase +end + +always @(posedge clk) begin + if (processing_resetn == 1'b0 || channel_enable[count] == 1'b0) begin + dma_wr_en <= 1'b0; + end else begin + case (count) + 'h0: dma_wr_en <= phase_valid; + 'h1: dma_wr_en <= data_valid; + 'h2: dma_wr_en <= data_filtered_valid; + 'h3: dma_wr_en <= i_q_valid; + 'h4: dma_wr_en <= i_q_valid; + 'h5: dma_wr_en <= i_q_filtered_valid; + 'h6: dma_wr_en <= i_q_filtered_valid; + 'h7: dma_wr_en <= phase_valid; + 'h8: dma_wr_en <= data_valid; + 'h9: dma_wr_en <= data_filtered_valid; + 'ha: dma_wr_en <= i_q_valid; + 'hb: dma_wr_en <= i_q_valid; + 'hc: dma_wr_en <= i_q_filtered_valid; + 'hd: dma_wr_en <= i_q_filtered_valid; + endcase + end +end + +always @(posedge clk) begin + if (count == 'h00) begin + dma_wr_sync <= 1'b1; + end else if (dma_wr_en == 1'b1) begin + dma_wr_sync = 1'b0; + end +end + +always @(*) begin + case (count) + 'h0: phase_ready <= 1'b1; + 'h7: phase_ready <= 1'b1; + default: phase_ready <= 1'b0; + endcase +end + +always @(*) begin + case (count) + 'h1: data_ready <= 1'b1; + 'h8: data_ready <= 1'b1; + default: data_ready <= 1'b0; + endcase +end + +always @(*) begin + case (count) + 'h2: data_filtered_ready <= 1'b1; + 'h9: data_filtered_ready <= 1'b1; + default: data_filtered_ready <= 1'b0; + endcase +end + +always @(*) begin + case (count) + 'h3: i_q_ready <= 1'b1; + 'h4: i_q_ready <= 1'b1; + 'ha: i_q_ready <= 1'b1; + 'hb: i_q_ready <= 1'b1; + default: i_q_ready <= 1'b0; + endcase +end + +always @(*) begin + case (count) + 'h5: i_q_filtered_ready <= 1'b1; + 'h6: i_q_filtered_ready <= 1'b1; + 'hc: i_q_filtered_ready <= 1'b1; + 'hd: i_q_filtered_ready <= 1'b1; + default: i_q_filtered_ready <= 1'b0; + endcase +end + +endmodule diff --git a/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer_ip.tcl b/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer_ip.tcl new file mode 100644 index 000000000..77d41a487 --- /dev/null +++ b/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer_ip.tcl @@ -0,0 +1,72 @@ + +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/library/scripts/adi_ip.tcl + +adi_ip_create cn0363_dma_sequencer +adi_ip_files cn0363_dma_sequencer [list \ + "cn0363_dma_sequencer.v" +] + +adi_ip_properties_lite cn0363_dma_sequencer + +adi_add_bus "phase" "slave" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"phase_valid" "TVALID"} \ + {"phase_ready" "TREADY"} \ + {"phase" "TDATA"} \ + } + +adi_add_bus "data" "slave" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"data_valid" "TVALID"} \ + {"data_ready" "TREADY"} \ + {"data" "TDATA"} \ + } + +adi_add_bus "data_filtered" "slave" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"data_filtered_valid" "TVALID"} \ + {"data_filtered_ready" "TREADY"} \ + {"data_filtered" "TDATA"} \ + } + +adi_add_bus "i_q" "slave" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"i_q_valid" "TVALID"} \ + {"i_q_ready" "TREADY"} \ + {"i_q" "TDATA"} \ + } + +adi_add_bus "i_q_filtered" "slave" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"i_q_filtered_valid" "TVALID"} \ + {"i_q_filtered_ready" "TREADY"} \ + {"i_q_filtered" "TDATA"} \ + } + + +adi_add_bus "dma_wr" "master" \ + "analog.com:interface:fifo_wr_rtl:1.0" \ + "analog.com:interface:fifo_wr:1.0" \ + { + {"dma_wr_en" "EN"} \ + {"dma_wr_sync" "SYNC"} \ + {"dma_wr_data" "DATA"} \ + {"dma_wr_overflow" "OVERFLOW"} \ + {"dma_wr_xfer_req" "XFER_REQ"} \ + } + + +adi_add_bus_clock "clk" "phase:data:data_filtered:i_q:i_q_filtered:dma_wr" "resetn:processing_resetn" + +ipx::save_core [ipx::current_core] diff --git a/library/cn0363/cn0363_phase_data_sync/Makefile b/library/cn0363/cn0363_phase_data_sync/Makefile new file mode 100644 index 000000000..33cf98cdd --- /dev/null +++ b/library/cn0363/cn0363_phase_data_sync/Makefile @@ -0,0 +1,42 @@ +#################################################################################### +#################################################################################### +## Copyright 2011(c) Analog Devices, Inc. +## Auto-generated, do not modify! +#################################################################################### +#################################################################################### + +M_DEPS := cn0363_phase_data_sync_ip.tcl +M_DEPS += ../../scripts/adi_env.tcl +M_DEPS += ../../scripts/adi_ip.tcl +M_DEPS += cn0363_phase_data_sync.v + +M_VIVADO := vivado -mode batch -source + +M_FLIST := *.cache +M_FLIST += *.data +M_FLIST += *.xpr +M_FLIST += *.log +M_FLIST += component.xml +M_FLIST += *.jou +M_FLIST += xgui +M_FLIST += .Xil + + + +.PHONY: all clean clean-all +all: cn0363_phase_data_sync.xpr + + +clean:clean-all + + +clean-all: + rm -rf $(M_FLIST) + + +cn0363_phase_data_sync.xpr: $(M_DEPS) + rm -rf $(M_FLIST) + $(M_VIVADO) cn0363_phase_data_sync_ip.tcl >> cn0363_phase_data_sync_ip.log 2>&1 + +#################################################################################### +#################################################################################### diff --git a/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v b/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v new file mode 100644 index 000000000..c2bb1310b --- /dev/null +++ b/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v @@ -0,0 +1,131 @@ + + +module cn0363_phase_data_sync ( + input clk, + input resetn, + + input processing_resetn, + + output s_axis_sample_ready, + input s_axis_sample_valid, + input [7:0] s_axis_sample_data, + + input sample_has_stat, + + input conv_done, + input [31:0] phase, + + output reg m_axis_sample_valid, + input m_axis_sample_ready, + output [23:0] m_axis_sample_data, + + output reg m_axis_phase_valid, + input m_axis_phase_ready, + output [31:0] m_axis_phase_data, + + output reg overflow +); + +reg [1:0] data_counter = 'h00; + +reg [31:0] phase_hold = 'h00; +reg [23:0] sample_hold = 'h00; +reg sample_hold_valid = 1'b0; +reg conv_done_d1 = 1'b0; + +reg synced = 1'b0; +wire sync; + +/* The ADC will do conversions regardless of whether the pipeline is ready or + not. So we'll always accept new samples and assert overflow if necessary if + the pipeline is not ready. */ +assign s_axis_sample_ready = 1'b1; + +// Conversion from offset binary to signed on data +assign m_axis_sample_data = {~sample_hold[23],sample_hold[22:0]}; +assign m_axis_phase_data = phase_hold; + +always @(posedge clk) begin + if (conv_done_d1 == 1'b0 && conv_done == 1'b1) begin + // Is the processing pipeline ready to accept data? + if (m_axis_sample_valid | m_axis_phase_valid | ~processing_resetn) begin + overflow <= 1'b1; + end else begin + phase_hold <= phase; + overflow <= 1'b0; + end + end else begin + overflow <= 1'b0; + end + conv_done_d1 <= conv_done; +end + +always @(posedge clk) begin + if (processing_resetn == 1'b0) begin + m_axis_phase_valid <= 1'b0; + m_axis_sample_valid <= 1'b0; + end else begin + /* Data and phase become valid once we have both */ + if (sample_hold_valid == 1'b1) begin + m_axis_phase_valid <= 1'b1; + m_axis_sample_valid <= 1'b1; + end else begin + if (m_axis_phase_ready == 1'b1) begin + m_axis_phase_valid <= 1'b0; + end + if (m_axis_sample_ready == 1'b1) begin + m_axis_sample_valid <= 1'b0; + end + end + end +end + +/* If the STAT register is included in the sample we get 4 bytes per sample and + * are able to detect channel swaps and synchronize the first output sample to + * the first channel. If the STAT register is not included we only get 3 bytes + * per sample and rely on that the first sample will always be from the first + * channel */ + +always @(posedge clk) begin + sample_hold_valid <= 1'b0; + if (sample_has_stat == 1'b0) begin + if (s_axis_sample_valid == 1'b1 && data_counter == 2'h2) begin + sample_hold_valid <= 1'b1; + end + end else begin + if (s_axis_sample_valid == 1'b1 && data_counter == 2'h3 && + (sync == 1'b1 || synced == 1'b1)) begin + sample_hold_valid <= 1'b1; + end + end +end + +always @(posedge clk) begin + if (s_axis_sample_valid == 1'b1 && data_counter != 2'h3) begin + sample_hold <= {sample_hold[15:0],s_axis_sample_data}; + end +end + +always @(posedge clk) begin + if (s_axis_sample_valid == 1'b1) begin + if (data_counter == 2'h2 && sample_has_stat == 1'b0) begin + data_counter <= 2'h0; + end else begin + data_counter <= data_counter + 1'b1; + end + end +end + +assign sync = s_axis_sample_data[3:0] == 'h00 && data_counter == 'h3; + +always @(posedge clk) begin + if (processing_resetn == 1'b0) begin + synced <= ~sample_has_stat; + end else begin + if (s_axis_sample_valid == 1'b1 && sync == 1'b1) begin + synced <= 1'b1; + end + end +end + +endmodule diff --git a/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync_ip.tcl b/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync_ip.tcl new file mode 100644 index 000000000..3dde13021 --- /dev/null +++ b/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync_ip.tcl @@ -0,0 +1,41 @@ + +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/library/scripts/adi_ip.tcl + +adi_ip_create cn0363_phase_data_sync +adi_ip_files cn0363_phase_data_sync [list \ + "cn0363_phase_data_sync.v" +] + +adi_ip_properties_lite cn0363_phase_data_sync + +adi_add_bus "S_AXIS_SAMPLE" "slave" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"s_axis_sample_valid" "TVALID"} \ + {"s_axis_sample_ready" "TREADY"} \ + {"s_axis_sample_data" "TDATA"} \ + } + +adi_add_bus "M_AXIS_SAMPLE" "master" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"m_axis_sample_valid" "TVALID"} \ + {"m_axis_sample_ready" "TREADY"} \ + {"m_axis_sample_data" "TDATA"} \ + } + +adi_add_bus "M_AXIS_PHASE" "master" \ + "xilinx.com:interface:axis_rtl:1.0" \ + "xilinx.com:interface:axis:1.0" \ + { + {"m_axis_phase_valid" "TVALID"} \ + {"m_axis_phase_ready" "TREADY"} \ + {"m_axis_phase_data" "TDATA"} \ + } + +adi_add_bus_clock "clk" "S_AXIS_SAMPLE:M_AXIS_SAMPLE:M_AXIS_PHASE" "resetn" + +ipx::save_core [ipx::current_core] diff --git a/projects/Makefile b/projects/Makefile index 0ab5d5ff2..655a28251 100644 --- a/projects/Makefile +++ b/projects/Makefile @@ -15,6 +15,7 @@ all: -make -C adv7511 all -make -C cftl_cip all -make -C cftl_std all + -make -C cn0363 all -make -C daq1 all -make -C daq2 all -make -C daq3 all @@ -43,6 +44,7 @@ clean: make -C adv7511 clean make -C cftl_cip clean make -C cftl_std clean + make -C cn0363 clean make -C daq1 clean make -C daq2 clean make -C daq3 clean @@ -71,6 +73,7 @@ clean-all: make -C adv7511 clean-all make -C cftl_cip clean-all make -C cftl_std clean-all + make -C cn0363 clean-all make -C daq1 clean-all make -C daq2 clean-all make -C daq3 clean-all diff --git a/projects/cn0363/zed/filters/hpf.mat b/projects/cn0363/zed/filters/hpf.mat new file mode 100644 index 000000000..f3b6558c8 --- /dev/null +++ b/projects/cn0363/zed/filters/hpf.mat @@ -0,0 +1,520 @@ +# Created by Octave 3.6.2, Tue Apr 07 15:22:27 2015 CEST +# name: hpf +# type: matrix +# rows: 513 +# columns: 1 + 3.125005230091648e-06 + 1.272922340541526e-05 + 2.228713693195711e-05 + 3.167779216011667e-05 + 4.077961244411042e-05 + 4.947137642943441e-05 + 5.763325048199676e-05 + 6.514788075089597e-05 + 7.190154838608252e-05 + 7.778538895546582e-05 + 8.269667417994694e-05 + 8.654015080185192e-05 + 8.922942780916198e-05 + 9.068839945428162e-05 + 9.08526876417122e-05 + 8.967108343167956e-05 + 8.710696373934456e-05 + 8.31396559266987e-05 + 7.776572001057323e-05 + 7.10001157651276e-05 + 6.287722019308129e-05 + 5.345165977858958e-05 + 4.279892170430391e-05 + 3.101570888773e-05 + 1.822000532066107e-05 + 4.550820812408257e-06 + -9.832412147642556e-06 + -2.475081209436057e-05 + -4.000741000162233e-05 + -5.538890912794365e-05 + -7.066784679851554e-05 + -8.560515373469779e-05 + -9.99530981024648e-05 + -0.0001134585926214486 + -0.0001258668340284109 + -0.0001369252351103039 + -0.0001463876006107109 + -0.0001540184897749483 + -0.0001595977003420989 + -0.0001629248016241761 + -0.0001638236381350631 + -0.0001621467202360717 + -0.0001577794146271059 + -0.0001506438453893505 + -0.000140702415810303 + -0.0001279608625005721 + -0.0001124707564189372 + -9.433137039859016e-05 + -7.369083961788524e-05 + -5.074655014992576e-05 + -2.574470118459376e-05 + 1.021001367446387e-06 + 2.921154855695993e-05 + 5.844574309182635e-05 + 8.83042227368199e-05 + 0.0001183343732310121 + 0.0001480560941027056 + 0.00017696836307978 + 0.0002045565271902877 + 0.0002303002314649907 + 0.0002536818797387624 + 0.0002741955067508388 + 0.0002913559269085423 + 0.0003047080130365351 + 0.0003138359484954938 + 0.0003183722885058195 + 0.0003180066616061862 + 0.0003124939401271251 + 0.0003016617095355854 + 0.0002854168706271628 + 0.000263751215874352 + 0.0002367458317905825 + 0.0002045741928902602 + 0.0001675038296030595 + 0.0001258964721636327 + 8.02065948128383e-05 + 3.097830932236822e-05 + -2.115941645489572e-05 + -7.549921099837507e-05 + -0.0001312633890032865 + -0.0001876136150627972 + -0.0002436620471188746 + -0.0002984838356482688 + -0.0003511308254522837 + -0.0004006462792827283 + -0.0004460804169125378 + -0.000486506540183834 + -0.0005210374945492769 + -0.0005488422011396879 + -0.0005691619808723867 + -0.0005813263839361632 + -0.0005847682344632428 + -0.0005790376015678585 + -0.0005638144143596582 + -0.0005389194501093796 + -0.0005043234414478701 + -0.0004601540702210987 + -0.0004067006422150833 + -0.0003444162681259722 + -0.0002739174115124618 + -0.0001959807035748319 + -0.0001115369669204825 + -2.166243538897479e-05 + 7.243279615690694e-05 + 0.0001694190101474898 + 0.0002678636623760837 + 0.0003662505574471283 + 0.0004630011784455728 + 0.000556497900968934 + 0.0006451087798755067 + 0.0007272135590392522 + 0.0008012305208387391 + 0.000865643763768108 + 0.0009190304741012456 + 0.0009600877415469292 + 0.0009876584597926978 + 0.001000755851137096 + 0.0009985861603306616 + 0.0009805690764431024 + 0.0009463554630791427 + 0.0008958420064800135 + 0.000829182427740599 + 0.000746794949180355 + 0.0006493657553356397 + 0.0005378482454722772 + 0.0004134579362112905 + 0.000277662938968418 + 0.0001321700064808016 + -2.109378530311862e-05 + -0.0001800035803687027 + -0.0003422632977266256 + -0.0005054359129148229 + -0.0006669771101848824 + -0.0008242718829334016 + -0.0009746735978983282 + -0.001115544982429431 + -0.001244300444855416 + -0.001358449096621753 + -0.001455637812376969 + -0.00153369364133737 + -0.00159066487072372 + -0.00162486004035257 + -0.00163488421693376 + -0.001619671857457259 + -0.001578515623252026 + -0.001511090549689093 + -0.001417473030717752 + -0.001298154141920757 + -0.001154046899825392 + -0.0009864871379123442 + -0.0007972277700615966 + -0.0005884263088514231 + -0.0003626256078366379 + -0.0001227279022125844 + 0.0001280376704367039 + 0.0003861537799360087 + 0.0006478594481216446 + 0.0009091999291447866 + 0.001166081327714818 + 0.001414329265246448 + 0.001649750819594216 + 0.001868198889304729 + 0.002065638069512015 + 0.002238211075031133 + 0.00238230470799775 + 0.00249461434350539 + 0.002572205897856948 + 0.002612574250807783 + 0.002613697115840601 + 0.002574083391145649 + 0.002492815078407197 + 0.002369581926295045 + 0.002204708040057977 + 0.001999169796903386 + 0.001754604517780124 + 0.00147330946839616 + 0.001158230894232211 + 0.0008129429342058163 + 0.0004416164035860973 + 4.897758671114303e-05 + -0.0003597426681351423 + -0.0007788691078999633 + -0.00120235089542199 + -0.001623838355148398 + -0.002036766770808102 + -0.002434446234645613 + -0.0028101564320049 + -0.003157245142691349 + -0.003469229153445804 + -0.003739896205660857 + -0.003963406550560174 + -0.004134392651607886 + -0.004248055561811812 + -0.004300256512443262 + -0.004287602279830854 + -0.004207522948301982 + -0.004058340759735648 + -0.003839328832932692 + -0.003550758648172448 + -0.003193935322674972 + -0.002771219849704404 + -0.002286037635939587 + -0.001742872846463814 + -0.00114724825202435 + -0.0005056904666314446 + 0.0001743193375068106 + 0.0008844089490174293 + 0.001615392380013163 + 0.002357360183266049 + 0.00309978194183994 + 0.003831619864751356 + 0.004541452249209853 + 0.005217605410943741 + 0.005848292541506266 + 0.006421757827543688 + 0.006926424063816506 + 0.00735104191105742 + 0.007684838892986746 + 0.007917666195128625 + 0.008040141322278479 + 0.008043784692005907 + 0.007921148288511141 + 0.007665934574189153 + 0.007273103954721745 + 0.006738969216376796 + 0.006061275500050979 + 0.005239264543715391 + 0.004273722111261321 + 0.003167007728954381 + 0.001923066068186815 + 0.0005474195421422539 + -0.0009528580786604669 + -0.002569186984358145 + -0.004291545285057392 + -0.006108551075948811 + -0.008007561834025704 + -0.009974790141468893 + -0.01199543451114901 + -0.01405382388429277 + -0.01613357418205645 + -0.01821775512422723 + -0.02028906538195169 + -0.02233001400939951 + -0.02432310600341163 + -0.02625102977190857 + -0.0280968442522217 + -0.02984416341024535 + -0.03147733587067356 + -0.03298161747745753 + -0.03434333466146606 + -0.03555003659821667 + -0.03659063427114725 + -0.03745552471351821 + -0.0381366988826302 + -0.03862783182124412 + -0.03892435398024356 + 0.960978170818749 + -0.03892435398024355 + -0.03862783182124412 + -0.0381366988826302 + -0.03745552471351822 + -0.03659063427114725 + -0.03555003659821667 + -0.03434333466146606 + -0.03298161747745753 + -0.03147733587067356 + -0.02984416341024535 + -0.0280968442522217 + -0.02625102977190857 + -0.02432310600341163 + -0.02233001400939951 + -0.0202890653819517 + -0.01821775512422723 + -0.01613357418205645 + -0.01405382388429278 + -0.01199543451114901 + -0.009974790141468893 + -0.008007561834025706 + -0.006108551075948813 + -0.004291545285057393 + -0.002569186984358146 + -0.0009528580786604681 + 0.0005474195421422553 + 0.001923066068186814 + 0.003167007728954382 + 0.004273722111261321 + 0.00523926454371539 + 0.006061275500050979 + 0.006738969216376797 + 0.007273103954721746 + 0.007665934574189151 + 0.007921148288511145 + 0.008043784692005911 + 0.008040141322278481 + 0.007917666195128624 + 0.007684838892986746 + 0.00735104191105742 + 0.006926424063816509 + 0.00642175782754369 + 0.005848292541506266 + 0.005217605410943741 + 0.004541452249209852 + 0.003831619864751356 + 0.00309978194183994 + 0.002357360183266048 + 0.001615392380013164 + 0.0008844089490174289 + 0.0001743193375068114 + -0.0005056904666314445 + -0.001147248252024348 + -0.001742872846463813 + -0.002286037635939588 + -0.002771219849704404 + -0.003193935322674973 + -0.003550758648172445 + -0.003839328832932695 + -0.004058340759735646 + -0.004207522948301984 + -0.004287602279830852 + -0.00430025651244326 + -0.004248055561811813 + -0.004134392651607885 + -0.003963406550560174 + -0.003739896205660857 + -0.003469229153445805 + -0.003157245142691347 + -0.002810156432004902 + -0.002434446234645613 + -0.002036766770808102 + -0.001623838355148398 + -0.001202350895421991 + -0.0007788691078999633 + -0.0003597426681351431 + 4.897758671114329e-05 + 0.0004416164035860963 + 0.0008129429342058163 + 0.001158230894232211 + 0.001473309468396159 + 0.001754604517780124 + 0.001999169796903387 + 0.002204708040057977 + 0.002369581926295047 + 0.002492815078407196 + 0.002574083391145648 + 0.0026136971158406 + 0.002612574250807783 + 0.002572205897856949 + 0.00249461434350539 + 0.002382304707997752 + 0.002238211075031133 + 0.002065638069512017 + 0.001868198889304729 + 0.001649750819594217 + 0.001414329265246448 + 0.001166081327714817 + 0.0009091999291447868 + 0.0006478594481216453 + 0.0003861537799360089 + 0.0001280376704367042 + -0.0001227279022125848 + -0.0003626256078366383 + -0.0005884263088514236 + -0.0007972277700615969 + -0.0009864871379123437 + -0.001154046899825392 + -0.001298154141920757 + -0.001417473030717752 + -0.001511090549689093 + -0.001578515623252026 + -0.001619671857457259 + -0.001634884216933761 + -0.001624860040352571 + -0.00159066487072372 + -0.00153369364133737 + -0.001455637812376968 + -0.001358449096621754 + -0.001244300444855416 + -0.001115544982429432 + -0.0009746735978983282 + -0.000824271882933401 + -0.0006669771101848829 + -0.0005054359129148226 + -0.0003422632977266253 + -0.0001800035803687026 + -2.109378530311863e-05 + 0.0001321700064808015 + 0.0002776629389684176 + 0.0004134579362112899 + 0.0005378482454722768 + 0.0006493657553356388 + 0.0007467949491803551 + 0.0008291824277405987 + 0.0008958420064800141 + 0.0009463554630791429 + 0.0009805690764431031 + 0.0009985861603306612 + 0.001000755851137095 + 0.0009876584597926974 + 0.0009600877415469287 + 0.000919030474101246 + 0.0008656437637681078 + 0.0008012305208387395 + 0.0007272135590392521 + 0.000645108779875507 + 0.000556497900968934 + 0.0004630011784455728 + 0.000366250557447128 + 0.0002678636623760838 + 0.0001694190101474897 + 7.243279615690695e-05 + -2.166243538897482e-05 + -0.0001115369669204827 + -0.000195980703574832 + -0.0002739174115124617 + -0.0003444162681259722 + -0.0004067006422150834 + -0.0004601540702210986 + -0.0005043234414478702 + -0.0005389194501093795 + -0.0005638144143596589 + -0.0005790376015678585 + -0.0005847682344632429 + -0.0005813263839361631 + -0.0005691619808723874 + -0.0005488422011396883 + -0.0005210374945492773 + -0.0004865065401838346 + -0.0004460804169125375 + -0.0004006462792827283 + -0.0003511308254522837 + -0.0002984838356482691 + -0.0002436620471188746 + -0.0001876136150627973 + -0.0001312633890032869 + -7.549921099837517e-05 + -2.11594164548956e-05 + 3.097830932236811e-05 + 8.020659481283845e-05 + 0.0001258964721636328 + 0.0001675038296030591 + 0.0002045741928902604 + 0.0002367458317905824 + 0.0002637512158743521 + 0.0002854168706271633 + 0.0003016617095355856 + 0.0003124939401271255 + 0.0003180066616061862 + 0.0003183722885058197 + 0.0003138359484954939 + 0.0003047080130365348 + 0.0002913559269085423 + 0.0002741955067508387 + 0.0002536818797387624 + 0.0002303002314649904 + 0.0002045565271902877 + 0.0001769683630797799 + 0.0001480560941027055 + 0.0001183343732310123 + 8.830422273682008e-05 + 5.844574309182661e-05 + 2.921154855695988e-05 + 1.021001367446466e-06 + -2.574470118459365e-05 + -5.074655014992584e-05 + -7.369083961788525e-05 + -9.433137039859023e-05 + -0.0001124707564189372 + -0.0001279608625005723 + -0.000140702415810303 + -0.0001506438453893508 + -0.0001577794146271058 + -0.0001621467202360716 + -0.0001638236381350631 + -0.0001629248016241757 + -0.0001595977003420991 + -0.0001540184897749484 + -0.0001463876006107111 + -0.000136925235110304 + -0.0001258668340284108 + -0.0001134585926214485 + -9.99530981024649e-05 + -8.560515373469783e-05 + -7.066784679851552e-05 + -5.538890912794357e-05 + -4.000741000162236e-05 + -2.475081209436051e-05 + -9.832412147642465e-06 + 4.550820812408254e-06 + 1.822000532066115e-05 + 3.101570888773004e-05 + 4.279892170430388e-05 + 5.345165977858958e-05 + 6.287722019308122e-05 + 7.10001157651276e-05 + 7.77657200105732e-05 + 8.313965592669855e-05 + 8.710696373934461e-05 + 8.967108343167962e-05 + 9.085268764171233e-05 + 9.068839945428176e-05 + 8.922942780916201e-05 + 8.65401508018519e-05 + 8.269667417994688e-05 + 7.778538895546572e-05 + 7.190154838608245e-05 + 6.514788075089595e-05 + 5.763325048199691e-05 + 4.947137642943435e-05 + 4.077961244411042e-05 + 3.167779216011675e-05 + 2.228713693195696e-05 + 1.272922340541508e-05 + 3.125005230091648e-06 + + diff --git a/projects/cn0363/zed/filters/lpf.mat b/projects/cn0363/zed/filters/lpf.mat new file mode 100644 index 000000000..782a6781c --- /dev/null +++ b/projects/cn0363/zed/filters/lpf.mat @@ -0,0 +1,1031 @@ +# Created by Octave 3.6.2, Tue Apr 07 15:22:27 2015 CEST +# name: lpf +# type: matrix +# rows: 1024 +# columns: 1 + -7.666439125225637e-05 + -7.664080993357279e-05 + -7.660194154839633e-05 + -7.654773484510025e-05 + -7.647810768370583e-05 + -7.639294714071298e-05 + -7.629210965122736e-05 + -7.617542118829036e-05 + -7.604267747930242e-05 + -7.589364425940045e-05 + -7.572805756163156e-05 + -7.554562404373738e-05 + -7.534602135134586e-05 + -7.512889851733762e-05 + -7.489387639713724e-05 + -7.464054813965097e-05 + -7.436847969355525e-05 + -7.407721034861156e-05 + -7.376625331166557e-05 + -7.343509631696278e-05 + -7.308320227039018e-05 + -7.271000992723407e-05 + -7.231493460301714e-05 + -7.189736891696002e-05 + -7.145668356758737e-05 + -7.09922281399789e-05 + -7.050333194414127e-05 + -6.998930488395795e-05 + -6.944943835615047e-05 + -6.888300617866528e-05 + -6.82892655478753e-05 + -6.766745802396996e-05 + -6.701681054388235e-05 + -6.633653646108242e-05 + -6.562583661154623e-05 + -6.488390040518979e-05 + -6.410990694203671e-05 + -6.330302615236857e-05 + -6.246241996008887e-05 + -6.158724346850938e-05 + -6.067664616775467e-05 + -5.972977316295267e-05 + -5.874576642237135e-05 + -5.772376604463534e-05 + -5.666291154414286e-05 + -5.556234315378477e-05 + -5.442120314405009e-05 + -5.323863715758696e-05 + -5.201379555826929e-05 + -5.074583479380625e-05 + -4.943391877091438e-05 + -4.807722024205588e-05 + -4.667492220273466e-05 + -4.522621929832537e-05 + -4.373031923939543e-05 + -4.2186444224471e-05 + -4.059383236917738e-05 + -3.89517391406815e-05 + -3.725943879634016e-05 + -3.55162258254575e-05 + -3.372141639303509e-05 + -3.187434978439278e-05 + -2.997438984952531e-05 + -2.802092644604967e-05 + -2.60133768795939e-05 + -2.395118734046102e-05 + -2.183383433540162e-05 + -1.966082611331676e-05 + -1.743170408370795e-05 + -1.514604422668107e-05 + -1.280345849331294e-05 + -1.040359619517417e-05 + -7.946145381805854e-06 + -5.430834204940576e-06 + -2.857432268253136e-06 + -2.257519614277837e-07 + 2.464350222675652e-06 + 5.212972388974637e-06 + 8.020165960454412e-06 + 1.088593441901469e-05 + 1.381023206808761e-05 + 1.679296281824601e-05 + 1.983397899701165e-05 + 2.293308018407477e-05 + 2.6090012073131e-05 + 2.930446536153502e-05 + 3.257607466896927e-05 + 3.590441748631437e-05 + 3.928901315590509e-05 + 4.272932188434459e-05 + 4.622474378904549e-05 + 4.977461797965051e-05 + 5.337822167548099e-05 + 5.703476936014647e-05 + 6.074341197444035e-05 + 6.450323614862835e-05 + 6.831326347522968e-05 + 7.217244982336969e-05 + 7.607968469577301e-05 + 8.003379062944739e-05 + 8.403352264108949e-05 + 8.807756771823076e-05 + 9.216454435711964e-05 + 9.629300214831685e-05 + 0.0001004614214109609 + 0.0001046682128766397 + 0.0001089117174237819 + 0.0001131902058634574 + 0.0001175018787774562 + 0.0001218448664094851 + 0.0001262172286102983 + 0.000130616954837557 + 0.000135041964211174 + 0.0001394901056248835 + 0.0001439591579147406 + 0.0001484468300852254 + 0.0001529507615935998 + 0.0001574685226931326 + 0.0001619976148357708 + 0.0001665354711348129 + 0.0001710794568880961 + 0.000175626870162181 + 0.0001801749424379815 + 0.0001847208393182481 + 0.0001892616612972807 + 0.0001937944445932092 + 0.0001983161620431376 + 0.0002028237240614151 + 0.0002073139796612543 + 0.000211783717539876 + 0.0002162296672273251 + 0.0002206485002990527 + 0.0002250368316523253 + 0.0002293912208464744 + 0.0002337081735069605 + 0.0002379841427931786 + 0.0002422155309298929 + 0.0002463986908021387 + 0.0002505299276133899 + 0.0002546055006067404 + 0.0002586216248488068 + 0.0002625744730760084 + 0.0002664601776028395 + 0.0002702748322916994 + 0.0002740144945837958 + 0.0002776751875905976 + 0.000281252902245258 + 0.000284743599513383 + 0.0002881432126624766 + 0.0002914476495893406 + 0.0002946527952046598 + 0.0002977545138739596 + 0.0003007486519140663 + 0.0003036310401441605 + 0.0003063974964904614 + 0.0003090438286435289 + 0.0003115658367671298 + 0.000313959316257558 + 0.0003162200605522556 + 0.0003183438639865323 + 0.0003203265246971343 + 0.0003221638475713638 + 0.0003238516472404054 + 0.0003253857511154688 + 0.0003267620024653101 + 0.0003279762635336478 + 0.0003290244186949463 + 0.0003299023776469888 + 0.0003306060786386288 + 0.0003311314917310477 + 0.0003314746220908206 + 0.0003316315133130395 + 0.0003315982507726998 + 0.000331370965002523 + 0.0003309458350953385 + 0.0003303190921291142 + 0.0003294870226126844 + 0.0003284459719501812 + 0.0003271923479221478 + 0.0003257226241812644 + 0.0003240333437605909 + 0.0003221211225921913 + 0.000319982653033973 + 0.0003176147074025418 + 0.000315014141509841 + 0.0003121778982013146 + 0.0003091030108933058 + 0.0003057866071073704 + 0.0003022259119991643 + 0.0002984182518795363 + 0.0002943610577254282 + 0.000290051868678175 + 0.000285488335526761 + 0.0002806682241735797 + 0.0002755894190802226 + 0.0002702499266908029 + 0.0002646478788303118 + 0.0002587815360754806 + 0.0002526492910956231 + 0.0002462496719609062 + 0.0002395813454155062 + 0.0002326431201130793 + 0.0002254339498119898 + 0.0002179529365277201 + 0.0002101993336398923 + 0.0002021725489513284 + 0.0001938721476965728 + 0.0001852978554973135 + 0.0001764495612621316 + 0.0001673273200280232 + 0.0001579313557411397 + 0.0001482620639742112 + 0.0001383200145781157 + 0.0001281059542650866 + 0.0001176208091210515 + 0.0001068656870446235 + 9.584188011027968e-05 + 8.455086685328201e-05 + 7.299431447392405e-05 + 6.11740809587053e-05 + 4.909221711606461e-05 + 3.675096852433416e-05 + 2.41527773896019e-05 + 1.130028431120453e-05 + -1.803670047387048e-06 + -1.515604338450846e-05 + -2.875359028522502e-05 + -4.25928608473799e-05 + -5.667019941084606e-05 + -7.098174339203329e-05 + -8.552342222564616e-05 + -0.0001002909564156497 + -0.0001152798566973419 + -0.000130485423312391 + -0.0001459027453986369 + -0.0001615267004963995 + -0.0001773519541729955 + -0.0001933729597670833 + -0.0002095839582544219 + -0.0002259789782365526 + -0.0002425518360538524 + -0.0002592961360243488 + -0.000276205270809619 + -0.0002932724219090211 + -0.0003104905602834502 + -0.0003278524471097271 + -0.0003453506346666702 + -0.0003629774673538175 + -0.0003807250828436909 + -0.000398585413368433 + -0.0004165501871415522 + -0.0004346109299154421 + -0.0004527589666752642 + -0.0004709854234696974 + -0.0004892812293789796 + -0.0005076371186205769 + -0.0005260436327927453 + -0.0005444911232561525 + -0.000562969753653648 + -0.0005814695025681823 + -0.0005999801663187858 + -0.0006184913618944371 + -0.0006369925300255543 + -0.0006554729383927542 + -0.0006739216849724398 + -0.0006923277015186845 + -0.0007106797571807786 + -0.0007289664622557363 + -0.0007471762720749435 + -0.0007652974910240519 + -0.0007833182766951286 + -0.000801226644169974 + -0.0008190104704334322 + -0.00083665749891542 + -0.0008541553441603262 + -0.0008714914966223039 + -0.0008886533275849289 + -0.0009056280942035765 + -0.0009224029446687823 + -0.0009389649234887717 + -0.0009553009768892375 + -0.0009713979583283654 + -0.0009872426341250113 + -0.001002821689197845 + -0.001018121732913189 + -0.001033129305039185 + -0.001047830881803857 + -0.001062212882054512 + -0.001076261673515871 + -0.001089963579144232 + -0.001103304883574856 + -0.001116271839659731 + -0.001128850675092736 + -0.001141027599119194 + -0.001152788809326694 + -0.001164120498513996 + -0.001175008861634751 + -0.001185440102812716 + -0.001195400442425033 + -0.001204876124250101 + -0.001213853422676495 + -0.001222318649969311 + -0.001230258163590246 + -0.001237658373567686 + -0.00124450574991297 + -0.001250786830078976 + -0.001256488226457108 + -0.001261596633908681 + -0.001266098837326689 + -0.00126998171922386 + -0.001273232267342867 + -0.001275837582284506 + -0.001277784885149614 + -0.001279061525190474 + -0.001279654987467369 + -0.001279552900505973 + -0.001278743043951172 + -0.001277213356212915 + -0.001274951942099657 + -0.001271947080434913 + -0.001268187231652445 + -0.001263661045365559 + -0.001258357367905981 + -0.001252265249827775 + -0.00124537395337172 + -0.0012376729598856 + -0.001229151977195814 + -0.001219800946925719 + -0.001209610051756147 + -0.001198569722623476 + -0.001186670645850714 + -0.001173903770206997 + -0.001160260313890957 + -0.001145731771433408 + -0.001130309920514814 + -0.001113986828693038 + -0.001096754860036874 + -0.001078606681660899 + -0.001059535270157219 + -0.00103953391791969 + -0.001018596239356253 + -0.00099671617698505 + -0.0009738880074100344 + -0.0009501063471718091 + -0.0009253661584695099 + -0.0008996627547495688 + -0.0008729918061572641 + -0.0008453493448470059 + -0.000816731770147366 + -0.0007871358535769421 + -0.0007565587437071706 + -0.0007249979708683094 + -0.0006924514516948547 + -0.0006589174935067422 + -0.0006243947985227489 + -0.0005888824679025957 + -0.0005523800056143269 + -0.0005148873221236361 + -0.0004764047379018697 + -0.0004369329867495575 + -0.0003964732189323897 + -0.0003550270041266602 + -0.0003125963341712827 + -0.000269183625623609 + -0.0002247917221163395 + -0.0001794238965129579 + -0.0001330838528591947 + -8.577572812815805e-05 + -3.750409375685609e-05 + 1.172604302804532e-05 + 6.190923809725785e-05 + 0.0001130396095206529 + 0.0001651108368855734 + 0.0002181161608333905 + 0.0002720483828158706 + 0.0003268998650728044 + 0.0003826625308322332 + 0.000439327864734475 + 0.0004968869134810245 + 0.000555330286709293 + 0.0006146481580940005 + 0.0006748302666759188 + 0.0007358659184185406 + 0.0007977439879930851 + 0.0008604529207921685 + 0.0009239807351722869 + 0.0009883150249251551 + 0.001053442961977801 + 0.001119351299321177 + 0.001186026374166914 + 0.00125345411133173 + 0.001321620026848826 + 0.001390509231805497 + 0.001460106436406062 + 0.001530395954259031 + 0.001601361706887341 + 0.001672987228460324 + 0.001745255670745957 + 0.001818149808281787 + 0.001891652043762802 + 0.001965744413644387 + 0.00204040859395835 + 0.002115625906339899 + 0.002191377324263295 + 0.002267643479483773 + 0.00234440466868322 + 0.002421640860316937 + 0.002499331701658693 + 0.002577456526041167 + 0.002655994360288731 + 0.002734923932339397 + 0.002814223679052653 + 0.002893871754199768 + 0.002973846036633037 + 0.003054124138630309 + 0.003134683414411046 + 0.003215500968820019 + 0.003296553666174647 + 0.003377818139271889 + 0.003459270798550468 + 0.003540887841404104 + 0.00362264526164134 + 0.003704518859087449 + 0.00378648424932378 + 0.003868516873559835 + 0.003950592008633266 + 0.004032684777132899 + 0.004114770157639768 + 0.004196822995081107 + 0.00427881801119213 + 0.004360729815080368 + 0.004442532913887238 + 0.004524201723541454 + 0.004605710579598843 + 0.004687033748163003 + 0.004768145436881257 + 0.004849019806010197 + 0.004929630979545155 + 0.005009953056407828 + 0.005089960121686223 + 0.005169626257921069 + 0.005248925556432816 + 0.005327832128683227 + 0.00540632011766564 + 0.005484363709317823 + 0.005561937143951415 + 0.005639014727691895 + 0.005715570843922929 + 0.005791579964729044 + 0.005867016662330469 + 0.005941855620504012 + 0.006016071645983832 + 0.006089639679835956 + 0.006162534808800384 + 0.006234732276594659 + 0.006306207495172744 + 0.00637693605593308 + 0.006446893740869742 + 0.006516056533660578 + 0.006584400630686262 + 0.006651902451974248 + 0.006718538652061565 + 0.006784286130770542 + 0.006849122043891463 + 0.006913023813766303 + 0.00697596913976764 + 0.007037936008667028 + 0.007098902704886967 + 0.007158847820630885 + 0.007217750265885416 + 0.007275589278289467 + 0.007332344432864527 + 0.007387995651600794 + 0.007442523212893796 + 0.007495907760826163 + 0.007548130314289408 + 0.007599172275940572 + 0.007649015440988691 + 0.007697642005806182 + 0.00774503457636026 + 0.00779117617645968 + 0.007836050255812113 + 0.007879640697887645 + 0.007921931827583923 + 0.007962908418688644 + 0.008002555701135151 + 0.008040859368047036 + 0.008077805582567738 + 0.008113380984471275 + 0.008147572696550398 + 0.008180368330778445 + 0.008211755994241503 + 0.008241724294837421 + 0.00827026234673847 + 0.008297359775614551 + 0.008323006723613947 + 0.008347193854098791 + 0.008369912356132563 + 0.008391153948717036 + 0.008410910884776293 + 0.008429175954885473 + 0.008445942490742186 + 0.008461204368378579 + 0.00847495601111223 + 0.008487192392234144 + 0.008497909037432406 + 0.00850710202695 + 0.008514767997475628 + 0.008520904143766413 + 0.008525508220001598 + 0.008528578540866399 + 0.008530113982365476 + 0.008530113982365476 + 0.0085285785408664 + 0.008525508220001598 + 0.008520904143766415 + 0.008514767997475628 + 0.00850710202695 + 0.008497909037432406 + 0.008487192392234144 + 0.00847495601111223 + 0.008461204368378581 + 0.008445942490742186 + 0.008429175954885472 + 0.008410910884776295 + 0.008391153948717036 + 0.008369912356132561 + 0.008347193854098791 + 0.008323006723613947 + 0.008297359775614551 + 0.008270262346738465 + 0.008241724294837421 + 0.008211755994241504 + 0.008180368330778445 + 0.008147572696550398 + 0.008113380984471275 + 0.008077805582567736 + 0.008040859368047036 + 0.008002555701135151 + 0.007962908418688644 + 0.007921931827583923 + 0.007879640697887645 + 0.007836050255812113 + 0.007791176176459681 + 0.007745034576360261 + 0.007697642005806183 + 0.007649015440988691 + 0.007599172275940573 + 0.007548130314289408 + 0.007495907760826162 + 0.007442523212893796 + 0.007387995651600795 + 0.007332344432864527 + 0.007275589278289468 + 0.007217750265885416 + 0.007158847820630882 + 0.007098902704886967 + 0.00703793600866703 + 0.00697596913976764 + 0.006913023813766301 + 0.006849122043891467 + 0.006784286130770542 + 0.006718538652061566 + 0.006651902451974247 + 0.006584400630686266 + 0.006516056533660578 + 0.006446893740869741 + 0.00637693605593308 + 0.006306207495172744 + 0.00623473227659466 + 0.006162534808800384 + 0.006089639679835956 + 0.006016071645983832 + 0.005941855620504012 + 0.005867016662330468 + 0.005791579964729045 + 0.00571557084392293 + 0.005639014727691896 + 0.005561937143951416 + 0.005484363709317823 + 0.005406320117665641 + 0.005327832128683227 + 0.005248925556432816 + 0.005169626257921069 + 0.005089960121686224 + 0.005009953056407831 + 0.004929630979545155 + 0.004849019806010197 + 0.004768145436881257 + 0.004687033748163004 + 0.004605710579598843 + 0.004524201723541454 + 0.004442532913887239 + 0.00436072981508037 + 0.00427881801119213 + 0.004196822995081107 + 0.00411477015763977 + 0.0040326847771329 + 0.003950592008633266 + 0.003868516873559834 + 0.00378648424932378 + 0.00370451885908745 + 0.003622645261641341 + 0.003540887841404104 + 0.003459270798550469 + 0.003377818139271889 + 0.003296553666174647 + 0.003215500968820019 + 0.003134683414411047 + 0.003054124138630309 + 0.002973846036633037 + 0.002893871754199768 + 0.002814223679052653 + 0.002734923932339398 + 0.002655994360288732 + 0.002577456526041167 + 0.002499331701658692 + 0.002421640860316937 + 0.00234440466868322 + 0.002267643479483773 + 0.002191377324263295 + 0.0021156259063399 + 0.00204040859395835 + 0.001965744413644387 + 0.001891652043762802 + 0.001818149808281787 + 0.001745255670745957 + 0.001672987228460324 + 0.001601361706887341 + 0.001530395954259031 + 0.001460106436406062 + 0.001390509231805496 + 0.001321620026848826 + 0.001253454111331731 + 0.001186026374166914 + 0.001119351299321176 + 0.001053442961977802 + 0.0009883150249251555 + 0.0009239807351722862 + 0.0008604529207921684 + 0.0007977439879930853 + 0.0007358659184185406 + 0.0006748302666759195 + 0.0006146481580940005 + 0.0005553302867092933 + 0.0004968869134810249 + 0.000439327864734475 + 0.0003826625308322333 + 0.0003268998650728041 + 0.0002720483828158704 + 0.0002181161608333911 + 0.000165110836885574 + 0.0001130396095206529 + 6.190923809725763e-05 + 1.172604302804488e-05 + -3.750409375685577e-05 + -8.577572812815797e-05 + -0.0001330838528591943 + -0.0001794238965129574 + -0.0002247917221163394 + -0.0002691836256236092 + -0.0003125963341712831 + -0.0003550270041266598 + -0.00039647321893239 + -0.000436932986749557 + -0.0004764047379018694 + -0.0005148873221236361 + -0.000552380005614327 + -0.000588882467902595 + -0.0006243947985227491 + -0.0006589174935067423 + -0.0006924514516948548 + -0.0007249979708683094 + -0.0007565587437071711 + -0.0007871358535769426 + -0.0008167317701473662 + -0.0008453493448470061 + -0.0008729918061572647 + -0.0008996627547495694 + -0.0009253661584695104 + -0.0009501063471718096 + -0.0009738880074100353 + -0.0009967161769850502 + -0.001018596239356252 + -0.001039533917919691 + -0.001059535270157221 + -0.001078606681660899 + -0.001096754860036874 + -0.001113986828693039 + -0.001130309920514814 + -0.001145731771433408 + -0.001160260313890957 + -0.001173903770206998 + -0.001186670645850715 + -0.001198569722623476 + -0.001209610051756147 + -0.00121980094692572 + -0.001229151977195814 + -0.001237672959885602 + -0.001245373953371721 + -0.001252265249827776 + -0.001258357367905982 + -0.001263661045365559 + -0.001268187231652445 + -0.001271947080434913 + -0.001274951942099657 + -0.001277213356212915 + -0.001278743043951172 + -0.001279552900505973 + -0.001279654987467369 + -0.001279061525190474 + -0.001277784885149615 + -0.001275837582284507 + -0.001273232267342868 + -0.00126998171922386 + -0.001266098837326688 + -0.001261596633908681 + -0.001256488226457109 + -0.001250786830078977 + -0.00124450574991297 + -0.001237658373567687 + -0.001230258163590247 + -0.001222318649969311 + -0.001213853422676494 + -0.001204876124250102 + -0.001195400442425034 + -0.001185440102812716 + -0.00117500886163475 + -0.001164120498513996 + -0.001152788809326694 + -0.001141027599119193 + -0.001128850675092737 + -0.001116271839659732 + -0.001103304883574857 + -0.001089963579144232 + -0.001076261673515872 + -0.001062212882054512 + -0.001047830881803857 + -0.001033129305039185 + -0.001018121732913189 + -0.001002821689197846 + -0.0009872426341250118 + -0.0009713979583283656 + -0.0009553009768892374 + -0.0009389649234887726 + -0.0009224029446687826 + -0.0009056280942035766 + -0.000888653327584929 + -0.0008714914966223039 + -0.0008541553441603265 + -0.0008366574989154199 + -0.0008190104704334325 + -0.0008012266441699743 + -0.0007833182766951288 + -0.0007652974910240517 + -0.0007471762720749435 + -0.0007289664622557365 + -0.0007106797571807783 + -0.0006923277015186846 + -0.0006739216849724398 + -0.0006554729383927541 + -0.0006369925300255544 + -0.0006184913618944377 + -0.0005999801663187856 + -0.0005814695025681824 + -0.0005629697536536486 + -0.0005444911232561528 + -0.0005260436327927454 + -0.0005076371186205768 + -0.0004892812293789797 + -0.0004709854234696972 + -0.0004527589666752642 + -0.0004346109299154424 + -0.0004165501871415528 + -0.0003985854133684331 + -0.0003807250828436908 + -0.0003629774673538178 + -0.000345350634666671 + -0.0003278524471097271 + -0.0003104905602834501 + -0.0002932724219090216 + -0.0002762052708096192 + -0.0002592961360243487 + -0.0002425518360538524 + -0.0002259789782365531 + -0.0002095839582544219 + -0.0001933729597670831 + -0.0001773519541729955 + -0.0001615267004963998 + -0.0001459027453986367 + -0.0001304854233123912 + -0.0001152798566973419 + -0.0001002909564156498 + -8.552342222564625e-05 + -7.098174339203336e-05 + -5.667019941084625e-05 + -4.259286084737983e-05 + -2.875359028522511e-05 + -1.515604338450849e-05 + -1.803670047387128e-06 + 1.130028431120475e-05 + 2.415277738960176e-05 + 3.675096852433439e-05 + 4.909221711606472e-05 + 6.11740809587055e-05 + 7.29943144739241e-05 + 8.45508668532821e-05 + 9.584188011027983e-05 + 0.0001068656870446237 + 0.0001176208091210519 + 0.0001281059542650868 + 0.0001383200145781161 + 0.0001482620639742115 + 0.0001579313557411397 + 0.0001673273200280231 + 0.0001764495612621317 + 0.0001852978554973136 + 0.000193872147696573 + 0.0002021725489513286 + 0.0002101993336398927 + 0.0002179529365277203 + 0.0002254339498119901 + 0.0002326431201130794 + 0.0002395813454155063 + 0.0002462496719609065 + 0.0002526492910956231 + 0.0002587815360754808 + 0.000264647878830312 + 0.0002702499266908033 + 0.0002755894190802225 + 0.00028066822417358 + 0.0002854883355267612 + 0.0002900518686781749 + 0.0002943610577254282 + 0.0002984182518795361 + 0.0003022259119991641 + 0.00030578660710737 + 0.0003091030108933058 + 0.0003121778982013148 + 0.0003150141415098411 + 0.0003176147074025417 + 0.0003199826530339729 + 0.0003221211225921912 + 0.0003240333437605909 + 0.0003257226241812644 + 0.0003271923479221477 + 0.0003284459719501813 + 0.0003294870226126841 + 0.0003303190921291141 + 0.0003309458350953384 + 0.0003313709650025234 + 0.0003315982507727001 + 0.0003316315133130395 + 0.0003314746220908208 + 0.0003311314917310473 + 0.0003306060786386287 + 0.0003299023776469887 + 0.0003290244186949465 + 0.0003279762635336479 + 0.0003267620024653101 + 0.0003253857511154689 + 0.0003238516472404056 + 0.0003221638475713636 + 0.0003203265246971345 + 0.0003183438639865326 + 0.0003162200605522556 + 0.000313959316257558 + 0.0003115658367671301 + 0.000309043828643529 + 0.0003063974964904612 + 0.0003036310401441607 + 0.0003007486519140665 + 0.0002977545138739598 + 0.0002946527952046598 + 0.0002914476495893405 + 0.0002881432126624766 + 0.0002847435995133827 + 0.0002812529022452582 + 0.000277675187590598 + 0.0002740144945837959 + 0.0002702748322916994 + 0.0002664601776028395 + 0.0002625744730760084 + 0.0002586216248488071 + 0.0002546055006067406 + 0.0002505299276133901 + 0.0002463986908021388 + 0.0002422155309298927 + 0.0002379841427931785 + 0.0002337081735069605 + 0.0002293912208464748 + 0.0002250368316523253 + 0.0002206485002990527 + 0.0002162296672273252 + 0.0002117837175398762 + 0.0002073139796612541 + 0.0002028237240614154 + 0.0001983161620431378 + 0.0001937944445932091 + 0.0001892616612972807 + 0.000184720839318248 + 0.0001801749424379816 + 0.0001756268701621808 + 0.0001710794568880962 + 0.0001665354711348131 + 0.000161997614835771 + 0.0001574685226931325 + 0.0001529507615935998 + 0.0001484468300852254 + 0.0001439591579147405 + 0.0001394901056248837 + 0.000135041964211174 + 0.0001306169548375571 + 0.0001262172286102981 + 0.000121844866409485 + 0.0001175018787774563 + 0.0001131902058634576 + 0.0001089117174237818 + 0.0001046682128766398 + 0.0001004614214109609 + 9.629300214831676e-05 + 9.21645443571196e-05 + 8.807756771823067e-05 + 8.403352264108956e-05 + 8.003379062944741e-05 + 7.607968469577309e-05 + 7.217244982336961e-05 + 6.831326347522972e-05 + 6.450323614862839e-05 + 6.074341197444045e-05 + 5.703476936014648e-05 + 5.337822167548092e-05 + 4.977461797965057e-05 + 4.622474378904563e-05 + 4.272932188434466e-05 + 3.928901315590507e-05 + 3.590441748631441e-05 + 3.257607466896928e-05 + 2.930446536153499e-05 + 2.609001207313101e-05 + 2.293308018407485e-05 + 1.983397899701166e-05 + 1.679296281824601e-05 + 1.381023206808762e-05 + 1.088593441901467e-05 + 8.020165960454449e-06 + 5.212972388974517e-06 + 2.46435022267566e-06 + -2.257519614277838e-07 + -2.857432268253191e-06 + -5.430834204940637e-06 + -7.946145381805857e-06 + -1.040359619517416e-05 + -1.280345849331294e-05 + -1.514604422668101e-05 + -1.743170408370784e-05 + -1.966082611331683e-05 + -2.183383433540153e-05 + -2.395118734046097e-05 + -2.601337687959397e-05 + -2.802092644604966e-05 + -2.997438984952526e-05 + -3.187434978439294e-05 + -3.372141639303506e-05 + -3.551622582545754e-05 + -3.725943879634015e-05 + -3.895173914068149e-05 + -4.059383236917744e-05 + -4.218644422447087e-05 + -4.373031923939543e-05 + -4.522621929832538e-05 + -4.667492220273468e-05 + -4.807722024205581e-05 + -4.94339187709144e-05 + -5.074583479380634e-05 + -5.201379555826918e-05 + -5.323863715758702e-05 + -5.442120314405017e-05 + -5.556234315378483e-05 + -5.666291154414294e-05 + -5.772376604463534e-05 + -5.874576642237135e-05 + -5.972977316295263e-05 + -6.067664616775477e-05 + -6.158724346850942e-05 + -6.246241996008881e-05 + -6.330302615236853e-05 + -6.410990694203663e-05 + -6.488390040518976e-05 + -6.562583661154624e-05 + -6.633653646108241e-05 + -6.701681054388239e-05 + -6.766745802396999e-05 + -6.82892655478753e-05 + -6.888300617866535e-05 + -6.944943835615051e-05 + -6.9989304883958e-05 + -7.050333194414127e-05 + -7.099222813997901e-05 + -7.145668356758737e-05 + -7.189736891695998e-05 + -7.231493460301713e-05 + -7.27100099272341e-05 + -7.308320227039021e-05 + -7.343509631696271e-05 + -7.376625331166561e-05 + -7.407721034861151e-05 + -7.436847969355524e-05 + -7.464054813965105e-05 + -7.489387639713717e-05 + -7.512889851733762e-05 + -7.534602135134581e-05 + -7.554562404373735e-05 + -7.572805756163161e-05 + -7.589364425940049e-05 + -7.604267747930248e-05 + -7.617542118829036e-05 + -7.629210965122737e-05 + -7.6392947140713e-05 + -7.647810768370579e-05 + -7.654773484510036e-05 + -7.660194154839626e-05 + -7.664080993357286e-05 + -7.666439125225632e-05 + + diff --git a/projects/cn0363/zed/system_bd.tcl b/projects/cn0363/zed/system_bd.tcl new file mode 100644 index 000000000..b769b2a63 --- /dev/null +++ b/projects/cn0363/zed/system_bd.tcl @@ -0,0 +1,300 @@ + +source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl + +proc load_fir_filter_vector {filter_file} { + set fp [open $filter_file r] + set data [split [read $fp] "\n"] + set filter "" + close $fp + foreach line $data { + set line [string trim $line] + if {[string equal -length 1 $line "#"] || $line eq ""} { + continue + } + if {$filter ne ""} { + append filter "," + } + append filter $line + } + + return $filter +} + +set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {35}] $sys_ps7 + +set_property LEFT 34 [get_bd_ports GPIO_I] +set_property LEFT 34 [get_bd_ports GPIO_O] +set_property LEFT 34 [get_bd_ports GPIO_T] + +set axi_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_dma] +set_property -dict [list \ + CONFIG.C_FIFO_SIZE 2 \ + CONFIG.C_DMA_TYPE_SRC 2 \ + CONFIG.C_DMA_TYPE_DEST 0 \ + CONFIG.C_CYCLIC 0 \ + CONFIG.C_SYNC_TRANSFER_START 1 \ + CONFIG.C_AXI_SLICE_SRC 0 \ + CONFIG.C_AXI_SLICE_DEST 0 \ + CONFIG.C_CLKS_ASYNC_DEST_REQ 0 \ + CONFIG.C_CLKS_ASYNC_SRC_DEST 0 \ + CONFIG.C_CLKS_ASYNC_REQ_SRC 0 \ + CONFIG.C_2D_TRANSFER 0 \ + CONFIG.C_DMA_DATA_WIDTH_SRC 32 \ + CONFIG.C_DMA_DATA_WIDTH_DEST 64 \ + CONFIG.C_DMA_AXI_PROTOCOL_DEST 1 \ + ] $axi_dma + +# Create SPI engine controller with offload +create_bd_cell -type hier spi +current_bd_instance /spi + + create_bd_pin -dir I -type clk clk + create_bd_pin -dir I -type rst resetn + create_bd_pin -dir O conv_done + create_bd_pin -dir O irq + create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE + + set spi_engine [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_execution:1.0 execution] + set axi_spi_engine [create_bd_cell -type ip -vlnv analog.com:user:axi_spi_engine:1.0 axi] + set spi_engine_offload [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_offload:1.0 offload] + set spi_engine_interconnect [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_interconnect:1.0 interconnect] + set util_sigma_delta_spi [create_bd_cell -type ip -vlnv analog.com:user:util_sigma_delta_spi:1.0 util_sigma_delta_spi] + + set_property -dict [list CONFIG.NUM_CS 2] $spi_engine + + set_property -dict [list CONFIG.NUM_CS 2] $util_sigma_delta_spi + + ad_connect axi/spi_engine_offload_ctrl0 offload/spi_engine_offload_ctrl + ad_connect offload/spi_engine_ctrl interconnect/s0_ctrl + ad_connect axi/spi_engine_ctrl interconnect/s1_ctrl + ad_connect interconnect/m_ctrl execution/ctrl + ad_connect offload/offload_sdi M_AXIS_SAMPLE + + ad_connect util_sigma_delta_spi/data_ready offload/trigger + ad_connect util_sigma_delta_spi/data_ready conv_done + + ad_connect execution/active util_sigma_delta_spi/spi_active + ad_connect execution/spi util_sigma_delta_spi/s_spi + ad_connect util_sigma_delta_spi/m_spi m_spi + + connect_bd_net \ + [get_bd_pins clk] \ + [get_bd_pins offload/spi_clk] \ + [get_bd_pins offload/ctrl_clk] \ + [get_bd_pins execution/clk] \ + [get_bd_pins axi/s_axi_aclk] \ + [get_bd_pins axi/spi_clk] \ + [get_bd_pins interconnect/clk] \ + [get_bd_pins util_sigma_delta_spi/clk] + + connect_bd_net \ + [get_bd_pins axi/spi_resetn] \ + [get_bd_pins offload/spi_resetn] \ + [get_bd_pins execution/resetn] \ + [get_bd_pins interconnect/resetn] \ + [get_bd_pins util_sigma_delta_spi/resetn] + + connect_bd_net [get_bd_pins resetn] [get_bd_pins axi/s_axi_aresetn] + ad_connect irq axi/irq + +current_bd_instance / + +create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 spi +ad_connect spi/m_spi spi + +set phase_gen [create_bd_cell -type ip -vlnv xilinx.com:ip:c_counter_binary:12.0 phase_gen] +set phase_slice [create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 phase_slice] +create_bd_port -dir O excitation + +set excitation_freq 1020 + +set_property -dict [list \ + CONFIG.Output_Width 32 \ + CONFIG.Increment_Value [format "%x" [expr $excitation_freq * (1<<32) / 100000000]] \ + ] $phase_gen + +set_property -dict [list \ + CONFIG.DIN_TO {31} \ + CONFIG.DIN_FROM {31} \ + CONFIG.DOUT_WIDTH {1} \ + ] $phase_slice + +ad_connect /phase_gen/Q /phase_slice/Din +ad_connect /phase_slice/Dout excitation + +create_bd_cell -type hier processing +current_bd_instance /processing + + create_bd_pin -dir I -type clk clk + create_bd_pin -dir I -type rst resetn + create_bd_pin -dir I conv_done + create_bd_pin -dir I -from 31 -to 0 phase + create_bd_pin -dir O overflow + create_bd_pin -dir I -from 13 -to 0 channel_enable + create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 S_AXIS_SAMPLE + create_bd_intf_pin -mode Master -vlnv analog.com:interface:fifo_wr_rtl:1.0 DMA_WR + + create_bd_cell -type ip -vlnv analog.com:user:cn0363_phase_data_sync:1.0 phase_data_sync + create_bd_cell -type ip -vlnv analog.com:user:cn0363_dma_sequencer:1.0 sequencer + create_bd_cell -type ip -vlnv analog.com:user:cordic_demod:1.0 cordic_demod + + create_bd_cell -type ip -vlnv xilinx.com:ip:axis_broadcaster:1.1 phase_broadcast + create_bd_cell -type ip -vlnv xilinx.com:ip:axis_broadcaster:1.1 sample_broadcast + create_bd_cell -type ip -vlnv xilinx.com:ip:axis_broadcaster:1.1 sample_filtered_broadcast + create_bd_cell -type ip -vlnv xilinx.com:ip:axis_broadcaster:1.1 i_q_broadcast + create_bd_cell -type ip -vlnv xilinx.com:ip:axis_combiner:1.1 phase_sample_combine + set i_q_resize [create_bd_cell -type ip -vlnv analog.com:user:util_axis_resize:1.0 i_q_resize] + + set_property -dict [list \ + CONFIG.C_M_DATA_WIDTH 32 \ + CONFIG.C_S_DATA_WIDTH 64 \ + ] $i_q_resize + + set hpf [create_bd_cell -type ip -vlnv xilinx.com:ip:fir_compiler:7.2 hpf] + set lpf [create_bd_cell -type ip -vlnv xilinx.com:ip:fir_compiler:7.2 lpf] + + set_property -dict [list \ + CONFIG.Data_Fractional_Bits.VALUE_SRC USER \ + CONFIG.Data_Sign.VALUE_SRC USER \ + CONFIG.Data_Width.VALUE_SRC USER \ + CONFIG.M_DATA_Has_TREADY true \ + CONFIG.Number_Channels 2 \ + CONFIG.Sample_Frequency 0.025 \ + CONFIG.Clock_Frequency 100 \ + CONFIG.Coefficient_Width 16 \ + CONFIG.Data_Width 24 \ + CONFIG.Output_Width 32 \ + CONFIG.Output_Rounding_Mode Truncate_LSBs \ + CONFIG.Has_ARESETn true \ + CONFIG.Reset_Data_Vector false \ + CONFIG.CoefficientVector [load_fir_filter_vector "filters/hpf.mat"] \ + ] $hpf + + set_property -dict [list \ + CONFIG.Data_Fractional_Bits.VALUE_SRC USER \ + CONFIG.Data_Sign.VALUE_SRC USER \ + CONFIG.Data_Width.VALUE_SRC USER \ + CONFIG.M_DATA_Has_TREADY true \ + CONFIG.Number_Channels 4 \ + CONFIG.Sample_Frequency 0.025 \ + CONFIG.Clock_Frequency 100 \ + CONFIG.Coefficient_Width 24 \ + CONFIG.Data_Width 32 \ + CONFIG.Output_Width 32 \ + CONFIG.Output_Rounding_Mode Truncate_LSBs \ + CONFIG.Has_ARESETn true \ + CONFIG.Reset_Data_Vector false \ + CONFIG.CoefficientVector [load_fir_filter_vector "filters/lpf.mat"] \ + ] $lpf + + set overflow_or [create_bd_cell -type ip -vlnv xilinx.com:ip:util_vector_logic:2.0 overflow_or] + set_property -dict [list \ + CONFIG.C_SIZE 1 \ + CONFIG.C_OPERATION {or} \ + ] $overflow_or + + ad_connect S_AXIS_SAMPLE phase_data_sync/S_AXIS_SAMPLE + ad_connect conv_done phase_data_sync/conv_done + ad_connect phase phase_data_sync/phase + + ad_connect phase_data_sync/M_AXIS_PHASE phase_broadcast/S_AXIS + ad_connect phase_broadcast/M00_AXIS sequencer/phase + ad_connect phase_broadcast/M01_AXIS phase_sample_combine/S01_AXIS + + ad_connect phase_data_sync/M_AXIS_SAMPLE sample_broadcast/S_AXIS + ad_connect sample_broadcast/M00_AXIS sequencer/data + ad_connect sample_broadcast/M01_AXIS hpf/S_AXIS_DATA + + ad_connect hpf/M_AXIS_DATA sample_filtered_broadcast/S_AXIS + ad_connect sample_filtered_broadcast/M00_AXIS sequencer/data_filtered + ad_connect sample_filtered_broadcast/M01_AXIS phase_sample_combine/S00_AXIS + + ad_connect phase_sample_combine/M_AXIS cordic_demod/S_AXIS + ad_connect cordic_demod/M_AXIS i_q_resize/s_axis + + ad_connect i_q_resize/m_axis i_q_broadcast/S_AXIS + ad_connect i_q_broadcast/M00_AXIS sequencer/i_q + ad_connect i_q_broadcast/M01_AXIS lpf/S_AXIS_DATA + + ad_connect lpf/M_AXIS_DATA sequencer/i_q_filtered + + connect_bd_net \ + [get_bd_pins clk] \ + [get_bd_pins phase_data_sync/clk] \ + [get_bd_pins sequencer/clk] \ + [get_bd_pins cordic_demod/clk] \ + [get_bd_pins phase_broadcast/aclk] \ + [get_bd_pins sample_broadcast/aclk] \ + [get_bd_pins sample_filtered_broadcast/aclk] \ + [get_bd_pins i_q_broadcast/aclk] \ + [get_bd_pins phase_sample_combine/aclk] \ + [get_bd_pins i_q_resize/clk] \ + [get_bd_pins hpf/aclk] \ + [get_bd_pins lpf/aclk] + + connect_bd_net \ + [get_bd_pins resetn] \ + [get_bd_pins sequencer/resetn] \ + [get_bd_pins phase_data_sync/resetn] \ + + connect_bd_net \ + [get_bd_pins sequencer/processing_resetn] \ + [get_bd_pins phase_data_sync/processing_resetn] \ + [get_bd_pins cordic_demod/resetn] \ + [get_bd_pins phase_broadcast/aresetn] \ + [get_bd_pins sample_broadcast/aresetn] \ + [get_bd_pins sample_filtered_broadcast/aresetn] \ + [get_bd_pins i_q_broadcast/aresetn] \ + [get_bd_pins phase_sample_combine/aresetn] \ + [get_bd_pins i_q_resize/resetn] \ + [get_bd_pins hpf/aresetn] \ + [get_bd_pins lpf/aresetn] + + ad_connect channel_enable sequencer/channel_enable + ad_connect sequencer/dma_wr DMA_WR + + ad_connect phase_data_sync/overflow overflow_or/Op1 + ad_connect sequencer/overflow overflow_or/Op2 + ad_connect overflow_or/Res overflow + + ad_connect phase_data_sync/sample_has_stat GND + +current_bd_instance / + +ad_connect /spi/M_AXIS_SAMPLE /processing/S_AXIS_SAMPLE +ad_connect /spi/conv_done /processing/conv_done +ad_connect /phase_gen/Q /processing/phase + +set axi_adc [create_bd_cell -type ip -vlnv analog.com:user:axi_generic_adc:1.0 axi_adc] +set_property -dict [list \ + CONFIG.NUM_CHANNELS 14 \ + ] $axi_adc + +ad_connect processing/overflow axi_adc/adc_dovf +ad_connect axi_adc/adc_enable processing/channel_enable + +connect_bd_net -net sys_cpu_clk \ + [get_bd_pins /spi/clk] \ + [get_bd_pins /processing/clk] \ + [get_bd_pins /axi_dma/m_dest_axi_aclk] \ + [get_bd_pins /axi_dma/fifo_wr_clk] \ + [get_bd_pins /phase_gen/CLK] \ + [get_bd_pins /axi_adc/adc_clk] + +connect_bd_net -net sys_cpu_resetn \ + [get_bd_pins /spi/resetn] \ + [get_bd_pins /processing/resetn] \ + [get_bd_pins /axi_dma/m_dest_axi_aresetn] + +ad_connect /processing/dma_wr /axi_dma/fifo_wr + +ad_cpu_interconnect 0x43c00000 /axi_adc +ad_cpu_interconnect 0x44a00000 /spi/axi +ad_cpu_interconnect 0x44a30000 /axi_dma + +ad_cpu_interrupt "ps-13" "mb-13" /axi_dma/irq +ad_cpu_interrupt "ps-12" "mb-12" /spi/irq + +ad_mem_hp2_interconnect sys_cpu_clk sys_ps7/S_AXI_HP2 +ad_mem_hp2_interconnect sys_cpu_clk axi_dma/m_dest_axi diff --git a/projects/cn0363/zed/system_constr.xdc b/projects/cn0363/zed/system_constr.xdc new file mode 100644 index 000000000..78e372dd0 --- /dev/null +++ b/projects/cn0363/zed/system_constr.xdc @@ -0,0 +1,23 @@ + +# PMOD JA + +set_property PACKAGE_PIN Y11 [get_ports gain0_o] +set_property IOSTANDARD LVCMOS33 [get_ports gain0_o] +set_property PACKAGE_PIN AA11 [get_ports gain1_o] +set_property IOSTANDARD LVCMOS33 [get_ports gain1_o] +set_property PACKAGE_PIN AA9 [get_ports led_clk_o] +set_property IOSTANDARD LVCMOS33 [get_ports led_clk_o] +set_property PACKAGE_PIN Y10 [get_ports {spi_cs[1]}] +set_property IOSTANDARD LVCMOS33 [get_ports {spi_cs[1]}] + +set_property PACKAGE_PIN AB11 [get_ports {spi_cs[0]}] +set_property IOSTANDARD LVCMOS33 [get_ports {spi_cs[0]}] +set_property PACKAGE_PIN AB10 [get_ports spi_sdo] +set_property IOSTANDARD LVCMOS33 [get_ports spi_sdo] +set_property PULLUP true [get_ports spi_sdo] +set_property PACKAGE_PIN AB9 [get_ports spi_sdi] +set_property IOSTANDARD LVCMOS33 [get_ports spi_sdi] +set_property PULLUP true [get_ports spi_sdi] +set_property PACKAGE_PIN AA8 [get_ports spi_sclk] +set_property IOSTANDARD LVCMOS33 [get_ports spi_sclk] + diff --git a/projects/cn0363/zed/system_project.tcl b/projects/cn0363/zed/system_project.tcl new file mode 100644 index 000000000..9aff54995 --- /dev/null +++ b/projects/cn0363/zed/system_project.tcl @@ -0,0 +1,12 @@ +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/projects/scripts/adi_project.tcl +source $ad_hdl_dir/projects/scripts/adi_board.tcl + +adi_project_create cn0363_zed +adi_project_files cn0363_zed [list \ + "system_top.v" \ + "system_constr.xdc" \ + "$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc" \ + "$ad_hdl_dir/library/common/ad_iobuf.v"] + +adi_project_run cn0363_zed diff --git a/projects/cn0363/zed/system_top.v b/projects/cn0363/zed/system_top.v new file mode 100644 index 000000000..b2b39d75e --- /dev/null +++ b/projects/cn0363/zed/system_top.v @@ -0,0 +1,276 @@ +// *************************************************************************** +// *************************************************************************** +// Copyright 2011(c) Analog Devices, Inc. +// +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// - Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// - Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in +// the documentation and/or other materials provided with the +// distribution. +// - Neither the name of Analog Devices, Inc. nor the names of its +// contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// - The use of this software may or may not infringe the patent rights +// of one or more patent holders. This license does not release you +// from the requirement that you obtain separate licenses from these +// patent holders to use this software. +// - Use of the software either in source or binary form, must be run +// on or directly connected to an Analog Devices Inc. component. +// +// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, +// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A +// PARTICULAR PURPOSE ARE DISCLAIMED. +// +// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY +// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** +// *************************************************************************** + +`timescale 1ns/100ps + +module system_top ( + ddr_addr, + ddr_ba, + ddr_cas_n, + ddr_ck_n, + ddr_ck_p, + ddr_cke, + ddr_cs_n, + ddr_dm, + ddr_dq, + ddr_dqs_n, + ddr_dqs_p, + ddr_odt, + ddr_ras_n, + ddr_reset_n, + ddr_we_n, + + fixed_io_ddr_vrn, + fixed_io_ddr_vrp, + fixed_io_mio, + fixed_io_ps_clk, + fixed_io_ps_porb, + fixed_io_ps_srstb, + + gpio_bd, + + hdmi_out_clk, + hdmi_vsync, + hdmi_hsync, + hdmi_data_e, + hdmi_data, + + i2s_mclk, + i2s_bclk, + i2s_lrclk, + i2s_sdata_out, + i2s_sdata_in, + + spdif, + + iic_scl, + iic_sda, + iic_mux_scl, + iic_mux_sda, + + spi_sdo, + spi_sdi, + spi_cs, + spi_sclk, + led_clk_o, + gain0_o, + gain1_o, + + otg_vbusoc); + + inout [14:0] ddr_addr; + inout [ 2:0] ddr_ba; + inout ddr_cas_n; + inout ddr_ck_n; + inout ddr_ck_p; + inout ddr_cke; + inout ddr_cs_n; + inout [ 3:0] ddr_dm; + inout [31:0] ddr_dq; + inout [ 3:0] ddr_dqs_n; + inout [ 3:0] ddr_dqs_p; + inout ddr_odt; + inout ddr_ras_n; + inout ddr_reset_n; + inout ddr_we_n; + + inout fixed_io_ddr_vrn; + inout fixed_io_ddr_vrp; + inout [53:0] fixed_io_mio; + inout fixed_io_ps_clk; + inout fixed_io_ps_porb; + inout fixed_io_ps_srstb; + + inout [31:0] gpio_bd; + + output hdmi_out_clk; + output hdmi_vsync; + output hdmi_hsync; + output hdmi_data_e; + output [15:0] hdmi_data; + + output spdif; + + output i2s_mclk; + output i2s_bclk; + output i2s_lrclk; + output i2s_sdata_out; + input i2s_sdata_in; + + + inout iic_scl; + inout iic_sda; + inout [ 1:0] iic_mux_scl; + inout [ 1:0] iic_mux_sda; + + input spi_sdi; + inout spi_sdo; + output spi_sclk; + output [ 1:0] spi_cs; + output led_clk_o; + output gain0_o; + output gain1_o; + + input otg_vbusoc; + + // internal signals + + wire [34:0] gpio_i; + wire [34:0] gpio_o; + wire [34:0] gpio_t; + wire [ 1:0] iic_mux_scl_i_s; + wire [ 1:0] iic_mux_scl_o_s; + wire iic_mux_scl_t_s; + wire [ 1:0] iic_mux_sda_i_s; + wire [ 1:0] iic_mux_sda_o_s; + wire iic_mux_sda_t_s; + wire [23:0] offload_sdi_data; + + wire spi_sdo_o; + wire spi_sdo_t; + wire excitation; + + assign gain0_o = gpio_o[32]; + assign gain1_o = gpio_o[33]; + + assign gpio_i[34] = spi_sdi; // Interrupt + assign led_clk_o = excitation; + + ad_iobuf #( + .DATA_WIDTH(1) + ) i_sdo_iobuf ( + .dt(spi_sdo_t), + .di(spi_sdo_o), + .dio(spi_sdo) + ); + + ad_iobuf #( + .DATA_WIDTH(32) + ) i_iobuf ( + .dt(gpio_t[31:0]), + .di(gpio_o[31:0]), + .do(gpio_i[31:0]), + .dio(gpio_bd) + ); + + ad_iobuf #( + .DATA_WIDTH(2) + ) i_iic_mux_scl ( + .dt({iic_mux_scl_t_s, iic_mux_scl_t_s}), + .di(iic_mux_scl_o_s), + .do(iic_mux_scl_i_s), + .dio(iic_mux_scl) + ); + + ad_iobuf #( + .DATA_WIDTH(2) + ) i_iic_mux_sda ( + .dt({iic_mux_sda_t_s, iic_mux_sda_t_s}), + .di(iic_mux_sda_o_s), + .do(iic_mux_sda_i_s), + .dio(iic_mux_sda) + ); + + system_wrapper i_system_wrapper ( + .ddr_addr (ddr_addr), + .ddr_ba (ddr_ba), + .ddr_cas_n (ddr_cas_n), + .ddr_ck_n (ddr_ck_n), + .ddr_ck_p (ddr_ck_p), + .ddr_cke (ddr_cke), + .ddr_cs_n (ddr_cs_n), + .ddr_dm (ddr_dm), + .ddr_dq (ddr_dq), + .ddr_dqs_n (ddr_dqs_n), + .ddr_dqs_p (ddr_dqs_p), + .ddr_odt (ddr_odt), + .ddr_ras_n (ddr_ras_n), + .ddr_reset_n (ddr_reset_n), + .ddr_we_n (ddr_we_n), + .fixed_io_ddr_vrn (fixed_io_ddr_vrn), + .fixed_io_ddr_vrp (fixed_io_ddr_vrp), + .fixed_io_mio (fixed_io_mio), + .fixed_io_ps_clk (fixed_io_ps_clk), + .fixed_io_ps_porb (fixed_io_ps_porb), + .fixed_io_ps_srstb (fixed_io_ps_srstb), + .gpio_i (gpio_i), + .gpio_o (gpio_o), + .gpio_t (gpio_t), + .hdmi_data (hdmi_data), + .hdmi_data_e (hdmi_data_e), + .hdmi_hsync (hdmi_hsync), + .hdmi_out_clk (hdmi_out_clk), + .hdmi_vsync (hdmi_vsync), + .i2s_bclk (i2s_bclk), + .i2s_lrclk (i2s_lrclk), + .i2s_mclk (i2s_mclk), + .i2s_sdata_in (i2s_sdata_in), + .i2s_sdata_out (i2s_sdata_out), + .iic_fmc_scl_io (iic_scl), + .iic_fmc_sda_io (iic_sda), + .iic_mux_scl_i (iic_mux_scl_i_s), + .iic_mux_scl_o (iic_mux_scl_o_s), + .iic_mux_scl_t (iic_mux_scl_t_s), + .iic_mux_sda_i (iic_mux_sda_i_s), + .iic_mux_sda_o (iic_mux_sda_o_s), + .iic_mux_sda_t (iic_mux_sda_t_s), + .ps_intr_00 (1'b0), + .ps_intr_01 (1'b0), + .ps_intr_02 (1'b0), + .ps_intr_03 (1'b0), + .ps_intr_04 (1'b0), + .ps_intr_05 (1'b0), + .ps_intr_06 (1'b0), + .ps_intr_07 (1'b0), + .ps_intr_08 (1'b0), + .ps_intr_09 (1'b0), + .ps_intr_10 (1'b0), + .spi_sdo (spi_sdo_o), + .spi_sdo_t (spi_sdo_t), + .spi_sdi (spi_sdi), + .spi_cs (spi_cs), + .spi_sclk (spi_sclk), + .excitation (excitation), + .otg_vbusoc (otg_vbusoc), + .spdif (spdif)); + +endmodule + +// *************************************************************************** +// *************************************************************************** diff --git a/projects/scripts/adi_board.tcl b/projects/scripts/adi_board.tcl index 59beb14d1..ea905c85a 100644 --- a/projects/scripts/adi_board.tcl +++ b/projects/scripts/adi_board.tcl @@ -25,12 +25,12 @@ proc ad_connect_type {p_name} { set m_name "" - if {$m_name eq ""} {set m_name [get_bd_pins -quiet $p_name]} if {$m_name eq ""} {set m_name [get_bd_intf_pins -quiet $p_name]} - if {$m_name eq ""} {set m_name [get_bd_ports -quiet $p_name]} + if {$m_name eq ""} {set m_name [get_bd_pins -quiet $p_name]} if {$m_name eq ""} {set m_name [get_bd_intf_ports -quiet $p_name]} - if {$m_name eq ""} {set m_name [get_bd_nets -quiet $p_name]} + if {$m_name eq ""} {set m_name [get_bd_ports -quiet $p_name]} if {$m_name eq ""} {set m_name [get_bd_intf_nets -quiet $p_name]} + if {$m_name eq ""} {set m_name [get_bd_nets -quiet $p_name]} return $m_name }