fmcadc5: update adcfifo/dacfifo
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4ec1204767
commit
c37b24d00f
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@ -2,6 +2,10 @@
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source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl
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set adc_fifo_name axi_ad9625_fifo
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set adc_data_width 512
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set adc_dma_data_width 64
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# adc peripherals
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ad_ip_instance util_adxcvr util_fmcadc5_0_xcvr
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@ -69,6 +73,8 @@ ad_ip_parameter axi_ad9625_dma CONFIG.CYCLIC 0
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ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_SRC 64
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ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_DEST 64
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ad_adcfifo_create $adc_fifo_name $adc_data_width $adc_dma_data_width $adc_fifo_address_width
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# reference clocks & resets
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create_bd_port -dir I rx_ref_clk_0
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@ -1,9 +1,6 @@
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## FIFO depth is 16Mb - 1M Samples
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set adc_fifo_name axi_ad9625_fifo
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set adc_fifo_address_width 18
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set adc_data_width 512
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set adc_dma_data_width 64
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## NOTE: With this configuration the #36Kb BRAM utilization is at ~70%
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