From c1e990b5755c7080436b13e06b74fe51710a3c92 Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Mon, 31 Jul 2017 14:48:25 -0400 Subject: [PATCH] ad9361/sw- current sw requires clock edge swap --- library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v b/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v index 291cd3a7e..78396828a 100644 --- a/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v +++ b/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v @@ -274,7 +274,7 @@ module axi_ad9361_cmos_if #( // dac-tx interface always @(posedge clk) begin - tx_clk_p <= {dac_clksel, ~dac_clksel}; + tx_clk_p <= {~dac_clksel, dac_clksel}; end always @(posedge clk) begin