From bea72232a35b016b9630553571763ae3718c10d6 Mon Sep 17 00:00:00 2001
From: Rejeesh Kutty <rejeesh.kutty@analog.com>
Date: Tue, 16 May 2017 14:42:28 -0400
Subject: [PATCH] alt_mem_asym- qsys component

---
 .../common/alt_mem_asym/alt_mem_asym_hw.tcl   | 44 +++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100755 library/altera/common/alt_mem_asym/alt_mem_asym_hw.tcl

diff --git a/library/altera/common/alt_mem_asym/alt_mem_asym_hw.tcl b/library/altera/common/alt_mem_asym/alt_mem_asym_hw.tcl
new file mode 100755
index 000000000..1ad812ec5
--- /dev/null
+++ b/library/altera/common/alt_mem_asym/alt_mem_asym_hw.tcl
@@ -0,0 +1,44 @@
+
+package require qsys
+
+source ../../../scripts/adi_env.tcl
+source $ad_hdl_dir/library/scripts/adi_ip_alt.tcl
+
+ad_ip_create alt_mem_asym "Altera Asymmetric Memory" "" p_alt_mem_asym
+ad_ip_parameter DEVICE_FAMILY STRING "Arria 10"
+ad_ip_parameter A_ADDRESS_WIDTH INTEGER 8
+ad_ip_parameter A_DATA_WIDTH INTEGER 512
+ad_ip_parameter B_ADDRESS_WIDTH INTEGER 8
+ad_ip_parameter B_DATA_WIDTH INTEGER 64
+
+proc p_alt_mem_asym {} {
+
+  set m_addr_width_a [get_parameter_value "A_ADDRESS_WIDTH"]
+  set m_data_width_a [get_parameter_value "A_DATA_WIDTH"]
+  set m_addr_width_b [get_parameter_value "B_ADDRESS_WIDTH"]
+  set m_data_width_b [get_parameter_value "B_DATA_WIDTH"]
+  set m_size_a [expr (2**$m_addr_width_a)*$m_data_width_a]
+  set m_size_b [expr (2**$m_addr_width_b)*$m_data_width_b]
+
+  if {$m_size_a == $m_size_b} {
+
+    add_instance alt_mem ram_2port
+    set_instance_parameter_value alt_mem {GUI_MODE} 0
+    set_instance_parameter_value alt_mem {GUI_MEM_IN_BITS} 1
+    set_instance_parameter_value alt_mem {GUI_MEMSIZE_BITS} $m_size_a
+    set_instance_parameter_value alt_mem {GUI_VAR_WIDTH} 1
+    set_instance_parameter_value alt_mem {GUI_QA_WIDTH} $m_data_width_a
+    set_instance_parameter_value alt_mem {GUI_DATAA_WIDTH} $m_data_width_a
+    set_instance_parameter_value alt_mem {GUI_QB_WIDTH} $m_data_width_b
+    set_instance_parameter_value alt_mem {GUI_RAM_BLOCK_TYPE} {M20K}
+    set_instance_parameter_value alt_mem {GUI_CLOCK_TYPE} 1
+
+    add_interface mem_i conduit end
+    add_interface mem_o conduit end
+    set_interface_property mem_i EXPORT_OF alt_mem.ram_input
+    set_interface_property mem_o EXPORT_OF alt_mem.ram_output
+
+    return
+  }
+}
+