a10soc: Synchronize resets to the reset source
Resets de-assertion should be synchronized to its associated clock.main
parent
9c9ce928d8
commit
bc2f916dfc
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@ -11,7 +11,7 @@ add_interface sys_rstn reset sink
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set_interface_property sys_rstn EXPORT_OF sys_clk.clk_in_reset
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set_instance_parameter_value sys_clk {clockFrequency} {100000000.0}
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set_instance_parameter_value sys_clk {clockFrequencyKnown} {1}
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set_instance_parameter_value sys_clk {resetSynchronousEdges} {NONE}
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set_instance_parameter_value sys_clk {resetSynchronousEdges} {DEASSERT}
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# hps
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# round-about way - qsys-script doesn't support {*}?
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@ -123,6 +123,7 @@ set_interface_property sys_hps_io EXPORT_OF sys_hps.hps_io
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# common dma interfaces
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add_instance sys_dma_clk clock_source
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set_instance_parameter_value sys_dma_clk {resetSynchronousEdges} {DEASSERT}
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add_connection sys_clk.clk_reset sys_dma_clk.clk_in_reset
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add_connection sys_hps.h2f_user0_clock sys_dma_clk.clk_in
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add_connection sys_dma_clk.clk sys_hps.f2sdram0_clock
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