axi_ad9739a: Update core to the new DRP interface
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781702c1b9
commit
bae839acd4
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@ -1,9 +1,9 @@
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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// Copyright 2011(c) Analog Devices, Inc.
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// Copyright 2011(c) Analog Devices, Inc.
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//
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//
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// All rights reserved.
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// All rights reserved.
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//
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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// are permitted provided that the following conditions are met:
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// - Redistributions of source code must retain the above copyright
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// - Redistributions of source code must retain the above copyright
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@ -21,16 +21,16 @@
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// patent holders to use this software.
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// patent holders to use this software.
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// - Use of the software either in source or binary form, must be run
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// - Use of the software either in source or binary form, must be run
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// on or directly connected to an Analog Devices Inc. component.
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// on or directly connected to an Analog Devices Inc. component.
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//
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//
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
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// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
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// PARTICULAR PURPOSE ARE DISCLAIMED.
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// PARTICULAR PURPOSE ARE DISCLAIMED.
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//
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//
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// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
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// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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@ -143,13 +143,14 @@ module axi_ad9739a_if (
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// dac data output serdes(s) & buffers
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// dac data output serdes(s) & buffers
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ad_serdes_out #(
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ad_serdes_out #(
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.SERDES_OR_DDR_N(1),
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.DDR_OR_SDR_N(1),
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.DATA_WIDTH(14),
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.DATA_WIDTH(14),
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.DEVICE_TYPE (DEVICE_TYPE))
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.DEVICE_TYPE (DEVICE_TYPE))
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i_serdes_out_data_a (
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i_serdes_out_data_a (
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.rst (dac_rst),
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.rst (dac_rst),
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.clk (dac_clk),
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.clk (dac_clk),
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.div_clk (dac_div_clk),
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.div_clk (dac_div_clk),
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.loaden (1'b0),
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.data_s0 (dac_data_00[15:2]),
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.data_s0 (dac_data_00[15:2]),
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.data_s1 (dac_data_02[15:2]),
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.data_s1 (dac_data_02[15:2]),
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.data_s2 (dac_data_04[15:2]),
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.data_s2 (dac_data_04[15:2]),
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@ -162,15 +163,16 @@ module axi_ad9739a_if (
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.data_out_n (dac_data_out_a_n));
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.data_out_n (dac_data_out_a_n));
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// dac data output serdes(s) & buffers
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// dac data output serdes(s) & buffers
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ad_serdes_out #(
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ad_serdes_out #(
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.SERDES_OR_DDR_N(1),
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.DDR_OR_SDR_N(1),
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.DATA_WIDTH(14),
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.DATA_WIDTH(14),
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.DEVICE_TYPE (DEVICE_TYPE))
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.DEVICE_TYPE (DEVICE_TYPE))
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i_serdes_out_data_b (
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i_serdes_out_data_b (
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.rst (dac_rst),
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.rst (dac_rst),
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.clk (dac_clk),
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.clk (dac_clk),
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.div_clk (dac_div_clk),
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.div_clk (dac_div_clk),
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.loaden (1'b0),
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.data_s0 (dac_data_01[15:2]),
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.data_s0 (dac_data_01[15:2]),
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.data_s1 (dac_data_03[15:2]),
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.data_s1 (dac_data_03[15:2]),
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.data_s2 (dac_data_05[15:2]),
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.data_s2 (dac_data_05[15:2]),
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@ -183,15 +185,16 @@ module axi_ad9739a_if (
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.data_out_n (dac_data_out_b_n));
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.data_out_n (dac_data_out_b_n));
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// dac clock output serdes & buffer
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// dac clock output serdes & buffer
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ad_serdes_out #(
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ad_serdes_out #(
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.SERDES_OR_DDR_N(1),
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.DDR_OR_SDR_N(1),
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.DATA_WIDTH(1),
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.DATA_WIDTH(1),
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.DEVICE_TYPE (DEVICE_TYPE))
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.DEVICE_TYPE (DEVICE_TYPE))
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i_serdes_out_clk (
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i_serdes_out_clk (
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.rst (dac_rst),
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.rst (dac_rst),
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.clk (dac_clk),
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.clk (dac_clk),
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.div_clk (dac_div_clk),
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.div_clk (dac_div_clk),
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.loaden (1'b0),
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.data_s0 (1'b1),
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.data_s0 (1'b1),
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.data_s1 (1'b0),
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.data_s1 (1'b0),
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.data_s2 (1'b1),
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.data_s2 (1'b1),
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