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adrv936x- readme updates

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Rejeesh Kutty 2017-08-08 15:18:43 -04:00
parent b118c6874e
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projects/adrv9361z7035/README.md
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@ -44,18 +44,18 @@ FMC & BOB carrier designs includes loopback daughtercards for connectivity testi
## Building, Generating Bit Files (easy & efficient method)
```
[some-directory]> git clone -b dev git@github.com:analogdevicesinc/hdl.git
[some-directory]> make -C hdl/projects/adrv9361z7035/ccbob\_cmos
[some-directory]> make -C hdl/projects/adrv9361z7035/ccbob_cmos
```
## Building, Generating Elf Files (easy & efficient method)
```
[some-directory]> git clone -b dev git@github.com:analogdevicesinc/no-OS.git
[some-directory]> make -C no-OS/adrv9361z7035/ccbob\_cmos
[some-directory]> make -C no-OS/adrv9361z7035/ccbob_cmos
```
## Running, a quick test (easy & efficient method)
```
[some-directory]> make -C no-OS/adrv9361z7035/ccbob\_cmos run
[some-directory]> make -C no-OS/adrv9361z7035/ccbob_cmos run
```
## Documentation

64
projects/adrv9364z7020/README.md
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@ -2,43 +2,63 @@
This folder contains the ADRV9364Z7020 SOM projects for each of the carrier boards.
## Board Design Files
# Supported SOM & Carriers
| Directory/File | Description |
|Directory | Description |
|---------------|----------------------------------------------------|
|ccbob\_cmos | ADRV9364Z7020\-SOM (CMOS Mode) \+ ADRV1CRR\-BOB |
|ccbob\_lvds | ADRV9364Z7020\-SOM (LVDS Mode) \+ ADRV1CRR\-BOB |
|ccbox\_lvds | ADRV9364Z7020\-SOM (LVDS Mode) \+ ADRV1CRR\-BOX |
|ccusb\_lvds | ADRV9364Z7020\-SOM (LVDS Mode) \+ ADRV1CRR\-USB |
## Board Design Files (Vivado IPI)
|Directory/File | Description |
|-----------------------------|----------------------------------------|
| common/adrv9364z7020_bd.tcl | ADRV9364Z7020 SOM module board design file. |
| common/ccbob_bd.tcl | carrier, break out board design file. |
| common/ccusb_bd.tcl | carrier, usb board design file. |
|common/ADRV9364Z7020\_bd.tcl | ADRV9364Z7020\-SOM board design file. |
|common/ccbob\_bd.tcl | carrier, break out board design file. |
|common/ccbox\_bd.tcl | carrier, box board design file. |
|common/ccusb\_bd.tcl | carrier, usb board design file. |
BOB carrier design includes loopback daughtercards for connectivity testing.
FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.
## Board Constraint Files
## Board Constraint Files (pin-out & io-standard)
| Directory/File | Description |
|--------------------------------------|-----------------------------------------------|
| common/adrv9364z7020_constr.xdc     | ADRV9364Z7020 SOM base constraints file.           |
| common/adrv9364z7020_constr_cmos.xdc | ADRV9364Z7020 SOM CMOS mode constraints file.     |
| common/adrv9364z7020_constr_lvds.xdc | ADRV9364Z7020 SOM LVDS mode constraints file.     |
| common/ccbob_constr.xdc | carrier, break out board constraints file. |
| common/ccbox_constr.xdc             | carrier, box board constraints file.         |
| common/ccusb_constr.xdc              | carrier, usb board constraints file.          |
|Directory/File | Description |
|----------------------------------------|-------------------------------------------------|
|common/ADRV9364Z7020\_constr.xdc | ADRV9364Z7020\-SOM base constraints file. |
|common/ADRV9364Z7020\_constr\_cmos.xdc | ADRV9364Z7020\-SOM CMOS mode constraints file. |
|common/ADRV9364Z7020\_constr\_lvds.xdc | ADRV9364Z7020\-SOM LVDS mode constraints file. |
|common/ccbob\_constr.xdc | carrier, break out board constraints file. |
|common/ccbox\_constr.xdc | carrier, box board constraints file. |
|common/ccusb\_constr.xdc | carrier, usb board constraints file. |
FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.
## Building, Generating Bit Files
## Building, Generating Bit Files (easy & efficient method)
```
[some-directory]> git clone -b dev git@github.com:analogdevicesinc/hdl.git
[some-directory]> make -C hdl/projects/adrv9364z7020/ccbob_cmos
```
[adrv9364z7020] cd ccbob_cmos
## Building, Generating Elf Files (easy & efficient method)
```
[some-directory]> git clone -b dev git@github.com:analogdevicesinc/no-OS.git
[some-directory]> make -C no-OS/adrv9364z7020/ccbob_cmos
```
[adrv9364z7020/ccbob_cmos] make
The make in each carrier directory builds the corresponding project. The above example builds ADRV4CRR-BOB hardware bit files in CMOS mode.
## Running, a quick test (easy & efficient method)
```
[some-directory]> make -C no-OS/adrv9364z7020/ccbob_cmos run
```
## Documentation
* [HDL Design User Guide]
* [IP User Guide]
* [ADRV4CRR Wiki page]
* [ADRV9364Z7020 Wiki page]
[HDL Design User Guide]:http://wiki.analog.com/resources/fpga/docs/hdl
[IP User Guide]:http://wiki.analog.com/resources/fpga/docs/axi_ad9361
[ADRV4CRR Wiki page]:https://wiki.analog.com/resources/eval/user-guides/picozed_sdr
[ADRV9364Z7020 Wiki page]:https://wiki.analog.com/resources/eval/user-guides/picozed_sdr