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a5soc: constraints for false paths

main
Rejeesh Kutty 2014-04-30 15:07:47 -04:00
parent a10043c4f4
commit b55d0d7ad1
2 changed files with 90 additions and 88 deletions
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16
projects/fmcjesdadc1/a5soc/system_constr.sdc
View File

@ -1,16 +1,18 @@
create_clock -period "20.000 ns" -name n_clk_50m [get_ports {sys_clk}]
create_clock -period "4.000 ns" -name n_clk_250m [get_ports {ref_clk}]
create_clock -period "20.000 ns" -name clk_50m [get_ports {sys_clk}]
create_clock -period "4.000 ns" -name clk_250m [get_ports {ref_clk}]
create_clock -period "5.000 ns" -name clk_200m [get_pins {i_system_bd|sys_hps|fpga_interfaces|clocks_resets|h2f_user0_clk}]
derive_pll_clocks
derive_clock_uncertainty
#set clk_500m [get_clocks {i_system_bd|sys_jesd204b_s1_pll|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk}]
set clk_rxlink [get_clocks {i_system_bd|sys_jesd204b_s1_pll|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk}]
set_false_path -from {sys_resetn} -to *
#set_false_path -from $clk_50m -to $clk_rxlink
#set_false_path -from $clk_rxlink -to $clk_50m
set_false_path -from clk_50m -to clk_200m
set_false_path -from clk_50m -to $clk_rxlink
set_false_path -from clk_200m -to clk_50m
set_false_path -from clk_200m -to $clk_rxlink
set_false_path -from $clk_rxlink -to clk_50m
set_false_path -from $clk_rxlink -to clk_200m

162
projects/fmcjesdadc1/a5soc/system_top.v
View File

@ -152,87 +152,87 @@ module system_top (
// hps
output [14:0] ddr3_a;
output [ 2:0] ddr3_ba;
output ddr3_ck_p;
output ddr3_ck_n;
output ddr3_cke;
output ddr3_cs_n;
output ddr3_ras_n;
output ddr3_cas_n;
output ddr3_we_n;
output ddr3_reset_n;
inout [39:0] ddr3_dq;
inout [ 4:0] ddr3_dqs_p;
inout [ 4:0] ddr3_dqs_n;
output ddr3_odt;
output [ 4:0] ddr3_dm;
input ddr3_oct_rzqin;
output eth1_tx_clk;
output eth1_tx_ctl;
output eth1_txd0;
output eth1_txd1;
output eth1_txd2;
output eth1_txd3;
input eth1_rx_clk;
input eth1_rx_ctl;
input eth1_rxd0;
input eth1_rxd1;
input eth1_rxd2;
input eth1_rxd3;
output eth1_mdc;
inout eth1_mdio;
output qspi_ss0;
output qspi_clk;
inout qspi_io0;
inout qspi_io1;
inout qspi_io2;
inout qspi_io3;
output sdio_clk;
inout sdio_cmd;
inout sdio_d0;
inout sdio_d1;
inout sdio_d2;
inout sdio_d3;
input usb1_clk;
output usb1_stp;
input usb1_dir;
input usb1_nxt;
inout usb1_d0;
inout usb1_d1;
inout usb1_d2;
inout usb1_d3;
inout usb1_d4;
inout usb1_d5;
inout usb1_d6;
inout usb1_d7;
input uart0_rx;
output uart0_tx;
input uart1_rx;
output uart1_tx;
inout i2c0_scl;
inout i2c0_sda;
output trace_clk;
output trace_d0;
output trace_d1;
output trace_d2;
output trace_d3;
output trace_d4;
output trace_d5;
output trace_d6;
output trace_d7;
inout gpio_gpio00;
inout gpio_gpio17;
inout gpio_gpio18;
inout gpio_gpio22;
inout gpio_gpio24;
inout gpio_gpio26;
inout gpio_gpio27;
inout gpio_gpio35;
inout gpio_gpio40;
inout gpio_gpio41;
inout gpio_gpio42;
inout gpio_gpio43;
output [ 14:0] ddr3_a;
output [ 2:0] ddr3_ba;
output ddr3_ck_p;
output ddr3_ck_n;
output ddr3_cke;
output ddr3_cs_n;
output ddr3_ras_n;
output ddr3_cas_n;
output ddr3_we_n;
output ddr3_reset_n;
inout [ 39:0] ddr3_dq;
inout [ 4:0] ddr3_dqs_p;
inout [ 4:0] ddr3_dqs_n;
output ddr3_odt;
output [ 4:0] ddr3_dm;
input ddr3_oct_rzqin;
output eth1_tx_clk;
output eth1_tx_ctl;
output eth1_txd0;
output eth1_txd1;
output eth1_txd2;
output eth1_txd3;
input eth1_rx_clk;
input eth1_rx_ctl;
input eth1_rxd0;
input eth1_rxd1;
input eth1_rxd2;
input eth1_rxd3;
output eth1_mdc;
inout eth1_mdio;
output qspi_ss0;
output qspi_clk;
inout qspi_io0;
inout qspi_io1;
inout qspi_io2;
inout qspi_io3;
output sdio_clk;
inout sdio_cmd;
inout sdio_d0;
inout sdio_d1;
inout sdio_d2;
inout sdio_d3;
input usb1_clk;
output usb1_stp;
input usb1_dir;
input usb1_nxt;
inout usb1_d0;
inout usb1_d1;
inout usb1_d2;
inout usb1_d3;
inout usb1_d4;
inout usb1_d5;
inout usb1_d6;
inout usb1_d7;
input uart0_rx;
output uart0_tx;
input uart1_rx;
output uart1_tx;
inout i2c0_scl;
inout i2c0_sda;
output trace_clk;
output trace_d0;
output trace_d1;
output trace_d2;
output trace_d3;
output trace_d4;
output trace_d5;
output trace_d6;
output trace_d7;
inout gpio_gpio00;
inout gpio_gpio17;
inout gpio_gpio18;
inout gpio_gpio22;
inout gpio_gpio24;
inout gpio_gpio26;
inout gpio_gpio27;
inout gpio_gpio35;
inout gpio_gpio40;
inout gpio_gpio41;
inout gpio_gpio42;
inout gpio_gpio43;
// board gpio