diff --git a/projects/ad9081_fmca_ebz/zc706/system_constr.xdc b/projects/ad9081_fmca_ebz/zc706/system_constr.xdc
index a3edb067d..96c069443 100644
--- a/projects/ad9081_fmca_ebz/zc706/system_constr.xdc
+++ b/projects/ad9081_fmca_ebz/zc706/system_constr.xdc
@@ -48,14 +48,14 @@ set_property  -quiet -dict {PACKAGE_PIN AH1
 set_property  -quiet -dict {PACKAGE_PIN AH2                                     } [get_ports tx_data_p[4]     ]    ; ## FMC0_DP4_C2M_P      MGTXTXP0_110     FPGA_SERDOUT_6_P
 set_property  -quiet -dict {PACKAGE_PIN AK1                                     } [get_ports tx_data_n[3]     ]    ; ## FMC0_DP3_C2M_N      MGTXTXN3_109     FPGA_SERDOUT_7_N
 set_property  -quiet -dict {PACKAGE_PIN AK2                                     } [get_ports tx_data_p[3]     ]    ; ## FMC0_DP3_C2M_P      MGTXTXP3_109     FPGA_SERDOUT_7_P
-set_property  -quiet -dict {PACKAGE_PIN AK18  IOSTANDARD LVDS_25  DIFF_TERM TRUE} [get_ports fpga_syncin_n[0] ]    ; ## FMC0_LA02_N         IO_L16N_T2_11
-set_property  -quiet -dict {PACKAGE_PIN AK17  IOSTANDARD LVDS_25  DIFF_TERM TRUE} [get_ports fpga_syncin_p[0] ]    ; ## FMC0_LA02_P         IO_L16P_T2_11
-set_property  -quiet -dict {PACKAGE_PIN AJ19  IOSTANDARD LVDS_25  DIFF_TERM TRUE} [get_ports fpga_syncin_n[1] ]    ; ## FMC0_LA03_N         IO_L17N_T2_11
-set_property  -quiet -dict {PACKAGE_PIN AH19  IOSTANDARD LVDS_25  DIFF_TERM TRUE} [get_ports fpga_syncin_p[1] ]    ; ## FMC0_LA03_P         IO_L17P_T2_11
-set_property  -quiet -dict {PACKAGE_PIN AH21  IOSTANDARD LVDS_25                } [get_ports fpga_syncout_n[0]]    ; ## FMC0_LA01_CC_N      IO_L13N_T2_MRCC_11
-set_property  -quiet -dict {PACKAGE_PIN AG21  IOSTANDARD LVDS_25                } [get_ports fpga_syncout_p[0]]    ; ## FMC0_LA01_CC_P      IO_L13P_T2_MRCC_11
-set_property  -quiet -dict {PACKAGE_PIN AH22  IOSTANDARD LVDS_25                } [get_ports fpga_syncout_n[1]]    ; ## FMC0_LA06_N         IO_L6N_T0_VREF_11
-set_property  -quiet -dict {PACKAGE_PIN AG22  IOSTANDARD LVDS_25                } [get_ports fpga_syncout_p[1]]    ; ## FMC0_LA06_P         IO_L6P_T0_11
+set_property  -quiet -dict {PACKAGE_PIN AK18  IOSTANDARD LVDS_25  DIFF_TERM TRUE} [get_ports fpga_syncin_0_n  ]    ; ## FMC0_LA02_N         IO_L16N_T2_11
+set_property  -quiet -dict {PACKAGE_PIN AK17  IOSTANDARD LVDS_25  DIFF_TERM TRUE} [get_ports fpga_syncin_0_p  ]    ; ## FMC0_LA02_P         IO_L16P_T2_11
+set_property  -quiet -dict {PACKAGE_PIN AJ19  IOSTANDARD LVCMOS25               } [get_ports fpga_syncin_1_n  ]    ; ## FMC0_LA03_N         IO_L17N_T2_11
+set_property  -quiet -dict {PACKAGE_PIN AH19  IOSTANDARD LVCMOS25               } [get_ports fpga_syncin_1_p  ]    ; ## FMC0_LA03_P         IO_L17P_T2_11
+set_property  -quiet -dict {PACKAGE_PIN AH21  IOSTANDARD LVDS_25                } [get_ports fpga_syncout_0_n ]    ; ## FMC0_LA01_CC_N      IO_L13N_T2_MRCC_11
+set_property  -quiet -dict {PACKAGE_PIN AG21  IOSTANDARD LVDS_25                } [get_ports fpga_syncout_0_p ]    ; ## FMC0_LA01_CC_P      IO_L13P_T2_MRCC_11
+set_property  -quiet -dict {PACKAGE_PIN AH22  IOSTANDARD LVCMOS25               } [get_ports fpga_syncout_1_n ]    ; ## FMC0_LA06_N         IO_L6N_T0_VREF_11
+set_property  -quiet -dict {PACKAGE_PIN AG22  IOSTANDARD LVCMOS25               } [get_ports fpga_syncout_1_p ]    ; ## FMC0_LA06_P         IO_L6P_T0_11
 set_property         -dict {PACKAGE_PIN Y22   IOSTANDARD LVCMOS25               } [get_ports gpio[0]          ]    ; ## FMC0_LA15_P         IO_L21P_T3_DQS_11
 set_property         -dict {PACKAGE_PIN Y23   IOSTANDARD LVCMOS25               } [get_ports gpio[1]          ]    ; ## FMC0_LA15_N         IO_L21N_T3_DQS_11
 set_property         -dict {PACKAGE_PIN T24   IOSTANDARD LVCMOS25               } [get_ports gpio[2]          ]    ; ## FMC0_LA19_P         IO_L17P_T2_13
diff --git a/projects/ad9081_fmca_ebz/zc706/system_top.v b/projects/ad9081_fmca_ebz/zc706/system_top.v
index a6f834daf..566254146 100644
--- a/projects/ad9081_fmca_ebz/zc706/system_top.v
+++ b/projects/ad9081_fmca_ebz/zc706/system_top.v
@@ -39,7 +39,8 @@ module system_top  #(
     parameter TX_JESD_L = 8,
     parameter TX_NUM_LINKS = 1,
     parameter RX_JESD_L = 8,
-    parameter RX_NUM_LINKS = 1
+    parameter RX_NUM_LINKS = 1,
+    parameter JESD_MODE = "8B10B"
   ) (
 
   inout       [14:0]      ddr_addr,
@@ -93,10 +94,14 @@ module system_top  #(
   input  [RX_JESD_L*RX_NUM_LINKS-1:0]  rx_data_p,
   output [TX_JESD_L*TX_NUM_LINKS-1:0]  tx_data_n,
   output [TX_JESD_L*TX_NUM_LINKS-1:0]  tx_data_p,
-  input  [TX_NUM_LINKS-1:0]            fpga_syncin_n,
-  input  [TX_NUM_LINKS-1:0]            fpga_syncin_p,
-  output [RX_NUM_LINKS-1:0]            fpga_syncout_n,
-  output [RX_NUM_LINKS-1:0]            fpga_syncout_p,
+  input                                fpga_syncin_0_n,
+  input                                fpga_syncin_0_p,
+  inout                                fpga_syncin_1_n,
+  inout                                fpga_syncin_1_p,
+  output                               fpga_syncout_0_n,
+  output                               fpga_syncout_0_p,
+  inout                                fpga_syncout_1_n,
+  inout                                fpga_syncout_1_p,
   inout  [10:0]                        gpio,
   inout                                hmc_gpio1,
   output                               hmc_sync,
@@ -168,22 +173,15 @@ module system_top  #(
     .IB (clkin10_n),
     .O (clkin10));
 
-  genvar i;
-  generate
-  for(i=0;i<TX_NUM_LINKS;i=i+1) begin : g_tx_buffers
-    IBUFDS i_ibufds_syncin (
-      .I (fpga_syncin_p[i]),
-      .IB (fpga_syncin_n[i]),
-      .O (tx_syncin[i]));
-  end
+  IBUFDS i_ibufds_syncin_0 (
+    .I (fpga_syncin_0_p),
+    .IB (fpga_syncin_0_n),
+    .O (tx_syncin[0]));
 
-  for(i=0;i<RX_NUM_LINKS;i=i+1) begin : g_rx_buffers
-    OBUFDS i_obufds_syncout (
-      .I (rx_syncout[i]),
-      .O (fpga_syncout_p[i]),
-      .OB (fpga_syncout_n[i]));
-  end
-  endgenerate
+  OBUFDS i_obufds_syncout_0 (
+    .I (rx_syncout[0]),
+    .O (fpga_syncout_0_p),
+    .OB (fpga_syncout_0_n));
 
   BUFG i_tx_device_clk (
     .I (clkin6),
@@ -234,6 +232,31 @@ module system_top  #(
   assign txen[0]          = gpio_o[58];
   assign txen[1]          = gpio_o[59];
 
+  generate
+  if (TX_NUM_LINKS > 1 & JESD_MODE == "8B10B") begin
+    assign tx_syncin[1] = fpga_syncin_1_p;
+  end else begin
+    ad_iobuf #(.DATA_WIDTH(2)) i_syncin_iobuf (
+      .dio_t (gpio_t[61:60]),
+      .dio_i (gpio_o[61:60]),
+      .dio_o (gpio_i[61:60]),
+      .dio_p ({fpga_syncin_1_n,      // 61
+               fpga_syncin_1_p}));   // 60
+  end
+
+  if (RX_NUM_LINKS > 1 & JESD_MODE == "8B10B") begin
+    assign fpga_syncout_1_p = rx_syncout[1];
+    assign fpga_syncout_1_n = 0;
+  end else begin
+    ad_iobuf #(.DATA_WIDTH(2)) i_syncout_iobuf (
+      .dio_t (gpio_t[63:62]),
+      .dio_i (gpio_o[63:62]),
+      .dio_o (gpio_i[63:62]),
+      .dio_p ({fpga_syncout_1_n,      // 63
+               fpga_syncout_1_p}));   // 62
+  end
+  endgenerate
+
   /* Board GPIOS. Buttons, LEDs, etc... */
   ad_iobuf #(
     .DATA_WIDTH(15)
@@ -245,7 +268,7 @@ module system_top  #(
   );
 
   // Unused GPIOs
-  assign gpio_i[63:54] = gpio_o[63:54];
+  assign gpio_i[59:54] = gpio_o[59:54];
   assign gpio_i[31:16] = gpio_o[31:16];
 
   system_wrapper i_system_wrapper (