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fmcomms2_zc702: Add SPI and GPIO interface for FREQCVT

main
Istvan Csomortani 2015-07-22 10:16:04 +03:00
parent 3b3fe4e642
commit b325c0fc01
2 changed files with 35 additions and 14 deletions
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11
projects/fmcomms2/zc702/system_constr.xdc
View File

@ -62,3 +62,14 @@ set_property -dict {PACKAGE_PIN C18 IOSTANDARD LVCMOS25} [get_ports spi_miso]
create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p] create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p]
create_clock -name ad9361_clk -period 4 [get_pins i_system_wrapper/system_i/axi_ad9361/clk] create_clock -name ad9361_clk -period 4 [get_pins i_system_wrapper/system_i/axi_ad9361/clk]
# spi pmod J63
set_property -dict {PACKAGE_PIN E15 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports spi_udc_csn_tx] ; ## PMOD1_0_LS
set_property -dict {PACKAGE_PIN V8 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports spi_udc_csn_rx] ; ## PL_PJTAG_TDI
set_property -dict {PACKAGE_PIN W5 IOSTANDARD LVCMOS25} [get_ports spi_udc_sclk] ; ## PMOD1_3_LS
set_property -dict {PACKAGE_PIN D15 IOSTANDARD LVCMOS25} [get_ports spi_udc_data] ; ## PMOD1_1_LS
set_property -dict {PACKAGE_PIN W17 IOSTANDARD LVCMOS25} [get_ports gpio_muxout_tx] ; ## PMOD1_2_LS
set_property -dict {PACKAGE_PIN V10 IOSTANDARD LVCMOS25} [get_ports gpio_muxout_rx] ; ## PL_PJTAG_TCK

38
projects/fmcomms2/zc702/system_top.v
View File

@ -93,6 +93,8 @@ module system_top (
txnrx, txnrx,
enable, enable,
gpio_muxout_tx,
gpio_muxout_rx,
gpio_resetb, gpio_resetb,
gpio_sync, gpio_sync,
gpio_en_agc, gpio_en_agc,
@ -102,7 +104,12 @@ module system_top (
spi_csn, spi_csn,
spi_clk, spi_clk,
spi_mosi, spi_mosi,
spi_miso); spi_miso,
spi_udc_csn_tx,
spi_udc_csn_rx,
spi_udc_sclk,
spi_udc_data);
inout [14:0] ddr_addr; inout [14:0] ddr_addr;
inout [ 2:0] ddr_ba; inout [ 2:0] ddr_ba;
@ -155,6 +162,9 @@ module system_top (
output txnrx; output txnrx;
output enable; output enable;
inout gpio_muxout_tx;
inout gpio_muxout_rx;
inout gpio_resetb; inout gpio_resetb;
inout gpio_sync; inout gpio_sync;
inout gpio_en_agc; inout gpio_en_agc;
@ -166,6 +176,11 @@ module system_top (
output spi_mosi; output spi_mosi;
input spi_miso; input spi_miso;
output spi_udc_csn_tx;
output spi_udc_csn_rx;
output spi_udc_sclk;
output spi_udc_data;
// internal signals // internal signals
wire [63:0] gpio_i; wire [63:0] gpio_i;
@ -190,27 +205,22 @@ module system_top (
// instantiations // instantiations
ad_iobuf #(.DATA_WIDTH(29)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(31)) i_iobuf (
.dio_t ({gpio_t[48:32],gpio_t[15:8], gpio_t[3:0]}), .dio_t ({gpio_t[50:32],gpio_t[15:12], gpio_t[3:0]}),
.dio_i ({gpio_o[48:32],gpio_o[15:8], gpio_o[3:0]}), .dio_i ({gpio_o[50:32],gpio_o[15:12], gpio_o[3:0]}),
.dio_o ({gpio_i[48:32],gpio_i[15:8], gpio_i[3:0]}), .dio_o ({gpio_i[50:32],gpio_i[15:12], gpio_i[3:0]}),
.dio_p ({ gpio_txnrx, .dio_p ({ gpio_muxout_tx,
gpio_muxout_rx,
gpio_txnrx,
gpio_enable, gpio_enable,
gpio_resetb, gpio_resetb,
gpio_sync, gpio_sync,
gpio_en_agc, gpio_en_agc,
gpio_ctl, gpio_ctl,
gpio_status, gpio_status,
gpio_bd[15:8], gpio_bd[15:12],
gpio_bd[3:0]})); gpio_bd[3:0]}));
// udc spi is just output and connected PMOD2_x_LS
ad_iobuf #(.DATA_WIDTH(4)) i_iobuf_spi (
.dio_t ({4'd0}),
.dio_i ({spi_udc_csn_tx, spi_udc_csn_rx, spi_udc_data, spi_udc_sclk}),
.dio_o (),
.dio_p (gpio_bd[7:4]));
system_wrapper i_system_wrapper ( system_wrapper i_system_wrapper (
.ddr_addr (ddr_addr), .ddr_addr (ddr_addr),
.ddr_ba (ddr_ba), .ddr_ba (ddr_ba),