axi_ad9434: Make adc_enable controllable from the channel register map
parent
493fc1d48b
commit
b2d63bf9e0
|
@ -84,7 +84,6 @@ module axi_ad9434 #(
|
|||
input [ 2:0] s_axi_awprot,
|
||||
input [ 2:0] s_axi_arprot);
|
||||
|
||||
|
||||
// internal clocks & resets
|
||||
wire adc_rst;
|
||||
wire up_rstn;
|
||||
|
@ -128,9 +127,6 @@ module axi_ad9434 #(
|
|||
assign up_clk = s_axi_aclk;
|
||||
assign up_rstn = s_axi_aresetn;
|
||||
|
||||
// single channel always enable
|
||||
assign adc_enable = 1'b1;
|
||||
|
||||
axi_ad9434_if #(
|
||||
.DEVICE_TYPE(DEVICE_TYPE),
|
||||
.IO_DELAY_GROUP(IO_DELAY_GROUP))
|
||||
|
@ -171,6 +167,7 @@ module axi_ad9434 #(
|
|||
.adc_or(adc_or_if_s),
|
||||
.mmcm_rst (mmcm_rst),
|
||||
.adc_rst (adc_rst),
|
||||
.adc_enable(adc_enable),
|
||||
.adc_status (adc_status_s),
|
||||
.dma_dvalid (adc_valid),
|
||||
.dma_data (adc_data),
|
||||
|
|
|
@ -87,6 +87,7 @@ module axi_ad9434_core #(
|
|||
|
||||
output mmcm_rst,
|
||||
output adc_rst,
|
||||
output adc_enable,
|
||||
input adc_status);
|
||||
|
||||
// internal signals
|
||||
|
@ -212,7 +213,7 @@ module axi_ad9434_core #(
|
|||
i_adc_channel(
|
||||
.adc_clk (adc_clk),
|
||||
.adc_rst (adc_rst),
|
||||
.adc_enable (),
|
||||
.adc_enable (adc_enable),
|
||||
.adc_iqcor_enb (),
|
||||
.adc_dcfilt_enb (),
|
||||
.adc_dfmt_se (adc_dfmt_se_s),
|
||||
|
|
Loading…
Reference in New Issue