From b25c37a8ccb65d92dd24a0d41a599189941f88e4 Mon Sep 17 00:00:00 2001 From: Laszlo Nagy Date: Fri, 12 Nov 2021 12:29:03 +0200 Subject: [PATCH] axi_adrv9001/intel: Add dummy parameters to match Xilinx interface Signed-off-by: Laszlo Nagy --- library/axi_adrv9001/intel/adrv9001_rx.v | 1 + library/axi_adrv9001/intel/adrv9001_tx.v | 1 + 2 files changed, 2 insertions(+) diff --git a/library/axi_adrv9001/intel/adrv9001_rx.v b/library/axi_adrv9001/intel/adrv9001_rx.v index 9c68b0363..3491d8ea6 100644 --- a/library/axi_adrv9001/intel/adrv9001_rx.v +++ b/library/axi_adrv9001/intel/adrv9001_rx.v @@ -41,6 +41,7 @@ module adrv9001_rx #( parameter NUM_LANES = 3, parameter DRP_WIDTH = 5, parameter IODELAY_CTRL = 0, + parameter USE_BUFG = 0, parameter IO_DELAY_GROUP = "dev_if_delay_group" ) ( // device interface diff --git a/library/axi_adrv9001/intel/adrv9001_tx.v b/library/axi_adrv9001/intel/adrv9001_tx.v index 2e0b2f113..0e559b380 100644 --- a/library/axi_adrv9001/intel/adrv9001_tx.v +++ b/library/axi_adrv9001/intel/adrv9001_tx.v @@ -39,6 +39,7 @@ module adrv9001_tx #( parameter CMOS_LVDS_N = 0, parameter NUM_LANES = 4, parameter FPGA_TECHNOLOGY = 0, + parameter USE_BUFG = 0, parameter USE_RX_CLK_FOR_TX = 0 ) ( input ref_clk,