From b0fbe1bb576ae1649c287cd83f22ce6538ee41fc Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Mon, 1 Apr 2019 10:41:00 +0100 Subject: [PATCH] util_clkdiv: Seperate the IP source into an intel and xilinx version --- library/Makefile | 5 ++++- library/intel/util_clkdiv/Makefile | 11 +++++++++++ .../util_clkdiv/util_clkdiv.v} | 4 ++-- library/{ => intel}/util_clkdiv/util_clkdiv_hw.tcl | 8 ++++---- library/{ => xilinx}/util_clkdiv/Makefile | 6 +----- library/{ => xilinx}/util_clkdiv/util_clkdiv.v | 0 .../{ => xilinx}/util_clkdiv/util_clkdiv_constr.xdc | 0 library/{ => xilinx}/util_clkdiv/util_clkdiv_ip.tcl | 2 +- library/{ => xilinx}/util_clkdiv/util_clkdiv_ooc.ttcl | 0 projects/adrv9361z7035/ccbob_cmos/Makefile | 2 +- projects/adrv9361z7035/ccbob_lvds/Makefile | 2 +- projects/adrv9361z7035/ccbox_lvds/Makefile | 2 +- projects/adrv9361z7035/ccfmc_lvds/Makefile | 2 +- projects/adrv9364z7020/ccbob_cmos/Makefile | 2 +- projects/adrv9364z7020/ccbob_lvds/Makefile | 2 +- projects/adrv9364z7020/ccbox_lvds/Makefile | 2 +- projects/fmcomms2/kc705/Makefile | 2 +- projects/fmcomms2/kcu105/Makefile | 2 +- projects/fmcomms2/vc707/Makefile | 2 +- projects/fmcomms2/zc702/Makefile | 2 +- projects/fmcomms2/zc706/Makefile | 2 +- projects/fmcomms2/zcu102/Makefile | 2 +- projects/fmcomms2/zed/Makefile | 2 +- projects/fmcomms5/zc702/Makefile | 2 +- projects/fmcomms5/zc706/Makefile | 2 +- projects/fmcomms5/zcu102/Makefile | 2 +- 26 files changed, 40 insertions(+), 30 deletions(-) create mode 100644 library/intel/util_clkdiv/Makefile rename library/{util_clkdiv/util_clkdiv_alt.v => intel/util_clkdiv/util_clkdiv.v} (97%) rename library/{ => intel}/util_clkdiv/util_clkdiv_hw.tcl (71%) rename library/{ => xilinx}/util_clkdiv/Makefile (81%) rename library/{ => xilinx}/util_clkdiv/util_clkdiv.v (100%) rename library/{ => xilinx}/util_clkdiv/util_clkdiv_constr.xdc (100%) rename library/{ => xilinx}/util_clkdiv/util_clkdiv_ip.tcl (97%) rename library/{ => xilinx}/util_clkdiv/util_clkdiv_ooc.ttcl (100%) diff --git a/library/Makefile b/library/Makefile index c0f26e0a0..4acd11c56 100644 --- a/library/Makefile +++ b/library/Makefile @@ -67,6 +67,7 @@ clean: $(MAKE) -C intel/common/alt_mem_asym clean $(MAKE) -C intel/common/alt_serdes clean $(MAKE) -C intel/jesd204_phy clean + $(MAKE) -C intel/util_clkdiv clean $(MAKE) -C jesd204/ad_ip_jesd204_tpl_adc clean $(MAKE) -C jesd204/ad_ip_jesd204_tpl_dac clean $(MAKE) -C jesd204/axi_jesd204_common clean @@ -90,7 +91,6 @@ clean: $(MAKE) -C util_bsplit clean $(MAKE) -C util_cdc clean $(MAKE) -C util_cic clean - $(MAKE) -C util_clkdiv clean $(MAKE) -C util_dacfifo clean $(MAKE) -C util_dec256sinc24b clean $(MAKE) -C util_delay clean @@ -113,6 +113,7 @@ clean: $(MAKE) -C xilinx/axi_dacfifo clean $(MAKE) -C xilinx/axi_xcvrlb clean $(MAKE) -C xilinx/util_adxcvr clean + $(MAKE) -C xilinx/util_clkdiv clean $(MAKE) -C interfaces clean @@ -176,6 +177,7 @@ lib: $(MAKE) -C intel/common/alt_mem_asym $(MAKE) -C intel/common/alt_serdes $(MAKE) -C intel/jesd204_phy + $(MAKE) -C intel/util_clkdiv $(MAKE) -C jesd204/ad_ip_jesd204_tpl_adc $(MAKE) -C jesd204/ad_ip_jesd204_tpl_dac $(MAKE) -C jesd204/axi_jesd204_common @@ -221,6 +223,7 @@ lib: $(MAKE) -C xilinx/axi_dacfifo $(MAKE) -C xilinx/axi_xcvrlb $(MAKE) -C xilinx/util_adxcvr + $(MAKE) -C xilinx/util_clkdiv $(MAKE) -C interfaces diff --git a/library/intel/util_clkdiv/Makefile b/library/intel/util_clkdiv/Makefile new file mode 100644 index 000000000..a13d81780 --- /dev/null +++ b/library/intel/util_clkdiv/Makefile @@ -0,0 +1,11 @@ +#################################################################################### +## Copyright 2018(c) Analog Devices, Inc. +## Auto-generated, do not modify! +#################################################################################### + +LIBRARY_NAME := util_clkdiv + +INTEL_DEPS += util_clkdiv.v +INTEL_DEPS += util_clkdiv_hw.tcl + +include ../../scripts/library.mk diff --git a/library/util_clkdiv/util_clkdiv_alt.v b/library/intel/util_clkdiv/util_clkdiv.v similarity index 97% rename from library/util_clkdiv/util_clkdiv_alt.v rename to library/intel/util_clkdiv/util_clkdiv.v index c6be8081e..318ad238e 100644 --- a/library/util_clkdiv/util_clkdiv_alt.v +++ b/library/intel/util_clkdiv/util_clkdiv.v @@ -39,7 +39,7 @@ // clk_sel is 1. Provides a glitch free output clock // IP uses BUFR/BUFGCE_DIV and BUFGMUX_CTRL primitives -module util_clkdiv_alt #( +module util_clkdiv #( parameter SIM_DEVICE = "CYCLONE5", parameter CLOCK_TYPE = "Global Clock") ( @@ -76,4 +76,4 @@ generate if (SIM_DEVICE == "CYCLONE5") begin end endgenerate -endmodule // util_clkdiv_alt +endmodule // util_clkdiv diff --git a/library/util_clkdiv/util_clkdiv_hw.tcl b/library/intel/util_clkdiv/util_clkdiv_hw.tcl similarity index 71% rename from library/util_clkdiv/util_clkdiv_hw.tcl rename to library/intel/util_clkdiv/util_clkdiv_hw.tcl index 1e6498017..835652baf 100644 --- a/library/util_clkdiv/util_clkdiv_hw.tcl +++ b/library/intel/util_clkdiv/util_clkdiv_hw.tcl @@ -1,7 +1,7 @@ package require -exact qsys 13.0 -source ../scripts/adi_env.tcl -source ../scripts/adi_ip_intel.tcl +source ../../scripts/adi_env.tcl +source ../../scripts/adi_ip_intel.tcl set_module_property NAME util_clkdiv @@ -13,8 +13,8 @@ set_module_property DISPLAY_NAME util_clkdiv # files add_fileset quartus_synth QUARTUS_SYNTH "" "Quartus Synthesis" -set_fileset_property quartus_synth TOP_LEVEL util_clkdiv_alt -add_fileset_file util_clkdiv_alt.v VERILOG PATH util_clkdiv_alt.v TOP_LEVEL_FILE +set_fileset_property quartus_synth TOP_LEVEL util_clkdiv +add_fileset_file util_clkdiv.v VERILOG PATH util_clkdiv.v TOP_LEVEL_FILE # defaults diff --git a/library/util_clkdiv/Makefile b/library/xilinx/util_clkdiv/Makefile similarity index 81% rename from library/util_clkdiv/Makefile rename to library/xilinx/util_clkdiv/Makefile index 793cadbdb..469e7d2d7 100644 --- a/library/util_clkdiv/Makefile +++ b/library/xilinx/util_clkdiv/Makefile @@ -5,13 +5,9 @@ LIBRARY_NAME := util_clkdiv - XILINX_DEPS += util_clkdiv.v XILINX_DEPS += util_clkdiv_constr.xdc XILINX_DEPS += util_clkdiv_ooc.ttcl XILINX_DEPS += util_clkdiv_ip.tcl -INTEL_DEPS += util_clkdiv_alt.v -INTEL_DEPS += util_clkdiv_hw.tcl - -include ../scripts/library.mk +include ../../scripts/library.mk diff --git a/library/util_clkdiv/util_clkdiv.v b/library/xilinx/util_clkdiv/util_clkdiv.v similarity index 100% rename from library/util_clkdiv/util_clkdiv.v rename to library/xilinx/util_clkdiv/util_clkdiv.v diff --git a/library/util_clkdiv/util_clkdiv_constr.xdc b/library/xilinx/util_clkdiv/util_clkdiv_constr.xdc similarity index 100% rename from library/util_clkdiv/util_clkdiv_constr.xdc rename to library/xilinx/util_clkdiv/util_clkdiv_constr.xdc diff --git a/library/util_clkdiv/util_clkdiv_ip.tcl b/library/xilinx/util_clkdiv/util_clkdiv_ip.tcl similarity index 97% rename from library/util_clkdiv/util_clkdiv_ip.tcl rename to library/xilinx/util_clkdiv/util_clkdiv_ip.tcl index 8a915b408..cd8cd9383 100644 --- a/library/util_clkdiv/util_clkdiv_ip.tcl +++ b/library/xilinx/util_clkdiv/util_clkdiv_ip.tcl @@ -1,4 +1,4 @@ -source ../scripts/adi_env.tcl +source ../../scripts/adi_env.tcl source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl adi_ip_create util_clkdiv diff --git a/library/util_clkdiv/util_clkdiv_ooc.ttcl b/library/xilinx/util_clkdiv/util_clkdiv_ooc.ttcl similarity index 100% rename from library/util_clkdiv/util_clkdiv_ooc.ttcl rename to library/xilinx/util_clkdiv/util_clkdiv_ooc.ttcl diff --git a/projects/adrv9361z7035/ccbob_cmos/Makefile b/projects/adrv9361z7035/ccbob_cmos/Makefile index 02b4bd5b3..93ffe965c 100644 --- a/projects/adrv9361z7035/ccbob_cmos/Makefile +++ b/projects/adrv9361z7035/ccbob_cmos/Makefile @@ -16,12 +16,12 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac LIB_DEPS += axi_gpreg -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo LIB_DEPS += xilinx/axi_xcvrlb +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/adrv9361z7035/ccbob_lvds/Makefile b/projects/adrv9361z7035/ccbob_lvds/Makefile index fbc96e000..a67588da5 100644 --- a/projects/adrv9361z7035/ccbob_lvds/Makefile +++ b/projects/adrv9361z7035/ccbob_lvds/Makefile @@ -16,12 +16,12 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac LIB_DEPS += axi_gpreg -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo LIB_DEPS += xilinx/axi_xcvrlb +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/adrv9361z7035/ccbox_lvds/Makefile b/projects/adrv9361z7035/ccbox_lvds/Makefile index 2f12edbb5..032936f75 100644 --- a/projects/adrv9361z7035/ccbox_lvds/Makefile +++ b/projects/adrv9361z7035/ccbox_lvds/Makefile @@ -17,11 +17,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac LIB_DEPS += axi_i2s_adi -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/adrv9361z7035/ccfmc_lvds/Makefile b/projects/adrv9361z7035/ccfmc_lvds/Makefile index bc39b86ab..993d2dfe9 100644 --- a/projects/adrv9361z7035/ccfmc_lvds/Makefile +++ b/projects/adrv9361z7035/ccfmc_lvds/Makefile @@ -21,12 +21,12 @@ LIB_DEPS += axi_gpreg LIB_DEPS += axi_hdmi_tx LIB_DEPS += axi_i2s_adi LIB_DEPS += axi_spdif_tx -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo LIB_DEPS += xilinx/axi_xcvrlb +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/adrv9364z7020/ccbob_cmos/Makefile b/projects/adrv9364z7020/ccbob_cmos/Makefile index 6f7096597..923023cd1 100644 --- a/projects/adrv9364z7020/ccbob_cmos/Makefile +++ b/projects/adrv9364z7020/ccbob_cmos/Makefile @@ -16,11 +16,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac LIB_DEPS += axi_gpreg -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/adrv9364z7020/ccbob_lvds/Makefile b/projects/adrv9364z7020/ccbob_lvds/Makefile index 7eb7f8729..453a36820 100644 --- a/projects/adrv9364z7020/ccbob_lvds/Makefile +++ b/projects/adrv9364z7020/ccbob_lvds/Makefile @@ -16,11 +16,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac LIB_DEPS += axi_gpreg -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/adrv9364z7020/ccbox_lvds/Makefile b/projects/adrv9364z7020/ccbox_lvds/Makefile index e6b71b731..e61de979e 100644 --- a/projects/adrv9364z7020/ccbox_lvds/Makefile +++ b/projects/adrv9364z7020/ccbox_lvds/Makefile @@ -17,11 +17,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac LIB_DEPS += axi_i2s_adi -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/kc705/Makefile b/projects/fmcomms2/kc705/Makefile index a226efe59..def4677e8 100644 --- a/projects/fmcomms2/kc705/Makefile +++ b/projects/fmcomms2/kc705/Makefile @@ -14,11 +14,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/kcu105/Makefile b/projects/fmcomms2/kcu105/Makefile index 69e104f4a..df37588f4 100644 --- a/projects/fmcomms2/kcu105/Makefile +++ b/projects/fmcomms2/kcu105/Makefile @@ -15,11 +15,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/vc707/Makefile b/projects/fmcomms2/vc707/Makefile index a27526c46..9c58a7a99 100644 --- a/projects/fmcomms2/vc707/Makefile +++ b/projects/fmcomms2/vc707/Makefile @@ -14,11 +14,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/zc702/Makefile b/projects/fmcomms2/zc702/Makefile index 35f73669d..523f46121 100644 --- a/projects/fmcomms2/zc702/Makefile +++ b/projects/fmcomms2/zc702/Makefile @@ -16,11 +16,11 @@ LIB_DEPS += axi_clkgen LIB_DEPS += axi_dmac LIB_DEPS += axi_hdmi_tx LIB_DEPS += axi_spdif_tx -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/zc706/Makefile b/projects/fmcomms2/zc706/Makefile index d4d37a364..811ed8dec 100644 --- a/projects/fmcomms2/zc706/Makefile +++ b/projects/fmcomms2/zc706/Makefile @@ -16,11 +16,11 @@ LIB_DEPS += axi_clkgen LIB_DEPS += axi_dmac LIB_DEPS += axi_hdmi_tx LIB_DEPS += axi_spdif_tx -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/zcu102/Makefile b/projects/fmcomms2/zcu102/Makefile index 677735b4f..15728c49f 100644 --- a/projects/fmcomms2/zcu102/Makefile +++ b/projects/fmcomms2/zcu102/Makefile @@ -13,11 +13,11 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/zed/Makefile b/projects/fmcomms2/zed/Makefile index 940b9128c..409001761 100644 --- a/projects/fmcomms2/zed/Makefile +++ b/projects/fmcomms2/zed/Makefile @@ -17,12 +17,12 @@ LIB_DEPS += axi_dmac LIB_DEPS += axi_hdmi_tx LIB_DEPS += axi_i2s_adi LIB_DEPS += axi_spdif_tx -LIB_DEPS += util_clkdiv LIB_DEPS += util_i2c_mixer LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_tdd_sync LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms5/zc702/Makefile b/projects/fmcomms5/zc702/Makefile index 9578a6a32..7e9a65e7c 100644 --- a/projects/fmcomms5/zc702/Makefile +++ b/projects/fmcomms5/zc702/Makefile @@ -16,10 +16,10 @@ LIB_DEPS += axi_clkgen LIB_DEPS += axi_dmac LIB_DEPS += axi_hdmi_tx LIB_DEPS += axi_spdif_tx -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms5/zc706/Makefile b/projects/fmcomms5/zc706/Makefile index f9daa15e0..b2b803ce4 100644 --- a/projects/fmcomms5/zc706/Makefile +++ b/projects/fmcomms5/zc706/Makefile @@ -16,10 +16,10 @@ LIB_DEPS += axi_clkgen LIB_DEPS += axi_dmac LIB_DEPS += axi_hdmi_tx LIB_DEPS += axi_spdif_tx -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms5/zcu102/Makefile b/projects/fmcomms5/zcu102/Makefile index 4f3aaa69b..7e0112073 100644 --- a/projects/fmcomms5/zcu102/Makefile +++ b/projects/fmcomms5/zcu102/Makefile @@ -13,10 +13,10 @@ M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl LIB_DEPS += axi_ad9361 LIB_DEPS += axi_dmac -LIB_DEPS += util_clkdiv LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_rfifo LIB_DEPS += util_wfifo +LIB_DEPS += xilinx/util_clkdiv include ../../scripts/project-xilinx.mk