itx045: updates
parent
ff443655ca
commit
aced144916
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@ -1,14 +1,10 @@
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# create board design
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# interface ports
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# default ports
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_main
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create_bd_port -dir I -from 63 -to 0 gpio_i
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create_bd_port -dir O -from 63 -to 0 gpio_o
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create_bd_port -dir O -from 63 -to 0 gpio_t
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# spi interface
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create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 fixed_io
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create_bd_port -dir O spi0_csn_2_o
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create_bd_port -dir O spi0_csn_1_o
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@ -30,6 +26,10 @@ create_bd_port -dir I spi1_sdo_i
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create_bd_port -dir O spi1_sdo_o
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create_bd_port -dir I spi1_sdi_i
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create_bd_port -dir I -from 63 -to 0 gpio_i
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create_bd_port -dir O -from 63 -to 0 gpio_o
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create_bd_port -dir O -from 63 -to 0 gpio_t
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# hdmi interface
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create_bd_port -dir O hdmi_out_clk
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@ -38,15 +38,15 @@ create_bd_port -dir O hdmi_vsync
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create_bd_port -dir O hdmi_data_e
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create_bd_port -dir O -from 15 -to 0 hdmi_data
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# spdif audio
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create_bd_port -dir O spdif
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# i2s
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create_bd_port -dir O -type clk i2s_mclk
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create_bd_intf_port -mode Master -vlnv analog.com:interface:i2s_rtl:1.0 i2s
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# spdif audio
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create_bd_port -dir O spdif
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# interrupts
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create_bd_port -dir I -type intr ps_intr_00
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@ -67,15 +67,16 @@ create_bd_port -dir I -type intr ps_intr_13
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# instance: sys_ps7
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set sys_ps7 [create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.5 sys_ps7]
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apply_bd_automation -rule xilinx.com:bd_rule:processing_system7 -config {make_external "fixed_io, ddr" apply_board_preset "1" Master "Disable" Slave "Disable" } $sys_ps7
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source $ad_hdl_dir/projects/common/mitx045/mitx045_system_ps7.tcl
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set_property -dict [list CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {0}] $sys_ps7
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set_property -dict [list CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1} ] $sys_ps7
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set_property -dict [list CONFIG.PCW_EN_CLK1_PORT {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_EN_RST1_PORT {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100.0}] $sys_ps7
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set_property -dict [list CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ {200.0}] $sys_ps7
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set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {200.0}] $sys_ps7
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set_property -dict [list CONFIG.PCW_USE_FABRIC_INTERRUPT {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_USE_S_AXI_HP0 {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_IRQ_F2P_INTR {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE {1}] $sys_ps7
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set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {64}] $sys_ps7
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@ -135,13 +136,15 @@ ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
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# interface connections
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ad_connect ddr sys_ps7/DDR
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ad_connect gpio_i sys_ps7/GPIO_I
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ad_connect gpio_o sys_ps7/GPIO_O
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ad_connect gpio_t sys_ps7/GPIO_T
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ad_connect fixed_io sys_ps7/FIXED_IO
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ad_connect iic_main axi_iic_main/iic
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ad_connect sys_200m_clk axi_hdmi_clkgen/clk
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# spi connection
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# spi connections
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ad_connect spi0_csn_2_o sys_ps7/SPI0_SS2_O
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ad_connect spi0_csn_1_o sys_ps7/SPI0_SS1_O
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@ -194,20 +197,17 @@ ad_connect spdif axi_spdif_tx_core/spdif_tx_o
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ad_connect sys_cpu_clk axi_i2s_adi/DMA_REQ_RX_ACLK
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ad_connect sys_cpu_clk axi_i2s_adi/DMA_REQ_TX_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA1_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA2_ACLK
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ad_connect sys_cpu_resetn axi_i2s_adi/DMA_REQ_RX_RSTN
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ad_connect sys_cpu_resetn axi_i2s_adi/DMA_REQ_TX_RSTN
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ad_connect i2s_mclk sys_audio_clkgen/clk_out1
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ad_connect axi_i2s_adi/DATA_CLK_I sys_audio_clkgen/clk_out1
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ad_connect i2s axi_i2s_adi/I2S
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ad_connect sys_ps7/DMA1_REQ axi_i2s_adi/DMA_REQ_TX
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ad_connect sys_ps7/DMA1_ACK axi_i2s_adi/DMA_ACK_TX
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ad_connect sys_ps7/DMA2_REQ axi_i2s_adi/DMA_REQ_RX
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ad_connect sys_ps7/DMA2_ACK axi_i2s_adi/DMA_ACK_RX
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ad_connect sys_cpu_clk sys_ps7/DMA1_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA2_ACLK
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ad_connect sys_audio_clkgen/clk_out1 i2s_mclk
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ad_connect sys_audio_clkgen/clk_out1 axi_i2s_adi/DATA_CLK_I
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ad_connect i2s axi_i2s_adi/I2S
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# interrupts
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