axi_hdmi_tx: Add parameter to configure the output clock polarity
In order to maximize the window where it is safe to capture data we ideally want to launch data on the opposite edge to which it is captured. Since the edge on which data is captured depends on the connected device add a parameter that allows to configure the launching edge. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
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6dddac5d94
commit
acd9efc528
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@ -103,6 +103,8 @@ module axi_hdmi_tx (
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parameter CR_CB_N = 0;
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parameter CR_CB_N = 0;
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parameter DEVICE_TYPE = 0;
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parameter DEVICE_TYPE = 0;
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parameter EMBEDDED_SYNC = 0;
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parameter EMBEDDED_SYNC = 0;
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/* 0 = Launch on rising edge, 1 = Launch on falling edge */
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parameter OUT_CLK_POLARITY = 0;
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localparam XILINX_7SERIES = 0;
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localparam XILINX_7SERIES = 0;
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localparam XILINX_ULTRASCALE = 1;
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localparam XILINX_ULTRASCALE = 1;
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@ -362,8 +364,8 @@ module axi_hdmi_tx (
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if (DEVICE_TYPE == XILINX_ULTRASCALE) begin
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if (DEVICE_TYPE == XILINX_ULTRASCALE) begin
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ODDRE1 #(.SRVAL(1'b0)) i_clk_oddr (
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ODDRE1 #(.SRVAL(1'b0)) i_clk_oddr (
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.SR (1'b0),
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.SR (1'b0),
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.D1 (1'b1),
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.D1 (~OUT_CLK_POLARITY),
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.D2 (1'b0),
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.D2 (OUT_CLK_POLARITY),
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.C (hdmi_clk),
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.C (hdmi_clk),
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.Q (hdmi_out_clk));
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.Q (hdmi_out_clk));
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end
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end
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@ -375,8 +377,8 @@ module axi_hdmi_tx (
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.sset (1'b0),
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.sset (1'b0),
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.oe (1'b1),
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.oe (1'b1),
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.outclocken (1'b1),
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.outclocken (1'b1),
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.datain_h (1'b1),
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.datain_h (~OUT_CLK_POLARITY),
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.datain_l (1'b0),
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.datain_l (OUT_CLK_POLARITY),
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.outclock (hdmi_clk),
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.outclock (hdmi_clk),
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.oe_out (),
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.oe_out (),
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.dataout (hdmi_out_clk));
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.dataout (hdmi_out_clk));
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@ -386,8 +388,8 @@ module axi_hdmi_tx (
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.R (1'b0),
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.R (1'b0),
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.S (1'b0),
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.S (1'b0),
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.CE (1'b1),
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.CE (1'b1),
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.D1 (1'b1),
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.D1 (~OUT_CLK_POLARITY),
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.D2 (1'b0),
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.D2 (OUT_CLK_POLARITY),
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.C (hdmi_clk),
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.C (hdmi_clk),
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.Q (hdmi_out_clk));
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.Q (hdmi_out_clk));
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end
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end
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