From acd9efc528cc661b752c71894264a4efecc0c63e Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Tue, 3 Nov 2015 10:36:49 +0100 Subject: [PATCH] axi_hdmi_tx: Add parameter to configure the output clock polarity In order to maximize the window where it is safe to capture data we ideally want to launch data on the opposite edge to which it is captured. Since the edge on which data is captured depends on the connected device add a parameter that allows to configure the launching edge. Signed-off-by: Lars-Peter Clausen --- library/axi_hdmi_tx/axi_hdmi_tx.v | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/library/axi_hdmi_tx/axi_hdmi_tx.v b/library/axi_hdmi_tx/axi_hdmi_tx.v index bd9762e11..1413a39b3 100644 --- a/library/axi_hdmi_tx/axi_hdmi_tx.v +++ b/library/axi_hdmi_tx/axi_hdmi_tx.v @@ -103,6 +103,8 @@ module axi_hdmi_tx ( parameter CR_CB_N = 0; parameter DEVICE_TYPE = 0; parameter EMBEDDED_SYNC = 0; + /* 0 = Launch on rising edge, 1 = Launch on falling edge */ + parameter OUT_CLK_POLARITY = 0; localparam XILINX_7SERIES = 0; localparam XILINX_ULTRASCALE = 1; @@ -362,8 +364,8 @@ module axi_hdmi_tx ( if (DEVICE_TYPE == XILINX_ULTRASCALE) begin ODDRE1 #(.SRVAL(1'b0)) i_clk_oddr ( .SR (1'b0), - .D1 (1'b1), - .D2 (1'b0), + .D1 (~OUT_CLK_POLARITY), + .D2 (OUT_CLK_POLARITY), .C (hdmi_clk), .Q (hdmi_out_clk)); end @@ -375,8 +377,8 @@ module axi_hdmi_tx ( .sset (1'b0), .oe (1'b1), .outclocken (1'b1), - .datain_h (1'b1), - .datain_l (1'b0), + .datain_h (~OUT_CLK_POLARITY), + .datain_l (OUT_CLK_POLARITY), .outclock (hdmi_clk), .oe_out (), .dataout (hdmi_out_clk)); @@ -386,8 +388,8 @@ module axi_hdmi_tx ( .R (1'b0), .S (1'b0), .CE (1'b1), - .D1 (1'b1), - .D2 (1'b0), + .D1 (~OUT_CLK_POLARITY), + .D2 (OUT_CLK_POLARITY), .C (hdmi_clk), .Q (hdmi_out_clk)); end