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adc/dac - prefix parameters

main
Rejeesh Kutty 2016-02-17 14:16:04 -05:00
parent 5518c47ca4
commit a8e9d72273
4 changed files with 12 additions and 8 deletions
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5
library/common/up_adc_channel.v
View File

@ -96,6 +96,7 @@ module up_adc_channel (
// parameters
parameter ADC_COMMON_ID = 6'h01;
parameter ADC_CHANNEL_ID = 4'h0;
// adc interface
@ -211,8 +212,8 @@ module up_adc_channel (
// decode block select
assign up_wreq_s = ((up_waddr[13:8] == 6'h01) && (up_waddr[7:4] == ADC_CHANNEL_ID)) ? up_wreq : 1'b0;
assign up_rreq_s = ((up_raddr[13:8] == 6'h01) && (up_raddr[7:4] == ADC_CHANNEL_ID)) ? up_rreq : 1'b0;
assign up_wreq_s = ((up_waddr[13:8] == ADC_COMMON_ID) && (up_waddr[7:4] == ADC_CHANNEL_ID)) ? up_wreq : 1'b0;
assign up_rreq_s = ((up_raddr[13:8] == ADC_COMMON_ID) && (up_raddr[7:4] == ADC_CHANNEL_ID)) ? up_rreq : 1'b0;
// processor write interface

5
library/common/up_adc_common.v
View File

@ -98,6 +98,7 @@ module up_adc_common (
localparam PCORE_VERSION = 32'h00090062;
parameter ID = 0;
parameter ADC_COMMON_ID = 6'h00;
// clock reset
@ -194,8 +195,8 @@ module up_adc_common (
// decode block select
assign up_wreq_s = (up_waddr[13:8] == 6'h00) ? up_wreq : 1'b0;
assign up_rreq_s = (up_raddr[13:8] == 6'h00) ? up_rreq : 1'b0;
assign up_wreq_s = (up_waddr[13:8] == ADC_COMMON_ID) ? up_wreq : 1'b0;
assign up_rreq_s = (up_raddr[13:8] == ADC_COMMON_ID) ? up_rreq : 1'b0;
// processor write interface

5
library/common/up_dac_channel.v
View File

@ -90,6 +90,7 @@ module up_dac_channel (
// parameters
parameter DAC_COMMON_ID = 6'h11;
parameter DAC_CHANNEL_ID = 4'h0;
// dac interface
@ -193,8 +194,8 @@ module up_dac_channel (
// decode block select
assign up_wreq_s = ((up_waddr[13:8] == 6'h11) && (up_waddr[7:4] == DAC_CHANNEL_ID)) ? up_wreq : 1'b0;
assign up_rreq_s = ((up_raddr[13:8] == 6'h11) && (up_raddr[7:4] == DAC_CHANNEL_ID)) ? up_rreq : 1'b0;
assign up_wreq_s = ((up_waddr[13:8] == DAC_COMMON_ID) && (up_waddr[7:4] == DAC_CHANNEL_ID)) ? up_wreq : 1'b0;
assign up_rreq_s = ((up_raddr[13:8] == DAC_COMMON_ID) && (up_raddr[7:4] == DAC_CHANNEL_ID)) ? up_rreq : 1'b0;
// processor write interface

5
library/common/up_dac_common.v
View File

@ -93,6 +93,7 @@ module up_dac_common (
localparam PCORE_VERSION = 32'h00080062;
parameter ID = 0;
parameter DAC_COMMON_ID = 6'h10;
// mmcm reset
@ -194,8 +195,8 @@ module up_dac_common (
// decode block select
assign up_wreq_s = (up_waddr[13:8] == 6'h10) ? up_wreq : 1'b0;
assign up_rreq_s = (up_raddr[13:8] == 6'h10) ? up_rreq : 1'b0;
assign up_wreq_s = (up_waddr[13:8] == DAC_COMMON_ID) ? up_wreq : 1'b0;
assign up_rreq_s = (up_raddr[13:8] == DAC_COMMON_ID) ? up_rreq : 1'b0;
// processor write interface