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projects: Add missing sysid IP (#1172) 

* Projects: Add missing sysid IP

* Added make parameters for the sysid ip for the projects: ad9209_fmca_ebz/vck190, ad9213_dual_ebz/s10soc and adrv9009/s10soc

Signed-off-by: Pop Ioan Daniel <pop.ioan-daniel@analog.com>
main
PIoandan 2023-11-03 09:52:13 +02:00 committed by GitHub
parent a09ee9d481
commit a806a6f6ec
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6 changed files with 33 additions and 0 deletions
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3
projects/ad9213_dual_ebz/s10soc/Makefile
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@ -7,13 +7,16 @@
PROJECT_NAME := ad9213_dual_ebz_s10soc
M_DEPS += ../common/ad9213_dual_qsys.tcl
M_DEPS += ../../scripts/adi_pd.tcl
M_DEPS += ../../common/s10soc/s10soc_system_qsys.tcl
M_DEPS += ../../common/s10soc/s10soc_system_assign.tcl
M_DEPS += ../../common/intel/adcfifo_qsys.tcl
M_DEPS += ../../../library/common/ad_3w_spi.v
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += sysid_rom
include ../../scripts/project-intel.mk

9
projects/ad9213_dual_ebz/s10soc/system_qsys.tcl
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@ -5,6 +5,7 @@
set adc_fifo_address_width 15
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
source $ad_hdl_dir/projects/common/s10soc/s10soc_system_qsys.tcl
source $ad_hdl_dir/projects/common/intel/adcfifo_qsys.tcl
@ -13,3 +14,11 @@ if [info exists ad_project_dir] {
} else {
source ../common/ad9213_dual_qsys.tcl
}
#system ID
set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {PATH_TO_FILE} "$mem_init_sys_file_path/mem_init_sys.txt"
sysid_gen_sys_init_file

3
projects/adrv9009/s10soc/Makefile
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@ -7,14 +7,17 @@
PROJECT_NAME := adrv9009_s10soc
M_DEPS += ../common/adrv9009_qsys.tcl
M_DEPS += ../../scripts/adi_pd.tcl
M_DEPS += ../../common/s10soc/s10soc_system_qsys.tcl
M_DEPS += ../../common/s10soc/s10soc_system_assign.tcl
M_DEPS += ../../common/intel/dacfifo_qsys.tcl
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

10
projects/adrv9009/s10soc/system_qsys.tcl
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@ -6,6 +6,7 @@
set dac_fifo_address_width 10
set xcvr_reconfig_addr_width 11
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
source $ad_hdl_dir/projects/common/s10soc/s10soc_system_qsys.tcl
source $ad_hdl_dir/projects/common/intel/dacfifo_qsys.tcl
@ -14,3 +15,12 @@ if [info exists ad_project_dir] {
} else {
source ../common/adrv9009_qsys.tcl
}
#system ID
set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {PATH_TO_FILE} "$mem_init_sys_file_path/mem_init_sys.txt"
sysid_gen_sys_init_file

2
projects/common/s10soc/Makefile
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@ -9,5 +9,7 @@ PROJECT_NAME := template_s10soc
M_DEPS += ../../common/s10soc/s10soc_system_qsys.tcl
M_DEPS += ../../common/s10soc/s10soc_system_assign.tcl
LIB_DEPS += axi_sysid
LIB_DEPS += sysid_rom
include ../../scripts/project-intel.mk

6
projects/common/s10soc/s10soc_system_qsys.tcl
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@ -24,10 +24,16 @@ set_interface_property rst_ninit_done EXPORT_OF s10_reset.ninit_done
# sysid
add_instance axi_sysid_0 axi_sysid
add_instance rom_sys_0 sysid_rom
add_instance sys_id altera_avalon_sysid_qsys
set_instance_parameter_value sys_id {ID} {0x00000100}
add_connection sys_clk.clk sys_id.clk
add_connection sys_clk.clk_reset sys_id.reset
add_connection sys_clk.clk rom_sys_0.if_clk
add_connection sys_clk.clk axi_sysid_0.s_axi_clock
add_connection sys_clk.clk_reset axi_sysid_0.s_axi_reset
# hps
# round-about way - qsys-script doesn't support {*}?