ad9250 - build fixes
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d7357d781b
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a58597c13a
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@ -87,6 +87,7 @@ module axi_ad9250_if (
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wire [15:0] adc_data_a_s0_s;
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wire [15:0] adc_data_b_s1_s;
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wire [15:0] adc_data_b_s0_s;
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wire [63:0] rx_data_s;
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// adc clock is the reference clock
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@ -121,7 +122,7 @@ module axi_ad9250_if (
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genvar n;
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generate
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for (n = 0; n < 4; n = n + 1) begin: g_xcvr_if
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for (n = 0; n < 2; n = n + 1) begin: g_xcvr_if
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ad_xcvr_rx_if #(.DEVICE_TYPE (DEVICE_TYPE)) i_xcvr_if (
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.rx_clk (rx_clk),
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.rx_ip_sof (rx_sof),
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