library/ad9122- constraints clean-up

main
Rejeesh Kutty 2017-02-02 14:21:41 -05:00
parent 1e54b5230f
commit a57fb5f82f
2 changed files with 6 additions and 4 deletions

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@ -1 +1,3 @@
# false path definitions will come here
set_false_path -from [get_registers *up_drp_locked*] -to [get_registers *dac_status_m1*]

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@ -1,3 +1,3 @@
set_false_path -from [get_cells -hier -filter {name =~ *up_drp_locked_reg && IS_SEQUENTIAL}] -to [get_cells -hier -filter {name =~ *dac_status_m1_reg && IS_SEQUENTIAL}]
set_false_path -from [get_cells -hier -filter {name =~ */axi_ad9122/*/i_core_rst_reg/rst_reg* && IS_SEQUENTIAL}]
-to [get_cells -hier -filter {name =~ */axi_ad9122/inst/i_if/i_serdes_out_clk/g_data[0].i_serdes && IS_SEQUENTIAL}]
set_false_path -from [get_cells -hier -filter {name =~ *up_drp_locked_reg && IS_SEQUENTIAL}] \
-to [get_cells -hier -filter {name =~ *dac_status_m1_reg && IS_SEQUENTIAL}]