From a49eb5853b8b676e5724dc071abea9400ff48760 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Tue, 26 Aug 2014 16:28:41 +0300 Subject: [PATCH] ZED, ZC702: Added contraints so that projects can successfully synthesize on linux systems For ZC706 Fixed one constraint which was not correct --- projects/common/zc702/zc702_system_constr.xdc | 6 +++++- projects/common/zc706/zc706_system_constr.xdc | 4 ++-- projects/common/zed/zed_system_constr.xdc | 6 +++++- projects/fmcomms5/zc702/system_constr.xdc | 2 ++ 4 files changed, 14 insertions(+), 4 deletions(-) mode change 100644 => 100755 projects/fmcomms5/zc702/system_constr.xdc diff --git a/projects/common/zc702/zc702_system_constr.xdc b/projects/common/zc702/zc702_system_constr.xdc index f4988d70f..7f56a7eac 100644 --- a/projects/common/zc702/zc702_system_constr.xdc +++ b/projects/common/zc702/zc702_system_constr.xdc @@ -60,8 +60,12 @@ create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_ create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0] create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1] +create_clock -name ps7_clk_0 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[0]] +create_clock -name ps7_clk_1 -period 5.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[1]] + set_clock_groups -asynchronous -group {cpu_clk} set_clock_groups -asynchronous -group {m200_clk} set_clock_groups -asynchronous -group {hdmi_clk} set_clock_groups -asynchronous -group {spdif_clk} - +set_clock_groups -asynchronous -group {ps7_clk_0} +set_clock_groups -asynchronous -group {ps7_clk_1} diff --git a/projects/common/zc706/zc706_system_constr.xdc b/projects/common/zc706/zc706_system_constr.xdc index a20be0fab..0f1083faf 100644 --- a/projects/common/zc706/zc706_system_constr.xdc +++ b/projects/common/zc706/zc706_system_constr.xdc @@ -67,8 +67,8 @@ create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_ create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0] create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1] -create_clock -name ps7_clk_0 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[0]] -create_clock -name ps7_clk_1 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[1]] +create_clock -name ps7_clk_0 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[0]] +create_clock -name ps7_clk_1 -period 5.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[1]] set_clock_groups -asynchronous -group {cpu_clk} set_clock_groups -asynchronous -group {m200_clk} diff --git a/projects/common/zed/zed_system_constr.xdc b/projects/common/zed/zed_system_constr.xdc index cdabe69ae..e7728c372 100644 --- a/projects/common/zed/zed_system_constr.xdc +++ b/projects/common/zed/zed_system_constr.xdc @@ -94,8 +94,12 @@ create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_ create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0] create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1] +create_clock -name ps7_clk_0 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[0]] +create_clock -name ps7_clk_1 -period 5.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[1]] + set_clock_groups -asynchronous -group {cpu_clk} set_clock_groups -asynchronous -group {m200_clk} set_clock_groups -asynchronous -group {hdmi_clk} set_clock_groups -asynchronous -group {spdif_clk} - +set_clock_groups -asynchronous -group {ps7_clk_0} +set_clock_groups -asynchronous -group {ps7_clk_1} diff --git a/projects/fmcomms5/zc702/system_constr.xdc b/projects/fmcomms5/zc702/system_constr.xdc old mode 100644 new mode 100755 index da6c9d2e4..c7f767df9 --- a/projects/fmcomms5/zc702/system_constr.xdc +++ b/projects/fmcomms5/zc702/system_constr.xdc @@ -134,7 +134,9 @@ create_clock -name rx_0_clk -period 5.00 [get_ports rx_clk_in_0_p] create_clock -name rx_1_clk -period 5.00 [get_ports rx_clk_in_1_p] create_clock -name ad9361_clk -period 5.00 [get_pins i_system_wrapper/system_i/axi_ad9361_0/clk] create_clock -name fmc_dma_clk -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK2] +create_clock -name ps7_clk_2 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[2]] set_clock_groups -asynchronous -group {ad9361_clk} set_clock_groups -asynchronous -group {fmc_dma_clk} +set_clock_groups -asynchronous -group {ps7_clk_2}