axi_ad9361: Bring up the tdd_enable bit
This line will be the selection bit of the GPIO/TDD_FSM mux for ENABLE/TXNRX controlmain
parent
23034965c8
commit
a497dcabb5
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@ -108,6 +108,8 @@ module axi_ad9361 (
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dac_dunf,
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dac_r1_mode,
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tdd_enable,
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enable,
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txnrx,
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@ -222,6 +224,8 @@ module axi_ad9361 (
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input dac_dunf;
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output dac_r1_mode;
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output tdd_enable;
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output enable;
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output txnrx;
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@ -397,6 +401,7 @@ module axi_ad9361 (
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.tdd_tx_vco_en(tdd_tx_vco_en_s),
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.tdd_rx_rf_en(tdd_rx_rf_en_s),
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.tdd_tx_rf_en(tdd_tx_rf_en_s),
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.tdd_enable (tdd_enable),
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.tdd_status(tdd_status_s),
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.tx_valid_i0(dac_valid_i0_s),
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.tx_valid_q0(dac_valid_q0_s),
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@ -55,6 +55,7 @@ module axi_ad9361_tdd (
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// status signal
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tdd_enable,
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tdd_status,
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// tx data flow control
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@ -95,6 +96,7 @@ module axi_ad9361_tdd (
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output tdd_rx_rf_en;
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output tdd_tx_rf_en;
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output tdd_enable;
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input [ 7:0] tdd_status;
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// tx data flow control
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@ -169,6 +171,8 @@ module axi_ad9361_tdd (
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assign tdd_tx_valid_i1 = (tdd_enable_s == 1'b1) ? (tx_valid_i1 & tdd_tx_dp_en_s) : tx_valid_i1;
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assign tdd_tx_valid_q1 = (tdd_enable_s == 1'b1) ? (tx_valid_q1 & tdd_tx_dp_en_s) : tx_valid_q1;
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assign tdd_enable = tdd_enable_s;
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// instantiations
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up_tdd_cntrl i_up_tdd_cntrl(
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