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axi_logic_analyzer: Fix push-pull/open-drain selection

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Adrian Costina 2018-02-07 11:11:27 +02:00
parent a740b6012f
commit 9baf910339
1 changed files with 1 additions and 1 deletions
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library/axi_logic_analyzer/axi_logic_analyzer.v
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@ -192,7 +192,7 @@ module axi_logic_analyzer (
generate generate
for (i = 0 ; i < 16; i = i + 1) begin for (i = 0 ; i < 16; i = i + 1) begin
assign data_t[i] = od_pp_n[i] ? io_selection[i] & !data_o[i] : io_selection[i]; assign data_t[i] = od_pp_n[i] ? io_selection[i] | data_o[i] : io_selection[i];
always @(posedge clk_out) begin always @(posedge clk_out) begin
data_o[i] <= overwrite_enable[i] ? overwrite_data[i] : data_r[i]; data_o[i] <= overwrite_enable[i] ? overwrite_data[i] : data_r[i];
end end