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adxcvr: Increase version to 17.5.a 

Add suport for XCVR phase adjust buffer status:
   - Expose TXBUFSTATUS and RXBUFSTATUS
   - Create RXBUFSTATUS_RST flag for clearing RXBUFSTATUS
main
Filip Gherman 2021-10-01 17:41:30 +03:00 committed by Laszlo Nagy
parent c5d216bba9
commit 9b7c2852b6
9 changed files with 349 additions and 48 deletions
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2
library/interfaces/interfaces_ip.tcl
View File

@ -34,6 +34,8 @@ adi_if_ports output 1 wr
adi_if_ports output 16 wdata
adi_if_ports input 16 rdata
adi_if_ports input 1 ready
adi_if_ports output 2 bufstatus
adi_if_ports output 1 bufstatus_rst
adi_if_define if_gt_qpll
adi_if_ports output 1 qpll_rst reset

179
library/xilinx/axi_adxcvr/axi_adxcvr.v
View File

@ -79,10 +79,12 @@ module axi_adxcvr #(
output up_ch_user_ready_0,
input up_ch_rst_done_0,
output up_ch_prbsforceerr_0,
output [ 3:0] up_ch_prbssel_0,
output [ 3:0] up_ch_prbssel_0,
output up_ch_prbscntreset_0,
input up_ch_prbserr_0,
input up_ch_prbslocked_0,
input [ 1:0] up_ch_bufstatus_0,
output up_ch_bufstatus_rst_0,
output up_ch_lpm_dfe_n_0,
output [ 2:0] up_ch_rate_0,
output [ 1:0] up_ch_sys_clk_sel_0,
@ -110,10 +112,12 @@ module axi_adxcvr #(
output up_ch_user_ready_1,
input up_ch_rst_done_1,
output up_ch_prbsforceerr_1,
output [ 3:0] up_ch_prbssel_1,
output [ 3:0] up_ch_prbssel_1,
output up_ch_prbscntreset_1,
input up_ch_prbserr_1,
input up_ch_prbslocked_1,
input [ 1:0] up_ch_bufstatus_1,
output up_ch_bufstatus_rst_1,
output up_ch_lpm_dfe_n_1,
output [ 2:0] up_ch_rate_1,
output [ 1:0] up_ch_sys_clk_sel_1,
@ -141,10 +145,12 @@ module axi_adxcvr #(
output up_ch_user_ready_2,
input up_ch_rst_done_2,
output up_ch_prbsforceerr_2,
output [ 3:0] up_ch_prbssel_2,
output [ 3:0] up_ch_prbssel_2,
output up_ch_prbscntreset_2,
input up_ch_prbserr_2,
input up_ch_prbslocked_2,
input [ 1:0] up_ch_bufstatus_2,
output up_ch_bufstatus_rst_2,
output up_ch_lpm_dfe_n_2,
output [ 2:0] up_ch_rate_2,
output [ 1:0] up_ch_sys_clk_sel_2,
@ -172,10 +178,12 @@ module axi_adxcvr #(
output up_ch_user_ready_3,
input up_ch_rst_done_3,
output up_ch_prbsforceerr_3,
output [ 3:0] up_ch_prbssel_3,
output [ 3:0] up_ch_prbssel_3,
output up_ch_prbscntreset_3,
input up_ch_prbserr_3,
input up_ch_prbslocked_3,
input [ 1:0] up_ch_bufstatus_3,
output up_ch_bufstatus_rst_3,
output up_ch_lpm_dfe_n_3,
output [ 2:0] up_ch_rate_3,
output [ 1:0] up_ch_sys_clk_sel_3,
@ -210,10 +218,12 @@ module axi_adxcvr #(
output up_ch_user_ready_4,
input up_ch_rst_done_4,
output up_ch_prbsforceerr_4,
output [ 3:0] up_ch_prbssel_4,
output [ 3:0] up_ch_prbssel_4,
output up_ch_prbscntreset_4,
input up_ch_prbserr_4,
input up_ch_prbslocked_4,
input [ 1:0] up_ch_bufstatus_4,
output up_ch_bufstatus_rst_4,
output up_ch_lpm_dfe_n_4,
output [ 2:0] up_ch_rate_4,
output [ 1:0] up_ch_sys_clk_sel_4,
@ -241,10 +251,12 @@ module axi_adxcvr #(
output up_ch_user_ready_5,
input up_ch_rst_done_5,
output up_ch_prbsforceerr_5,
output [ 3:0] up_ch_prbssel_5,
output [ 3:0] up_ch_prbssel_5,
output up_ch_prbscntreset_5,
input up_ch_prbserr_5,
input up_ch_prbslocked_5,
input [ 1:0] up_ch_bufstatus_5,
output up_ch_bufstatus_rst_5,
output up_ch_lpm_dfe_n_5,
output [ 2:0] up_ch_rate_5,
output [ 1:0] up_ch_sys_clk_sel_5,
@ -272,10 +284,12 @@ module axi_adxcvr #(
output up_ch_user_ready_6,
input up_ch_rst_done_6,
output up_ch_prbsforceerr_6,
output [ 3:0] up_ch_prbssel_6,
output [ 3:0] up_ch_prbssel_6,
output up_ch_prbscntreset_6,
input up_ch_prbserr_6,
input up_ch_prbslocked_6,
input [ 1:0] up_ch_bufstatus_6,
output up_ch_bufstatus_rst_6,
output up_ch_lpm_dfe_n_6,
output [ 2:0] up_ch_rate_6,
output [ 1:0] up_ch_sys_clk_sel_6,
@ -303,10 +317,12 @@ module axi_adxcvr #(
output up_ch_user_ready_7,
input up_ch_rst_done_7,
output up_ch_prbsforceerr_7,
output [ 3:0] up_ch_prbssel_7,
output [ 3:0] up_ch_prbssel_7,
output up_ch_prbscntreset_7,
input up_ch_prbserr_7,
input up_ch_prbslocked_7,
input [ 1:0] up_ch_bufstatus_7,
output up_ch_bufstatus_rst_7,
output up_ch_lpm_dfe_n_7,
output [ 2:0] up_ch_rate_7,
output [ 1:0] up_ch_sys_clk_sel_7,
@ -341,10 +357,12 @@ module axi_adxcvr #(
output up_ch_user_ready_8,
input up_ch_rst_done_8,
output up_ch_prbsforceerr_8,
output [ 3:0] up_ch_prbssel_8,
output [ 3:0] up_ch_prbssel_8,
output up_ch_prbscntreset_8,
input up_ch_prbserr_8,
input up_ch_prbslocked_8,
input [ 1:0] up_ch_bufstatus_8,
output up_ch_bufstatus_rst_8,
output up_ch_lpm_dfe_n_8,
output [ 2:0] up_ch_rate_8,
output [ 1:0] up_ch_sys_clk_sel_8,
@ -372,10 +390,12 @@ module axi_adxcvr #(
output up_ch_user_ready_9,
input up_ch_rst_done_9,
output up_ch_prbsforceerr_9,
output [ 3:0] up_ch_prbssel_9,
output [ 3:0] up_ch_prbssel_9,
output up_ch_prbscntreset_9,
input up_ch_prbserr_9,
input up_ch_prbslocked_9,
input [ 1:0] up_ch_bufstatus_9,
output up_ch_bufstatus_rst_9,
output up_ch_lpm_dfe_n_9,
output [ 2:0] up_ch_rate_9,
output [ 1:0] up_ch_sys_clk_sel_9,
@ -403,10 +423,12 @@ module axi_adxcvr #(
output up_ch_user_ready_10,
input up_ch_rst_done_10,
output up_ch_prbsforceerr_10,
output [ 3:0] up_ch_prbssel_10,
output [ 3:0] up_ch_prbssel_10,
output up_ch_prbscntreset_10,
input up_ch_prbserr_10,
input up_ch_prbslocked_10,
input [ 1:0] up_ch_bufstatus_10,
output up_ch_bufstatus_rst_10,
output up_ch_lpm_dfe_n_10,
output [ 2:0] up_ch_rate_10,
output [ 1:0] up_ch_sys_clk_sel_10,
@ -434,10 +456,12 @@ module axi_adxcvr #(
output up_ch_user_ready_11,
input up_ch_rst_done_11,
output up_ch_prbsforceerr_11,
output [ 3:0] up_ch_prbssel_11,
output [ 3:0] up_ch_prbssel_11,
output up_ch_prbscntreset_11,
input up_ch_prbserr_11,
input up_ch_prbslocked_11,
input [ 1:0] up_ch_bufstatus_11,
output up_ch_bufstatus_rst_11,
output up_ch_lpm_dfe_n_11,
output [ 2:0] up_ch_rate_11,
output [ 1:0] up_ch_sys_clk_sel_11,
@ -472,10 +496,12 @@ module axi_adxcvr #(
output up_ch_user_ready_12,
input up_ch_rst_done_12,
output up_ch_prbsforceerr_12,
output [ 3:0] up_ch_prbssel_12,
output [ 3:0] up_ch_prbssel_12,
output up_ch_prbscntreset_12,
input up_ch_prbserr_12,
input up_ch_prbslocked_12,
input [ 1:0] up_ch_bufstatus_12,
output up_ch_bufstatus_rst_12,
output up_ch_lpm_dfe_n_12,
output [ 2:0] up_ch_rate_12,
output [ 1:0] up_ch_sys_clk_sel_12,
@ -503,10 +529,12 @@ module axi_adxcvr #(
output up_ch_user_ready_13,
input up_ch_rst_done_13,
output up_ch_prbsforceerr_13,
output [ 3:0] up_ch_prbssel_13,
output [ 3:0] up_ch_prbssel_13,
output up_ch_prbscntreset_13,
input up_ch_prbserr_13,
input up_ch_prbslocked_13,
input [ 1:0] up_ch_bufstatus_13,
output up_ch_bufstatus_rst_13,
output up_ch_lpm_dfe_n_13,
output [ 2:0] up_ch_rate_13,
output [ 1:0] up_ch_sys_clk_sel_13,
@ -534,10 +562,12 @@ module axi_adxcvr #(
output up_ch_user_ready_14,
input up_ch_rst_done_14,
output up_ch_prbsforceerr_14,
output [ 3:0] up_ch_prbssel_14,
output [ 3:0] up_ch_prbssel_14,
output up_ch_prbscntreset_14,
input up_ch_prbserr_14,
input up_ch_prbslocked_14,
input [ 1:0] up_ch_bufstatus_14,
output up_ch_bufstatus_rst_14,
output up_ch_lpm_dfe_n_14,
output [ 2:0] up_ch_rate_14,
output [ 1:0] up_ch_sys_clk_sel_14,
@ -565,10 +595,12 @@ module axi_adxcvr #(
output up_ch_user_ready_15,
input up_ch_rst_done_15,
output up_ch_prbsforceerr_15,
output [ 3:0] up_ch_prbssel_15,
output [ 3:0] up_ch_prbssel_15,
output up_ch_prbscntreset_15,
input up_ch_prbserr_15,
input up_ch_prbslocked_15,
input [ 1:0] up_ch_bufstatus_15,
output up_ch_bufstatus_rst_15,
output up_ch_lpm_dfe_n_15,
output [ 2:0] up_ch_rate_15,
output [ 1:0] up_ch_sys_clk_sel_15,
@ -692,70 +724,87 @@ module axi_adxcvr #(
wire up_ch_prbsforceerr;
wire [ 3:0] up_ch_prbssel;
wire up_ch_prbscntreset;
wire up_ch_bufstatus_rst;
wire up_ch_pll_locked_0_s;
wire up_ch_rst_done_0_s;
wire up_ch_prbserr_0_s;
wire up_ch_prbslocked_0_s;
wire [ 1:0] up_ch_bufstatus_0_s;
wire up_ch_pll_locked_1_s;
wire up_ch_rst_done_1_s;
wire up_ch_prbserr_1_s;
wire up_ch_prbslocked_1_s;
wire [ 1:0] up_ch_bufstatus_1_s;
wire up_ch_pll_locked_2_s;
wire up_ch_rst_done_2_s;
wire up_ch_prbserr_2_s;
wire up_ch_prbslocked_2_s;
wire [ 1:0] up_ch_bufstatus_2_s;
wire up_ch_pll_locked_3_s;
wire up_ch_rst_done_3_s;
wire up_ch_prbserr_3_s;
wire up_ch_prbslocked_3_s;
wire [ 1:0] up_ch_bufstatus_3_s;
wire up_ch_pll_locked_4_s;
wire up_ch_rst_done_4_s;
wire up_ch_prbserr_4_s;
wire up_ch_prbslocked_4_s;
wire [ 1:0] up_ch_bufstatus_4_s;
wire up_ch_pll_locked_5_s;
wire up_ch_rst_done_5_s;
wire up_ch_prbserr_5_s;
wire up_ch_prbslocked_5_s;
wire [ 1:0] up_ch_bufstatus_5_s;
wire up_ch_pll_locked_6_s;
wire up_ch_rst_done_6_s;
wire up_ch_prbserr_6_s;
wire up_ch_prbslocked_6_s;
wire [ 1:0] up_ch_bufstatus_6_s;
wire up_ch_pll_locked_7_s;
wire up_ch_rst_done_7_s;
wire up_ch_prbserr_7_s;
wire up_ch_prbslocked_7_s;
wire [ 1:0] up_ch_bufstatus_7_s;
wire up_ch_pll_locked_8_s;
wire up_ch_rst_done_8_s;
wire up_ch_prbserr_8_s;
wire up_ch_prbslocked_8_s;
wire [ 1:0] up_ch_bufstatus_8_s;
wire up_ch_pll_locked_9_s;
wire up_ch_rst_done_9_s;
wire up_ch_prbserr_9_s;
wire up_ch_prbslocked_9_s;
wire [ 1:0] up_ch_bufstatus_9_s;
wire up_ch_pll_locked_10_s;
wire up_ch_rst_done_10_s;
wire up_ch_prbserr_10_s;
wire up_ch_prbslocked_10_s;
wire [ 1:0] up_ch_bufstatus_10_s;
wire up_ch_pll_locked_11_s;
wire up_ch_rst_done_11_s;
wire up_ch_prbserr_11_s;
wire up_ch_prbslocked_11_s;
wire [ 1:0] up_ch_bufstatus_11_s;
wire up_ch_pll_locked_12_s;
wire up_ch_rst_done_12_s;
wire up_ch_prbserr_12_s;
wire up_ch_prbslocked_12_s;
wire [ 1:0] up_ch_bufstatus_12_s;
wire up_ch_pll_locked_13_s;
wire up_ch_rst_done_13_s;
wire up_ch_prbserr_13_s;
wire up_ch_prbslocked_13_s;
wire [ 1:0] up_ch_bufstatus_13_s;
wire up_ch_pll_locked_14_s;
wire up_ch_rst_done_14_s;
wire up_ch_prbserr_14_s;
wire up_ch_prbslocked_14_s;
wire [ 1:0] up_ch_bufstatus_14_s;
wire up_ch_pll_locked_15_s;
wire up_ch_rst_done_15_s;
wire up_ch_prbserr_15_s;
wire up_ch_prbslocked_15_s;
wire [ 1:0] up_ch_bufstatus_15_s;
wire [ 7:0] up_ch_sel;
wire up_ch_enb;
wire [11:0] up_ch_addr;
@ -891,6 +940,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_0 = up_ch_prbsforceerr;
assign up_ch_prbssel_0 = up_ch_prbssel;
assign up_ch_prbscntreset_0 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_0 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (0),
@ -902,14 +952,17 @@ module axi_adxcvr #(
.up_rst_done_in (1'd1),
.up_prbserr_in (1'd0),
.up_prbslocked_in (1'd1),
.up_bufstatus_in (2'd00),
.up_pll_locked (up_ch_pll_locked_0),
.up_rst_done (up_ch_rst_done_0),
.up_prbserr (up_ch_prbserr_0),
.up_prbslocked (up_ch_prbslocked_0),
.up_bufstatus (up_ch_bufstatus_0),
.up_pll_locked_out (up_ch_pll_locked_0_s),
.up_rst_done_out (up_ch_rst_done_0_s),
.up_prbserr_out (up_ch_prbserr_0_s),
.up_prbslocked_out (up_ch_prbslocked_0_s));
.up_prbslocked_out (up_ch_prbslocked_0_s),
.up_bufstatus_out (up_ch_bufstatus_0_s));
assign up_ch_addr_0 = up_ch_addr;
assign up_ch_wr_0 = up_ch_wr;
@ -963,6 +1016,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_1 = up_ch_prbsforceerr;
assign up_ch_prbssel_1 = up_ch_prbssel;
assign up_ch_prbscntreset_1 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_1 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (1),
@ -974,14 +1028,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_0_s),
.up_prbserr_in (up_ch_prbserr_0_s),
.up_prbslocked_in (up_ch_prbslocked_0_s),
.up_bufstatus_in (up_ch_bufstatus_0_s),
.up_pll_locked (up_ch_pll_locked_1),
.up_rst_done (up_ch_rst_done_1),
.up_prbserr (up_ch_prbserr_1),
.up_prbslocked (up_ch_prbslocked_1),
.up_bufstatus (up_ch_bufstatus_1),
.up_pll_locked_out (up_ch_pll_locked_1_s),
.up_rst_done_out (up_ch_rst_done_1_s),
.up_prbserr_out (up_ch_prbserr_1_s),
.up_prbslocked_out (up_ch_prbslocked_1_s));
.up_prbslocked_out (up_ch_prbslocked_1_s),
.up_bufstatus_out (up_ch_bufstatus_1_s));
assign up_ch_addr_1 = up_ch_addr;
assign up_ch_wr_1 = up_ch_wr;
@ -1035,6 +1092,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_2 = up_ch_prbsforceerr;
assign up_ch_prbssel_2 = up_ch_prbssel;
assign up_ch_prbscntreset_2 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_2 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (2),
@ -1046,14 +1104,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_1_s),
.up_prbserr_in (up_ch_prbserr_1_s),
.up_prbslocked_in (up_ch_prbslocked_1_s),
.up_bufstatus_in (up_ch_bufstatus_1_s),
.up_pll_locked (up_ch_pll_locked_2),
.up_rst_done (up_ch_rst_done_2),
.up_prbserr (up_ch_prbserr_2),
.up_prbslocked (up_ch_prbslocked_2),
.up_bufstatus (up_ch_bufstatus_2),
.up_pll_locked_out (up_ch_pll_locked_2_s),
.up_rst_done_out (up_ch_rst_done_2_s),
.up_prbserr_out (up_ch_prbserr_2_s),
.up_prbslocked_out (up_ch_prbslocked_2_s));
.up_prbslocked_out (up_ch_prbslocked_2_s),
.up_bufstatus_out (up_ch_bufstatus_2_s));
assign up_ch_addr_2 = up_ch_addr;
assign up_ch_wr_2 = up_ch_wr;
@ -1107,6 +1168,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_3 = up_ch_prbsforceerr;
assign up_ch_prbssel_3 = up_ch_prbssel;
assign up_ch_prbscntreset_3 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_3 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (3),
@ -1118,14 +1180,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_2_s),
.up_prbserr_in (up_ch_prbserr_2_s),
.up_prbslocked_in (up_ch_prbslocked_2_s),
.up_bufstatus_in (up_ch_bufstatus_2_s),
.up_pll_locked (up_ch_pll_locked_3),
.up_rst_done (up_ch_rst_done_3),
.up_prbserr (up_ch_prbserr_3),
.up_prbslocked (up_ch_prbslocked_3),
.up_bufstatus (up_ch_bufstatus_3),
.up_pll_locked_out (up_ch_pll_locked_3_s),
.up_rst_done_out (up_ch_rst_done_3_s),
.up_prbserr_out (up_ch_prbserr_3_s),
.up_prbslocked_out (up_ch_prbslocked_3_s));
.up_prbslocked_out (up_ch_prbslocked_3_s),
.up_bufstatus_out (up_ch_bufstatus_3_s));
assign up_ch_addr_3 = up_ch_addr;
assign up_ch_wr_3 = up_ch_wr;
@ -1199,6 +1264,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_4 = up_ch_prbsforceerr;
assign up_ch_prbssel_4 = up_ch_prbssel;
assign up_ch_prbscntreset_4 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_4 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (4),
@ -1210,14 +1276,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_3_s),
.up_prbserr_in (up_ch_prbserr_3_s),
.up_prbslocked_in (up_ch_prbslocked_3_s),
.up_bufstatus_in (up_ch_bufstatus_3_s),
.up_pll_locked (up_ch_pll_locked_4),
.up_rst_done (up_ch_rst_done_4),
.up_prbserr (up_ch_prbserr_4),
.up_prbslocked (up_ch_prbslocked_4),
.up_bufstatus (up_ch_bufstatus_4),
.up_pll_locked_out (up_ch_pll_locked_4_s),
.up_rst_done_out (up_ch_rst_done_4_s),
.up_prbserr_out (up_ch_prbserr_4_s),
.up_prbslocked_out (up_ch_prbslocked_4_s));
.up_prbslocked_out (up_ch_prbslocked_4_s),
.up_bufstatus_out (up_ch_bufstatus_4_s));
assign up_ch_addr_4 = up_ch_addr;
assign up_ch_wr_4 = up_ch_wr;
@ -1271,6 +1340,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_5 = up_ch_prbsforceerr;
assign up_ch_prbssel_5 = up_ch_prbssel;
assign up_ch_prbscntreset_5 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_5 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (5),
@ -1282,14 +1352,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_4_s),
.up_prbserr_in (up_ch_prbserr_4_s),
.up_prbslocked_in (up_ch_prbslocked_4_s),
.up_bufstatus_in (up_ch_bufstatus_4_s),
.up_pll_locked (up_ch_pll_locked_5),
.up_rst_done (up_ch_rst_done_5),
.up_prbserr (up_ch_prbserr_5),
.up_prbslocked (up_ch_prbslocked_5),
.up_bufstatus (up_ch_bufstatus_5),
.up_pll_locked_out (up_ch_pll_locked_5_s),
.up_rst_done_out (up_ch_rst_done_5_s),
.up_prbserr_out (up_ch_prbserr_5_s),
.up_prbslocked_out (up_ch_prbslocked_5_s));
.up_prbslocked_out (up_ch_prbslocked_5_s),
.up_bufstatus_out (up_ch_bufstatus_5_s));
assign up_ch_addr_5 = up_ch_addr;
assign up_ch_wr_5 = up_ch_wr;
@ -1343,6 +1416,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_6 = up_ch_prbsforceerr;
assign up_ch_prbssel_6 = up_ch_prbssel;
assign up_ch_prbscntreset_6 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_6 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (6),
@ -1354,14 +1428,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_5_s),
.up_prbserr_in (up_ch_prbserr_5_s),
.up_prbslocked_in (up_ch_prbslocked_5_s),
.up_bufstatus_in (up_ch_bufstatus_5_s),
.up_pll_locked (up_ch_pll_locked_6),
.up_rst_done (up_ch_rst_done_6),
.up_prbserr (up_ch_prbserr_6),
.up_prbslocked (up_ch_prbslocked_6),
.up_bufstatus (up_ch_bufstatus_6),
.up_pll_locked_out (up_ch_pll_locked_6_s),
.up_rst_done_out (up_ch_rst_done_6_s),
.up_prbserr_out (up_ch_prbserr_6_s),
.up_prbslocked_out (up_ch_prbslocked_6_s));
.up_prbslocked_out (up_ch_prbslocked_6_s),
.up_bufstatus_out (up_ch_bufstatus_6_s));
assign up_ch_addr_6 = up_ch_addr;
assign up_ch_wr_6 = up_ch_wr;
@ -1415,6 +1492,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_7 = up_ch_prbsforceerr;
assign up_ch_prbssel_7 = up_ch_prbssel;
assign up_ch_prbscntreset_7 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_7 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (7),
@ -1426,14 +1504,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_6_s),
.up_prbserr_in (up_ch_prbserr_6_s),
.up_prbslocked_in (up_ch_prbslocked_6_s),
.up_bufstatus_in (up_ch_bufstatus_6_s),
.up_pll_locked (up_ch_pll_locked_7),
.up_rst_done (up_ch_rst_done_7),
.up_prbserr (up_ch_prbserr_7),
.up_prbslocked (up_ch_prbslocked_7),
.up_bufstatus (up_ch_bufstatus_7),
.up_pll_locked_out (up_ch_pll_locked_7_s),
.up_rst_done_out (up_ch_rst_done_7_s),
.up_prbserr_out (up_ch_prbserr_7_s),
.up_prbslocked_out (up_ch_prbslocked_7_s));
.up_prbslocked_out (up_ch_prbslocked_7_s),
.up_bufstatus_out (up_ch_bufstatus_7_s));
assign up_ch_addr_7 = up_ch_addr;
assign up_ch_wr_7 = up_ch_wr;
@ -1507,6 +1588,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_8 = up_ch_prbsforceerr;
assign up_ch_prbssel_8 = up_ch_prbssel;
assign up_ch_prbscntreset_8 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_8 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (8),
@ -1518,14 +1600,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_7_s),
.up_prbserr_in (up_ch_prbserr_7_s),
.up_prbslocked_in (up_ch_prbslocked_7_s),
.up_bufstatus_in (up_ch_bufstatus_7_s),
.up_pll_locked (up_ch_pll_locked_8),
.up_rst_done (up_ch_rst_done_8),
.up_prbserr (up_ch_prbserr_8),
.up_prbslocked (up_ch_prbslocked_8),
.up_bufstatus (up_ch_bufstatus_8),
.up_pll_locked_out (up_ch_pll_locked_8_s),
.up_rst_done_out (up_ch_rst_done_8_s),
.up_prbserr_out (up_ch_prbserr_8_s),
.up_prbslocked_out (up_ch_prbslocked_8_s));
.up_prbslocked_out (up_ch_prbslocked_8_s),
.up_bufstatus_out (up_ch_bufstatus_8_s));
assign up_ch_addr_8 = up_ch_addr;
assign up_ch_wr_8 = up_ch_wr;
@ -1579,6 +1664,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_9 = up_ch_prbsforceerr;
assign up_ch_prbssel_9 = up_ch_prbssel;
assign up_ch_prbscntreset_9 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_9 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (9),
@ -1590,14 +1676,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_8_s),
.up_prbserr_in (up_ch_prbserr_8_s),
.up_prbslocked_in (up_ch_prbslocked_8_s),
.up_bufstatus_in (up_ch_bufstatus_8_s),
.up_pll_locked (up_ch_pll_locked_9),
.up_rst_done (up_ch_rst_done_9),
.up_prbserr (up_ch_prbserr_9),
.up_prbslocked (up_ch_prbslocked_9),
.up_bufstatus (up_ch_bufstatus_9),
.up_pll_locked_out (up_ch_pll_locked_9_s),
.up_rst_done_out (up_ch_rst_done_9_s),
.up_prbserr_out (up_ch_prbserr_9_s),
.up_prbslocked_out (up_ch_prbslocked_9_s));
.up_prbslocked_out (up_ch_prbslocked_9_s),
.up_bufstatus_out (up_ch_bufstatus_9_s));
assign up_ch_addr_9 = up_ch_addr;
assign up_ch_wr_9 = up_ch_wr;
@ -1651,6 +1740,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_10 = up_ch_prbsforceerr;
assign up_ch_prbssel_10 = up_ch_prbssel;
assign up_ch_prbscntreset_10 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_10 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (10),
@ -1662,14 +1752,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_9_s),
.up_prbserr_in (up_ch_prbserr_9_s),
.up_prbslocked_in (up_ch_prbslocked_9_s),
.up_bufstatus_in (up_ch_bufstatus_9_s),
.up_pll_locked (up_ch_pll_locked_10),
.up_rst_done (up_ch_rst_done_10),
.up_prbserr (up_ch_prbserr_10),
.up_prbslocked (up_ch_prbslocked_10),
.up_bufstatus (up_ch_bufstatus_10),
.up_pll_locked_out (up_ch_pll_locked_10_s),
.up_rst_done_out (up_ch_rst_done_10_s),
.up_prbserr_out (up_ch_prbserr_10_s),
.up_prbslocked_out (up_ch_prbslocked_10_s));
.up_prbslocked_out (up_ch_prbslocked_10_s),
.up_bufstatus_out (up_ch_bufstatus_10_s));
assign up_ch_addr_10 = up_ch_addr;
assign up_ch_wr_10 = up_ch_wr;
@ -1723,6 +1816,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_11 = up_ch_prbsforceerr;
assign up_ch_prbssel_11 = up_ch_prbssel;
assign up_ch_prbscntreset_11 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_11 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (11),
@ -1734,14 +1828,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_10_s),
.up_prbserr_in (up_ch_prbserr_10_s),
.up_prbslocked_in (up_ch_prbslocked_10_s),
.up_bufstatus_in (up_ch_bufstatus_10_s),
.up_pll_locked (up_ch_pll_locked_11),
.up_rst_done (up_ch_rst_done_11),
.up_prbserr (up_ch_prbserr_11),
.up_prbslocked (up_ch_prbslocked_11),
.up_bufstatus (up_ch_bufstatus_11),
.up_pll_locked_out (up_ch_pll_locked_11_s),
.up_rst_done_out (up_ch_rst_done_11_s),
.up_prbserr_out (up_ch_prbserr_11_s),
.up_prbslocked_out (up_ch_prbslocked_11_s));
.up_prbslocked_out (up_ch_prbslocked_11_s),
.up_bufstatus_out (up_ch_bufstatus_11_s));
assign up_ch_addr_11 = up_ch_addr;
assign up_ch_wr_11 = up_ch_wr;
@ -1815,6 +1912,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_12 = up_ch_prbsforceerr;
assign up_ch_prbssel_12 = up_ch_prbssel;
assign up_ch_prbscntreset_12 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_12 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (12),
@ -1826,14 +1924,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_11_s),
.up_prbserr_in (up_ch_prbserr_11_s),
.up_prbslocked_in (up_ch_prbslocked_11_s),
.up_bufstatus_in (up_ch_bufstatus_11_s),
.up_pll_locked (up_ch_pll_locked_12),
.up_rst_done (up_ch_rst_done_12),
.up_prbserr (up_ch_prbserr_12),
.up_prbslocked (up_ch_prbslocked_12),
.up_bufstatus (up_ch_bufstatus_12),
.up_pll_locked_out (up_ch_pll_locked_12_s),
.up_rst_done_out (up_ch_rst_done_12_s),
.up_prbserr_out (up_ch_prbserr_12_s),
.up_prbslocked_out (up_ch_prbslocked_12_s));
.up_prbslocked_out (up_ch_prbslocked_12_s),
.up_bufstatus_out (up_ch_bufstatus_12_s));
assign up_ch_addr_12 = up_ch_addr;
assign up_ch_wr_12 = up_ch_wr;
@ -1887,6 +1988,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_13 = up_ch_prbsforceerr;
assign up_ch_prbssel_13 = up_ch_prbssel;
assign up_ch_prbscntreset_13 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_13 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (13),
@ -1898,14 +2000,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_12_s),
.up_prbserr_in (up_ch_prbserr_12_s),
.up_prbslocked_in (up_ch_prbslocked_12_s),
.up_bufstatus_in (up_ch_bufstatus_12_s),
.up_pll_locked (up_ch_pll_locked_13),
.up_rst_done (up_ch_rst_done_13),
.up_prbserr (up_ch_prbserr_13),
.up_prbslocked (up_ch_prbslocked_13),
.up_bufstatus (up_ch_bufstatus_13),
.up_pll_locked_out (up_ch_pll_locked_13_s),
.up_rst_done_out (up_ch_rst_done_13_s),
.up_prbserr_out (up_ch_prbserr_13_s),
.up_prbslocked_out (up_ch_prbslocked_13_s));
.up_prbslocked_out (up_ch_prbslocked_13_s),
.up_bufstatus_out (up_ch_bufstatus_13_s));
assign up_ch_addr_13 = up_ch_addr;
assign up_ch_wr_13 = up_ch_wr;
@ -1959,6 +2064,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_14 = up_ch_prbsforceerr;
assign up_ch_prbssel_14 = up_ch_prbssel;
assign up_ch_prbscntreset_14 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_14 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (14),
@ -1970,14 +2076,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_13_s),
.up_prbserr_in (up_ch_prbserr_13_s),
.up_prbslocked_in (up_ch_prbslocked_13_s),
.up_bufstatus_in (up_ch_bufstatus_13_s),
.up_pll_locked (up_ch_pll_locked_14),
.up_rst_done (up_ch_rst_done_14),
.up_prbserr (up_ch_prbserr_14),
.up_prbslocked (up_ch_prbslocked_14),
.up_bufstatus (up_ch_bufstatus_14),
.up_pll_locked_out (up_ch_pll_locked_14_s),
.up_rst_done_out (up_ch_rst_done_14_s),
.up_prbserr_out (up_ch_prbserr_14_s),
.up_prbslocked_out (up_ch_prbslocked_14_s));
.up_prbslocked_out (up_ch_prbslocked_14_s),
.up_bufstatus_out (up_ch_bufstatus_14_s));
assign up_ch_addr_14 = up_ch_addr;
assign up_ch_wr_14 = up_ch_wr;
@ -2031,6 +2140,7 @@ module axi_adxcvr #(
assign up_ch_prbsforceerr_15 = up_ch_prbsforceerr;
assign up_ch_prbssel_15 = up_ch_prbssel;
assign up_ch_prbscntreset_15 = up_ch_prbscntreset;
assign up_ch_bufstatus_rst_15 = up_ch_bufstatus_rst;
axi_adxcvr_mstatus #(
.XCVR_ID (15),
@ -2042,14 +2152,17 @@ module axi_adxcvr #(
.up_rst_done_in (up_ch_rst_done_14_s),
.up_prbserr_in (up_ch_prbserr_14_s),
.up_prbslocked_in (up_ch_prbslocked_14_s),
.up_bufstatus_in (up_ch_bufstatus_14_s),
.up_pll_locked (up_ch_pll_locked_15),
.up_rst_done (up_ch_rst_done_15),
.up_prbserr (up_ch_prbserr_15),
.up_prbslocked (up_ch_prbslocked_15),
.up_bufstatus (up_ch_bufstatus_15),
.up_pll_locked_out (up_ch_pll_locked_15_s),
.up_rst_done_out (up_ch_rst_done_15_s),
.up_prbserr_out (up_ch_prbserr_15_s),
.up_prbslocked_out (up_ch_prbslocked_15_s));
.up_prbslocked_out (up_ch_prbslocked_15_s),
.up_bufstatus_out (up_ch_bufstatus_15_s));
assign up_ch_addr_15 = up_ch_addr;
assign up_ch_wr_15 = up_ch_wr;
@ -2152,6 +2265,8 @@ module axi_adxcvr #(
.up_ch_prbscntreset (up_ch_prbscntreset),
.up_ch_prbserr (up_ch_prbserr_15_s),
.up_ch_prbslocked (up_ch_prbslocked_15_s),
.up_ch_bufstatus (up_ch_bufstatus_15_s),
.up_ch_bufstatus_rst (up_ch_bufstatus_rst),
.up_ch_lpm_dfe_n (up_ch_lpm_dfe_n),
.up_ch_rate (up_ch_rate),
.up_ch_sys_clk_sel (up_ch_sys_clk_sel),

2
library/xilinx/axi_adxcvr/axi_adxcvr_ip.tcl
View File

@ -76,6 +76,8 @@ for {set n 0} {$n < 16} {incr n} {
"prbscntreset up_ch_prbscntreset_${n}"\
"prbserr up_ch_prbserr_${n} "\
"prbslocked up_ch_prbslocked_${n} "\
"bufstatus up_ch_bufstatus_${n} "\
"bufstatus_rst up_ch_bufstatus_rst_${n}"\
"lpm_dfe_n up_ch_lpm_dfe_n_${n} "\
"rate up_ch_rate_${n} "\
"sys_clk_sel up_ch_sys_clk_sel_${n} "\

12
library/xilinx/axi_adxcvr/axi_adxcvr_mstatus.v
View File

@ -44,14 +44,17 @@ module axi_adxcvr_mstatus (
input up_rst_done_in,
input up_prbserr_in,
input up_prbslocked_in,
input [ 1:0] up_bufstatus_in,
input up_pll_locked,
input up_rst_done,
input up_prbserr,
input up_prbslocked,
input [ 1:0] up_bufstatus,
output up_pll_locked_out,
output up_rst_done_out,
output up_prbserr_out,
output up_prbslocked_out);
output up_prbslocked_out,
output [ 1:0] up_bufstatus_out);
// parameters
@ -64,6 +67,7 @@ module axi_adxcvr_mstatus (
reg up_rst_done_int = 'd0;
reg up_prbserr_int = 'd0;
reg up_prbslocked_int = 'd0;
reg [ 1:0] up_bufstatus_int = 2'd00;
// internal signals
@ -71,6 +75,7 @@ module axi_adxcvr_mstatus (
wire up_rst_done_s;
wire up_prbserr_s;
wire up_prbslocked_s;
wire [ 1:0] up_bufstatus_s;
// daisy-chain the signals
@ -78,11 +83,13 @@ module axi_adxcvr_mstatus (
assign up_rst_done_out = up_rst_done_int;
assign up_prbserr_out = up_prbserr_int;
assign up_prbslocked_out = up_prbslocked_int;
assign up_bufstatus_out = up_bufstatus_int;
assign up_pll_locked_s = (XCVR_ID < NUM_OF_LANES) ? up_pll_locked : 1'b1;
assign up_rst_done_s = (XCVR_ID < NUM_OF_LANES) ? up_rst_done : 1'b1;
assign up_prbserr_s = (XCVR_ID < NUM_OF_LANES) ? up_prbserr : 1'b0;
assign up_prbslocked_s = (XCVR_ID < NUM_OF_LANES) ? up_prbslocked : 1'b1;
assign up_bufstatus_s = (XCVR_ID < NUM_OF_LANES) ? up_bufstatus : 2'b00;
always @(negedge up_rstn or posedge up_clk) begin
if (up_rstn == 1'b0) begin
@ -90,11 +97,14 @@ module axi_adxcvr_mstatus (
up_rst_done_int <= 1'd0;
up_prbserr_int <= 1'd0;
up_prbslocked_int <= 1'd0;
up_bufstatus_int <= 2'd00;
end else begin
up_pll_locked_int <= up_pll_locked_in & up_pll_locked_s;
up_rst_done_int <= up_rst_done_in & up_rst_done_s;
up_prbserr_int <= up_prbserr_in | up_prbserr_s;
up_prbslocked_int <= up_prbslocked_in & up_prbslocked_s;
up_bufstatus_int[0] <= up_bufstatus_in[0] | up_bufstatus_s[0];
up_bufstatus_int[1] <= up_bufstatus_in[1] | up_bufstatus_s[1];
end
end

12
library/xilinx/axi_adxcvr/axi_adxcvr_up.v
View File

@ -79,6 +79,8 @@ module axi_adxcvr_up #(
output up_ch_prbscntreset,
input up_ch_prbserr,
input up_ch_prbslocked,
input [ 1:0] up_ch_bufstatus,
output up_ch_bufstatus_rst,
output up_ch_lpm_dfe_n,
output [ 2:0] up_ch_rate,
output [ 1:0] up_ch_sys_clk_sel,
@ -131,7 +133,7 @@ module axi_adxcvr_up #(
// parameters
localparam [31:0] VERSION = 32'h00110461;
localparam [31:0] VERSION = 32'h00110561;
// internal registers
@ -178,6 +180,7 @@ module axi_adxcvr_up #(
reg [3:0] up_prbssel = 'd0;
reg up_prbscntreset = 'd1;
reg up_prbsforceerr = 'd0;
reg up_bufstatus_rst = 'd1;
// internal signals
@ -204,9 +207,11 @@ module axi_adxcvr_up #(
always @(negedge up_rstn or posedge up_clk) begin
if (up_rstn == 0) begin
up_resetn <= 'd0;
up_bufstatus_rst <= 1'b1;
end else begin
if ((up_wreq == 1'b1) && (up_waddr == 10'h004)) begin
up_resetn <= up_wdata[0];
up_bufstatus_rst <= up_wdata[1];
end
end
end
@ -259,6 +264,7 @@ module axi_adxcvr_up #(
assign up_ch_prbssel = up_prbssel;
assign up_ch_prbscntreset = up_prbscntreset;
assign up_ch_prbsforceerr = up_prbsforceerr;
assign up_ch_bufstatus_rst = up_bufstatus_rst;
always @(negedge up_rstn or posedge up_clk) begin
if (up_rstn == 0) begin
@ -525,8 +531,8 @@ module axi_adxcvr_up #(
10'h000: up_rdata_d <= VERSION;
10'h001: up_rdata_d <= ID;
10'h002: up_rdata_d <= up_scratch;
10'h004: up_rdata_d <= {31'd0, up_resetn};
10'h005: up_rdata_d <= {27'd0, ~up_ch_pll_locked, 3'b0, up_status_int};
10'h004: up_rdata_d <= {30'd0, up_bufstatus_rst, up_resetn};
10'h005: up_rdata_d <= {25'd0, up_ch_bufstatus[1], up_ch_bufstatus[0], ~up_ch_pll_locked, 3'b0, up_status_int};
10'h006: up_rdata_d <= {17'd0, up_user_ready_cnt, up_rst_cnt, up_pll_rst_cnt};
10'h007: up_rdata_d <= {FPGA_TECHNOLOGY,FPGA_FAMILY,SPEED_GRADE,DEV_PACKAGE}; // [8,8,8,8]
10'h008: up_rdata_d <= {19'd0, up_lpm_dfe_n, 1'd0, up_rate, 2'd0, up_sys_clk_sel, 1'd0, up_out_clk_sel};

96
library/xilinx/util_adxcvr/util_adxcvr.v
View File

@ -176,6 +176,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_0,
output up_rx_prbserr_0,
output up_rx_prbslocked_0,
output [ 1:0] up_rx_bufstatus_0,
input up_rx_bufstatus_rst_0,
input up_rx_lpm_dfe_n_0,
input [ 2:0] up_rx_rate_0,
input [ 1:0] up_rx_sys_clk_sel_0,
@ -190,6 +192,7 @@ module util_adxcvr #(
input up_tx_rst_0,
input up_tx_user_ready_0,
output up_tx_rst_done_0,
output [ 1:0] up_tx_bufstatus_0,
input up_tx_prbsforceerr_0,
input [ 3:0] up_tx_prbssel_0,
input up_tx_lpm_dfe_n_0,
@ -248,6 +251,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_1,
output up_rx_prbserr_1,
output up_rx_prbslocked_1,
output [ 1:0] up_rx_bufstatus_1,
input up_rx_bufstatus_rst_1,
input up_rx_lpm_dfe_n_1,
input [ 2:0] up_rx_rate_1,
input [ 1:0] up_rx_sys_clk_sel_1,
@ -262,6 +267,7 @@ module util_adxcvr #(
input up_tx_rst_1,
input up_tx_user_ready_1,
output up_tx_rst_done_1,
output [ 1:0] up_tx_bufstatus_1,
input up_tx_prbsforceerr_1,
input [ 3:0] up_tx_prbssel_1,
input up_tx_lpm_dfe_n_1,
@ -320,6 +326,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_2,
output up_rx_prbserr_2,
output up_rx_prbslocked_2,
output [ 1:0] up_rx_bufstatus_2,
input up_rx_bufstatus_rst_2,
input up_rx_lpm_dfe_n_2,
input [ 2:0] up_rx_rate_2,
input [ 1:0] up_rx_sys_clk_sel_2,
@ -334,6 +342,7 @@ module util_adxcvr #(
input up_tx_rst_2,
input up_tx_user_ready_2,
output up_tx_rst_done_2,
output [ 1:0] up_tx_bufstatus_2,
input up_tx_prbsforceerr_2,
input [ 3:0] up_tx_prbssel_2,
input up_tx_lpm_dfe_n_2,
@ -392,6 +401,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_3,
output up_rx_prbserr_3,
output up_rx_prbslocked_3,
output [ 1:0] up_rx_bufstatus_3,
input up_rx_bufstatus_rst_3,
input up_rx_lpm_dfe_n_3,
input [ 2:0] up_rx_rate_3,
input [ 1:0] up_rx_sys_clk_sel_3,
@ -406,6 +417,7 @@ module util_adxcvr #(
input up_tx_rst_3,
input up_tx_user_ready_3,
output up_tx_rst_done_3,
output [ 1:0] up_tx_bufstatus_3,
input up_tx_prbsforceerr_3,
input [ 3:0] up_tx_prbssel_3,
input up_tx_lpm_dfe_n_3,
@ -472,6 +484,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_4,
output up_rx_prbserr_4,
output up_rx_prbslocked_4,
output [ 1:0] up_rx_bufstatus_4,
input up_rx_bufstatus_rst_4,
input up_rx_lpm_dfe_n_4,
input [ 2:0] up_rx_rate_4,
input [ 1:0] up_rx_sys_clk_sel_4,
@ -486,6 +500,7 @@ module util_adxcvr #(
input up_tx_rst_4,
input up_tx_user_ready_4,
output up_tx_rst_done_4,
output [ 1:0] up_tx_bufstatus_4,
input up_tx_prbsforceerr_4,
input [ 3:0] up_tx_prbssel_4,
input up_tx_lpm_dfe_n_4,
@ -544,6 +559,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_5,
output up_rx_prbserr_5,
output up_rx_prbslocked_5,
output [ 1:0] up_rx_bufstatus_5,
input up_rx_bufstatus_rst_5,
input up_rx_lpm_dfe_n_5,
input [ 2:0] up_rx_rate_5,
input [ 1:0] up_rx_sys_clk_sel_5,
@ -558,6 +575,7 @@ module util_adxcvr #(
input up_tx_rst_5,
input up_tx_user_ready_5,
output up_tx_rst_done_5,
output [ 1:0] up_tx_bufstatus_5,
input up_tx_prbsforceerr_5,
input [ 3:0] up_tx_prbssel_5,
input up_tx_lpm_dfe_n_5,
@ -616,6 +634,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_6,
output up_rx_prbserr_6,
output up_rx_prbslocked_6,
output [ 1:0] up_rx_bufstatus_6,
input up_rx_bufstatus_rst_6,
input up_rx_lpm_dfe_n_6,
input [ 2:0] up_rx_rate_6,
input [ 1:0] up_rx_sys_clk_sel_6,
@ -630,6 +650,7 @@ module util_adxcvr #(
input up_tx_rst_6,
input up_tx_user_ready_6,
output up_tx_rst_done_6,
output [ 1:0] up_tx_bufstatus_6,
input up_tx_prbsforceerr_6,
input [ 3:0] up_tx_prbssel_6,
input up_tx_lpm_dfe_n_6,
@ -688,6 +709,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_7,
output up_rx_prbserr_7,
output up_rx_prbslocked_7,
output [ 1:0] up_rx_bufstatus_7,
input up_rx_bufstatus_rst_7,
input up_rx_lpm_dfe_n_7,
input [ 2:0] up_rx_rate_7,
input [ 1:0] up_rx_sys_clk_sel_7,
@ -702,6 +725,7 @@ module util_adxcvr #(
input up_tx_rst_7,
input up_tx_user_ready_7,
output up_tx_rst_done_7,
output [ 1:0] up_tx_bufstatus_7,
input up_tx_prbsforceerr_7,
input [ 3:0] up_tx_prbssel_7,
input up_tx_lpm_dfe_n_7,
@ -768,6 +792,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_8,
output up_rx_prbserr_8,
output up_rx_prbslocked_8,
output [ 1:0] up_rx_bufstatus_8,
input up_rx_bufstatus_rst_8,
input up_rx_lpm_dfe_n_8,
input [ 2:0] up_rx_rate_8,
input [ 1:0] up_rx_sys_clk_sel_8,
@ -782,6 +808,7 @@ module util_adxcvr #(
input up_tx_rst_8,
input up_tx_user_ready_8,
output up_tx_rst_done_8,
output [ 1:0] up_tx_bufstatus_8,
input up_tx_prbsforceerr_8,
input [ 3:0] up_tx_prbssel_8,
input up_tx_lpm_dfe_n_8,
@ -840,6 +867,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_9,
output up_rx_prbserr_9,
output up_rx_prbslocked_9,
output [ 1:0] up_rx_bufstatus_9,
input up_rx_bufstatus_rst_9,
input up_rx_lpm_dfe_n_9,
input [ 2:0] up_rx_rate_9,
input [ 1:0] up_rx_sys_clk_sel_9,
@ -854,6 +883,7 @@ module util_adxcvr #(
input up_tx_rst_9,
input up_tx_user_ready_9,
output up_tx_rst_done_9,
output [ 1:0] up_tx_bufstatus_9,
input up_tx_prbsforceerr_9,
input [ 3:0] up_tx_prbssel_9,
input up_tx_lpm_dfe_n_9,
@ -912,6 +942,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_10,
output up_rx_prbserr_10,
output up_rx_prbslocked_10,
output [ 1:0] up_rx_bufstatus_10,
input up_rx_bufstatus_rst_10,
input up_rx_lpm_dfe_n_10,
input [ 2:0] up_rx_rate_10,
input [ 1:0] up_rx_sys_clk_sel_10,
@ -926,6 +958,7 @@ module util_adxcvr #(
input up_tx_rst_10,
input up_tx_user_ready_10,
output up_tx_rst_done_10,
output [ 1:0] up_tx_bufstatus_10,
input up_tx_prbsforceerr_10,
input [ 3:0] up_tx_prbssel_10,
input up_tx_lpm_dfe_n_10,
@ -984,6 +1017,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_11,
output up_rx_prbserr_11,
output up_rx_prbslocked_11,
output [ 1:0] up_rx_bufstatus_11,
input up_rx_bufstatus_rst_11,
input up_rx_lpm_dfe_n_11,
input [ 2:0] up_rx_rate_11,
input [ 1:0] up_rx_sys_clk_sel_11,
@ -998,6 +1033,7 @@ module util_adxcvr #(
input up_tx_rst_11,
input up_tx_user_ready_11,
output up_tx_rst_done_11,
output [ 1:0] up_tx_bufstatus_11,
input up_tx_prbsforceerr_11,
input [ 3:0] up_tx_prbssel_11,
input up_tx_lpm_dfe_n_11,
@ -1064,6 +1100,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_12,
output up_rx_prbserr_12,
output up_rx_prbslocked_12,
output [ 1:0] up_rx_bufstatus_12,
input up_rx_bufstatus_rst_12,
input up_rx_lpm_dfe_n_12,
input [ 2:0] up_rx_rate_12,
input [ 1:0] up_rx_sys_clk_sel_12,
@ -1078,6 +1116,7 @@ module util_adxcvr #(
input up_tx_rst_12,
input up_tx_user_ready_12,
output up_tx_rst_done_12,
output [ 1:0] up_tx_bufstatus_12,
input up_tx_prbsforceerr_12,
input [ 3:0] up_tx_prbssel_12,
input up_tx_lpm_dfe_n_12,
@ -1136,6 +1175,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_13,
output up_rx_prbserr_13,
output up_rx_prbslocked_13,
output [ 1:0] up_rx_bufstatus_13,
input up_rx_bufstatus_rst_13,
input up_rx_lpm_dfe_n_13,
input [ 2:0] up_rx_rate_13,
input [ 1:0] up_rx_sys_clk_sel_13,
@ -1150,6 +1191,7 @@ module util_adxcvr #(
input up_tx_rst_13,
input up_tx_user_ready_13,
output up_tx_rst_done_13,
output [ 1:0] up_tx_bufstatus_13,
input up_tx_prbsforceerr_13,
input [ 3:0] up_tx_prbssel_13,
input up_tx_lpm_dfe_n_13,
@ -1208,6 +1250,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_14,
output up_rx_prbserr_14,
output up_rx_prbslocked_14,
output [ 1:0] up_rx_bufstatus_14,
input up_rx_bufstatus_rst_14,
input up_rx_lpm_dfe_n_14,
input [ 2:0] up_rx_rate_14,
input [ 1:0] up_rx_sys_clk_sel_14,
@ -1222,6 +1266,7 @@ module util_adxcvr #(
input up_tx_rst_14,
input up_tx_user_ready_14,
output up_tx_rst_done_14,
output [ 1:0] up_tx_bufstatus_14,
input up_tx_prbsforceerr_14,
input [ 3:0] up_tx_prbssel_14,
input up_tx_lpm_dfe_n_14,
@ -1280,6 +1325,8 @@ module util_adxcvr #(
input up_rx_prbscntreset_15,
output up_rx_prbserr_15,
output up_rx_prbslocked_15,
output [ 1:0] up_rx_bufstatus_15,
input up_rx_bufstatus_rst_15,
input up_rx_lpm_dfe_n_15,
input [ 2:0] up_rx_rate_15,
input [ 1:0] up_rx_sys_clk_sel_15,
@ -1294,6 +1341,7 @@ module util_adxcvr #(
input up_tx_rst_15,
input up_tx_user_ready_15,
output up_tx_rst_done_15,
output [ 1:0] up_tx_bufstatus_15,
input up_tx_prbsforceerr_15,
input [ 3:0] up_tx_prbssel_15,
input up_tx_lpm_dfe_n_15,
@ -1513,6 +1561,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_0),
.up_rx_prbserr (up_rx_prbserr_0),
.up_rx_prbslocked (up_rx_prbslocked_0),
.up_rx_bufstatus (up_rx_bufstatus_0),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_0),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_0),
.up_rx_rate (up_rx_rate_0),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_0),
@ -1527,6 +1577,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_0),
.up_tx_user_ready (up_tx_user_ready_0),
.up_tx_rst_done (up_tx_rst_done_0),
.up_tx_bufstatus (up_tx_bufstatus_0),
.up_tx_prbsforceerr (up_tx_prbsforceerr_0),
.up_tx_prbssel (up_tx_prbssel_0),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_0),
@ -1662,6 +1713,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_1),
.up_rx_prbserr (up_rx_prbserr_1),
.up_rx_prbslocked (up_rx_prbslocked_1),
.up_rx_bufstatus (up_rx_bufstatus_1),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_1),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_1),
.up_rx_rate (up_rx_rate_1),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_1),
@ -1676,6 +1729,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_1),
.up_tx_user_ready (up_tx_user_ready_1),
.up_tx_rst_done (up_tx_rst_done_1),
.up_tx_bufstatus (up_tx_bufstatus_1),
.up_tx_prbsforceerr (up_tx_prbsforceerr_1),
.up_tx_prbssel (up_tx_prbssel_1),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_1),
@ -1811,6 +1865,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_2),
.up_rx_prbserr (up_rx_prbserr_2),
.up_rx_prbslocked (up_rx_prbslocked_2),
.up_rx_bufstatus (up_rx_bufstatus_2),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_2),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_2),
.up_rx_rate (up_rx_rate_2),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_2),
@ -1825,6 +1881,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_2),
.up_tx_user_ready (up_tx_user_ready_2),
.up_tx_rst_done (up_tx_rst_done_2),
.up_tx_bufstatus (up_tx_bufstatus_2),
.up_tx_prbsforceerr (up_tx_prbsforceerr_2),
.up_tx_prbssel (up_tx_prbssel_2),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_2),
@ -1960,6 +2017,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_3),
.up_rx_prbserr (up_rx_prbserr_3),
.up_rx_prbslocked (up_rx_prbslocked_3),
.up_rx_bufstatus (up_rx_bufstatus_3),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_3),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_3),
.up_rx_rate (up_rx_rate_3),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_3),
@ -1974,6 +2033,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_3),
.up_tx_user_ready (up_tx_user_ready_3),
.up_tx_rst_done (up_tx_rst_done_3),
.up_tx_bufstatus (up_tx_bufstatus_3),
.up_tx_prbsforceerr (up_tx_prbsforceerr_3),
.up_tx_prbssel (up_tx_prbssel_3),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_3),
@ -2159,6 +2219,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_4),
.up_rx_prbserr (up_rx_prbserr_4),
.up_rx_prbslocked (up_rx_prbslocked_4),
.up_rx_bufstatus (up_rx_bufstatus_4),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_4),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_4),
.up_rx_rate (up_rx_rate_4),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_4),
@ -2173,6 +2235,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_4),
.up_tx_user_ready (up_tx_user_ready_4),
.up_tx_rst_done (up_tx_rst_done_4),
.up_tx_bufstatus (up_tx_bufstatus_4),
.up_tx_prbsforceerr (up_tx_prbsforceerr_4),
.up_tx_prbssel (up_tx_prbssel_4),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_4),
@ -2308,6 +2371,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_5),
.up_rx_prbserr (up_rx_prbserr_5),
.up_rx_prbslocked (up_rx_prbslocked_5),
.up_rx_bufstatus (up_rx_bufstatus_5),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_5),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_5),
.up_rx_rate (up_rx_rate_5),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_5),
@ -2322,6 +2387,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_5),
.up_tx_user_ready (up_tx_user_ready_5),
.up_tx_rst_done (up_tx_rst_done_5),
.up_tx_bufstatus (up_tx_bufstatus_5),
.up_tx_prbsforceerr (up_tx_prbsforceerr_5),
.up_tx_prbssel (up_tx_prbssel_5),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_5),
@ -2457,6 +2523,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_6),
.up_rx_prbserr (up_rx_prbserr_6),
.up_rx_prbslocked (up_rx_prbslocked_6),
.up_rx_bufstatus (up_rx_bufstatus_6),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_6),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_6),
.up_rx_rate (up_rx_rate_6),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_6),
@ -2471,6 +2539,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_6),
.up_tx_user_ready (up_tx_user_ready_6),
.up_tx_rst_done (up_tx_rst_done_6),
.up_tx_bufstatus (up_tx_bufstatus_6),
.up_tx_prbsforceerr (up_tx_prbsforceerr_6),
.up_tx_prbssel (up_tx_prbssel_6),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_6),
@ -2606,6 +2675,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_7),
.up_rx_prbserr (up_rx_prbserr_7),
.up_rx_prbslocked (up_rx_prbslocked_7),
.up_rx_bufstatus (up_rx_bufstatus_7),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_7),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_7),
.up_rx_rate (up_rx_rate_7),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_7),
@ -2620,6 +2691,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_7),
.up_tx_user_ready (up_tx_user_ready_7),
.up_tx_rst_done (up_tx_rst_done_7),
.up_tx_bufstatus (up_tx_bufstatus_7),
.up_tx_prbsforceerr (up_tx_prbsforceerr_7),
.up_tx_prbssel (up_tx_prbssel_7),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_7),
@ -2805,6 +2877,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_8),
.up_rx_prbserr (up_rx_prbserr_8),
.up_rx_prbslocked (up_rx_prbslocked_8),
.up_rx_bufstatus (up_rx_bufstatus_8),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_8),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_8),
.up_rx_rate (up_rx_rate_8),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_8),
@ -2819,6 +2893,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_8),
.up_tx_user_ready (up_tx_user_ready_8),
.up_tx_rst_done (up_tx_rst_done_8),
.up_tx_bufstatus (up_tx_bufstatus_8),
.up_tx_prbsforceerr (up_tx_prbsforceerr_8),
.up_tx_prbssel (up_tx_prbssel_8),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_8),
@ -2954,6 +3029,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_9),
.up_rx_prbserr (up_rx_prbserr_9),
.up_rx_prbslocked (up_rx_prbslocked_9),
.up_rx_bufstatus (up_rx_bufstatus_9),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_9),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_9),
.up_rx_rate (up_rx_rate_9),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_9),
@ -2968,6 +3045,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_9),
.up_tx_user_ready (up_tx_user_ready_9),
.up_tx_rst_done (up_tx_rst_done_9),
.up_tx_bufstatus (up_tx_bufstatus_9),
.up_tx_prbsforceerr (up_tx_prbsforceerr_9),
.up_tx_prbssel (up_tx_prbssel_9),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_9),
@ -3103,6 +3181,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_10),
.up_rx_prbserr (up_rx_prbserr_10),
.up_rx_prbslocked (up_rx_prbslocked_10),
.up_rx_bufstatus (up_rx_bufstatus_10),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_10),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_10),
.up_rx_rate (up_rx_rate_10),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_10),
@ -3117,6 +3197,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_10),
.up_tx_user_ready (up_tx_user_ready_10),
.up_tx_rst_done (up_tx_rst_done_10),
.up_tx_bufstatus (up_tx_bufstatus_10),
.up_tx_prbsforceerr (up_tx_prbsforceerr_10),
.up_tx_prbssel (up_tx_prbssel_10),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_10),
@ -3252,6 +3333,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_11),
.up_rx_prbserr (up_rx_prbserr_11),
.up_rx_prbslocked (up_rx_prbslocked_11),
.up_rx_bufstatus (up_rx_bufstatus_11),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_11),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_11),
.up_rx_rate (up_rx_rate_11),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_11),
@ -3266,6 +3349,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_11),
.up_tx_user_ready (up_tx_user_ready_11),
.up_tx_rst_done (up_tx_rst_done_11),
.up_tx_bufstatus (up_tx_bufstatus_11),
.up_tx_prbsforceerr (up_tx_prbsforceerr_11),
.up_tx_prbssel (up_tx_prbssel_11),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_11),
@ -3451,6 +3535,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_12),
.up_rx_prbserr (up_rx_prbserr_12),
.up_rx_prbslocked (up_rx_prbslocked_12),
.up_rx_bufstatus (up_rx_bufstatus_12),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_12),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_12),
.up_rx_rate (up_rx_rate_12),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_12),
@ -3465,6 +3551,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_12),
.up_tx_user_ready (up_tx_user_ready_12),
.up_tx_rst_done (up_tx_rst_done_12),
.up_tx_bufstatus (up_tx_bufstatus_12),
.up_tx_prbsforceerr (up_tx_prbsforceerr_12),
.up_tx_prbssel (up_tx_prbssel_12),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_12),
@ -3600,6 +3687,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_13),
.up_rx_prbserr (up_rx_prbserr_13),
.up_rx_prbslocked (up_rx_prbslocked_13),
.up_rx_bufstatus (up_rx_bufstatus_13),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_13),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_13),
.up_rx_rate (up_rx_rate_13),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_13),
@ -3614,6 +3703,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_13),
.up_tx_user_ready (up_tx_user_ready_13),
.up_tx_rst_done (up_tx_rst_done_13),
.up_tx_bufstatus (up_tx_bufstatus_13),
.up_tx_prbsforceerr (up_tx_prbsforceerr_13),
.up_tx_prbssel (up_tx_prbssel_13),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_13),
@ -3749,6 +3839,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_14),
.up_rx_prbserr (up_rx_prbserr_14),
.up_rx_prbslocked (up_rx_prbslocked_14),
.up_rx_bufstatus (up_rx_bufstatus_14),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_14),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_14),
.up_rx_rate (up_rx_rate_14),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_14),
@ -3763,6 +3855,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_14),
.up_tx_user_ready (up_tx_user_ready_14),
.up_tx_rst_done (up_tx_rst_done_14),
.up_tx_bufstatus (up_tx_bufstatus_14),
.up_tx_prbsforceerr (up_tx_prbsforceerr_14),
.up_tx_prbssel (up_tx_prbssel_14),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_14),
@ -3898,6 +3991,8 @@ module util_adxcvr #(
.up_rx_prbscntreset (up_rx_prbscntreset_15),
.up_rx_prbserr (up_rx_prbserr_15),
.up_rx_prbslocked (up_rx_prbslocked_15),
.up_rx_bufstatus (up_rx_bufstatus_15),
.up_rx_bufstatus_rst (up_rx_bufstatus_rst_15),
.up_rx_lpm_dfe_n (up_rx_lpm_dfe_n_15),
.up_rx_rate (up_rx_rate_15),
.up_rx_sys_clk_sel (up_rx_sys_clk_sel_15),
@ -3912,6 +4007,7 @@ module util_adxcvr #(
.up_tx_rst (up_tx_rst_15),
.up_tx_user_ready (up_tx_user_ready_15),
.up_tx_rst_done (up_tx_rst_done_15),
.up_tx_bufstatus (up_tx_bufstatus_15),
.up_tx_prbsforceerr (up_tx_prbsforceerr_15),
.up_tx_prbssel (up_tx_prbssel_15),
.up_tx_lpm_dfe_n (up_tx_lpm_dfe_n_15),

15
library/xilinx/util_adxcvr/util_adxcvr_constr.xdc
View File

@ -24,4 +24,17 @@ set_false_path \
# sync bits i_sync_bits_rx_prbs_out
set_false_path \
-to [get_cells -quiet -hier *cdc_sync_stage1_reg* \
-filter {NAME =~ *i_sync_bits_rx_prbs_out* && IS_SEQUENTIAL}]
-filter {NAME =~ *i_sync_bits_rx_prbs_out* && IS_SEQUENTIAL}
]
# sync bits i_sync_bits_rx_bufstatus_in
set_false_path \
-to [get_cells -quiet -hier *cdc_sync_stage1_reg* \
-filter {NAME =~ *i_sync_bits_rx_bufstatus_in* && IS_SEQUENTIAL}
]
# sync bits i_sync_bits_bufstatus_out
set_false_path \
-to [get_cells -quiet -hier *cdc_sync_stage1_reg* \
-filter {NAME =~ *i_sync_bits_bufstatus_out* && IS_SEQUENTIAL}]

3
library/xilinx/util_adxcvr/util_adxcvr_ip.tcl
View File

@ -269,6 +269,8 @@ for {set n 0} {$n < 16} {incr n} {
"prbscntreset up_rx_prbscntreset_${n}"\
"prbserr up_rx_prbserr_${n} "\
"prbslocked up_rx_prbslocked_${n} "\
"bufstatus up_rx_bufstatus_${n} "\
"bufstatus_rst up_rx_bufstatus_rst_${n}"\
"lpm_dfe_n up_rx_lpm_dfe_n_${n} "\
"rate up_rx_rate_${n} "\
"sys_clk_sel up_rx_sys_clk_sel_${n} "\
@ -287,6 +289,7 @@ for {set n 0} {$n < 16} {incr n} {
"rst_done up_tx_rst_done_${n} "\
"prbsforceerr up_tx_prbsforceerr_${n}"\
"prbssel up_tx_prbssel_${n} "\
"bufstatus up_tx_bufstatus_${n} "\
"lpm_dfe_n up_tx_lpm_dfe_n_${n} "\
"rate up_tx_rate_${n} "\
"sys_clk_sel up_tx_sys_clk_sel_${n} "\

76
library/xilinx/util_adxcvr/util_adxcvr_xch.v
View File

@ -153,6 +153,8 @@ module util_adxcvr_xch #(
input up_rx_prbscntreset,
output up_rx_prbserr,
output up_rx_prbslocked,
output [ 1:0] up_rx_bufstatus,
input up_rx_bufstatus_rst,
input up_rx_lpm_dfe_n,
input [ 2:0] up_rx_rate,
input [ 1:0] up_rx_sys_clk_sel,
@ -167,6 +169,7 @@ module util_adxcvr_xch #(
input up_tx_rst,
input up_tx_user_ready,
output up_tx_rst_done,
output [ 1:0] up_tx_bufstatus,
input up_tx_prbsforceerr,
input [ 3:0] up_tx_prbssel,
input up_tx_lpm_dfe_n,
@ -390,7 +393,49 @@ module util_adxcvr_xch #(
.out_bits ({tx_prbssel,
tx_prbsforceerr})
);
// Bufstatus
reg rx_bufstatus_sticky_0 = 1'b0;
reg rx_bufstatus_sticky_1 = 1'b0;
wire rx_bufstatus_rst;
wire [ 1:0] rx_bufstatus;
wire [ 1:0] rx_bufstatus_s;
wire [ 1:0] tx_bufstatus;
wire [ 1:0] tx_bufstatus_s;
sync_bits #(.NUM_OF_BITS(1)) i_sync_bits_rx_bufstatus_in (
.in_bits (up_rx_bufstatus_rst),
.out_resetn (1'b1),
.out_clk (rx_clk),
.out_bits (rx_bufstatus_rst)
);
always @(posedge rx_clk) begin
if (rx_bufstatus_rst) begin
rx_bufstatus_sticky_0 <= 1'b0;
end else if (rx_bufstatus_s[0]) begin
rx_bufstatus_sticky_0 <= 1'b1;
end
end
always @(posedge rx_clk) begin
if (rx_bufstatus_rst) begin
rx_bufstatus_sticky_1 <= 1'b0;
end else if (rx_bufstatus_s[1]) begin
rx_bufstatus_sticky_1 <= 1'b1;
end
end
sync_bits #(.NUM_OF_BITS(4)) i_sync_bits_bufstatus_out (
.in_bits ({rx_bufstatus,
tx_bufstatus}),
.out_resetn (up_rstn),
.out_clk (up_clk),
.out_bits ({up_rx_bufstatus,
up_tx_bufstatus})
);
// 204C specific logic
localparam ALIGN_COMMA_ENABLE = LINK_MODE[1] ? 10'b0000000000 : 10'b1111111111;
localparam ALIGN_MCOMMA_DET = LINK_MODE[1] ? "FALSE" : "TRUE";
@ -448,7 +493,12 @@ module util_adxcvr_xch #(
(XCVR_TYPE==GTHE4_TRANSCEIVERS) ? rx_clk_2x : rx_clk;
assign tx_usrclk = (XCVR_TYPE==GTHE3_TRANSCEIVERS) ||
(XCVR_TYPE==GTHE4_TRANSCEIVERS) ? tx_clk_2x : tx_clk;
assign rx_bufstatus[0] = rx_bufstatus_sticky_0;
assign rx_bufstatus[1] = rx_bufstatus_sticky_1;
assign tx_bufstatus = tx_bufstatus_s;
end else begin
assign {rx_data_open_s, rx_data} = rx_data_s;
@ -457,9 +507,13 @@ module util_adxcvr_xch #(
assign rx_usrclk = rx_clk;
assign tx_usrclk = tx_clk;
assign rx_bufstatus[0] = rx_bufstatus_sticky_1;
assign rx_bufstatus[1] = rx_bufstatus_sticky_1;
assign tx_bufstatus[0] = tx_bufstatus_s[1];
assign tx_bufstatus[1] = tx_bufstatus_s[1];
end
endgenerate
// instantiations
@ -773,7 +827,7 @@ module util_adxcvr_xch #(
.RESETOVRD (1'h0),
.RX8B10BEN (1'h1),
.RXBUFRESET (1'h0),
.RXBUFSTATUS (),
.RXBUFSTATUS (rx_bufstatus_s),
.RXBYTEISALIGNED (),
.RXBYTEREALIGN (),
.RXCDRFREQRESET (1'h0),
@ -863,7 +917,7 @@ module util_adxcvr_xch #(
.TX8B10BBYPASS (8'h0),
.TX8B10BEN (1'h1),
.TXBUFDIFFCTRL (3'h4),
.TXBUFSTATUS (),
.TXBUFSTATUS (tx_bufstatus_s),
.TXCHARDISPMODE (8'h0),
.TXCHARDISPVAL (8'h0),
.TXCHARISK ({4'd0, tx_charisk}),
@ -1450,7 +1504,7 @@ module util_adxcvr_xch #(
.RSTCLKENTX (1'h0),
.RX8B10BEN (RX8B10BEN),
.RXBUFRESET (1'h0),
.RXBUFSTATUS (),
.RXBUFSTATUS (rx_bufstatus_s),
.RXBYTEISALIGNED (),
.RXBYTEREALIGN (),
.RXCDRFREQRESET (1'h0),
@ -1615,7 +1669,7 @@ module util_adxcvr_xch #(
.TX8B10BBYPASS (8'h0),
.TX8B10BEN (TX8B10BEN),
.TXBUFDIFFCTRL (3'h0),
.TXBUFSTATUS (),
.TXBUFSTATUS (tx_bufstatus_s),
.TXCOMFINISH (),
.TXCOMINIT (1'h0),
.TXCOMSAS (1'h0),
@ -2339,7 +2393,7 @@ module util_adxcvr_xch #(
.RX8B10BEN (RX8B10BEN),
.RXAFECFOKEN (1'b1),
.RXBUFRESET (1'd0),
.RXBUFSTATUS (),
.RXBUFSTATUS (rx_bufstatus_s),
.RXBYTEISALIGNED (),
.RXBYTEREALIGN (),
.RXCDRFREQRESET (1'd0),
@ -2510,7 +2564,7 @@ module util_adxcvr_xch #(
.TSTIN (20'd0),
.TX8B10BBYPASS (8'd0),
.TX8B10BEN (RX8B10BEN),
.TXBUFSTATUS (),
.TXBUFSTATUS (tx_bufstatus_s),
.TXCOMFINISH (),
.TXCOMINIT (1'd0),
.TXCOMSAS (1'd0),
@ -3388,7 +3442,7 @@ module util_adxcvr_xch #(
.PINRSRVDAS (),
.POWERPRESENT (),
.RESETEXCEPTION (),
.RXBUFSTATUS (),
.RXBUFSTATUS (rx_bufstatus_s),
.RXBYTEISALIGNED (),
.RXBYTEREALIGN (),
.RXCDRLOCK (),
@ -3443,7 +3497,7 @@ module util_adxcvr_xch #(
.RXSYNCDONE (),
.RXSYNCOUT (),
.RXVALID (),
.TXBUFSTATUS (),
.TXBUFSTATUS (tx_bufstatus_s),
.TXCOMFINISH (),
.TXDCCDONE (),
.TXDLYSRESETDONE (),