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jesd204/tb: Update testbenches

main
Laszlo Nagy 2020-12-07 12:16:30 +00:00 committed by Laszlo Nagy
parent 589cfc6b1b
commit 94181206c2
13 changed files with 594 additions and 263 deletions
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21
library/jesd204/tb/axi_jesd204_rx_regmap_tb.v
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@ -165,7 +165,7 @@ module axi_jesd204_rx_regmap_tb;
for (i = 0; i < 1024; i = i + 1)
expected_reg_mem[i] <= 'h00;
/* Non zero power-on-reset values */
set_reset_reg_value('h00, 32'h00010261); /* PCORE version register */
set_reset_reg_value('h00, 32'h00010761); /* PCORE version register */
set_reset_reg_value('h0c, 32'h32303452); /* PCORE magic register */
set_reset_reg_value('h10, NUM_LANES); /* Number of lanes */
set_reset_reg_value('h18, NUM_LINKS); /* Number of links */
@ -174,7 +174,8 @@ module axi_jesd204_rx_regmap_tb;
set_reset_reg_value('hc0, 'h1); /* Core reset */
set_reset_reg_value('hc4, 'h1); /* Core state */
// set_reset_reg_value('hc8, 'h28000); /* clock monitor */
set_reset_reg_value('h210, 'h3); /* OCTETS_PER_MULTIFRAME */
set_reset_reg_value('h210, 'h0); /* OCTETS_PER_MULTIFRAME */
set_reset_reg_value('h248, 'h4); /* FRAME_ALIGN_ERR_THRESHOLD */
/* Lane error statistics */
for (i = 0; i < NUM_LANES; i = i + 1) begin
@ -310,7 +311,7 @@ module axi_jesd204_rx_regmap_tb;
/* Should be read-only when core is out of reset */
invert_register('h200); /* lanes enable */
invert_register('h210); /* octets per frame, beats per multiframe */
invert_register('h210); /* octets per frame, octets per multiframe */
invert_register('h218); /* links enable */
invert_register('h240); /* char replacement, scrambler */
@ -362,17 +363,23 @@ module axi_jesd204_rx_regmap_tb;
.core_ilas_config_addr({NUM_LANES{core_ilas_config_addr}}),
.core_ilas_config_data(core_ilas_config_data),
.core_event_sysref_alignment_error(1'b0),
.core_event_sysref_edge(1'b0),
.device_event_sysref_alignment_error(1'b0),
.device_event_sysref_edge(1'b0),
.core_status_err_statistics_cnt(core_status_err_statistics_cnt),
.core_ctrl_err_statistics_mask(),
.core_ctrl_err_statistics_reset(),
.core_status_ctrl_state(2'b00),
.core_status_lane_cgs_state(4'b0000),
.core_status_lane_cgs_state({NUM_LANES{2'b0}}),
.core_status_lane_emb_state({NUM_LANES{3'b0}}),
.core_status_lane_ifs_ready({NUM_LANES{1'b0}}),
.core_status_lane_latency({NUM_LANES{14'h00}})
.core_status_lane_latency({NUM_LANES{14'h00}}),
.core_status_lane_frame_align_err_cnt({NUM_LANES{8'b0}}),
.status_synth_params0(NUM_LANES),
.status_synth_params1(2),
.status_synth_params2(NUM_LINKS)
);
endmodule

19
library/jesd204/tb/axi_jesd204_tx_regmap_tb.v
View File

@ -134,6 +134,9 @@ module axi_jesd204_tx_regmap_tb;
read_reg(addr, value);
expected = expected_reg_mem[addr[13:2]];
match <= value === expected;
if (value !== expected) begin
$display("Address %h, Expected %h, Found %h", addr, expected, value);
end
end
endtask
@ -160,7 +163,7 @@ module axi_jesd204_tx_regmap_tb;
for (i = 0; i < 1024; i = i + 1)
expected_reg_mem[i] <= 'h00;
/* Non zero power-on-reset values */
set_reset_reg_value('h00, 32'h00010161); /* PCORE version register */
set_reset_reg_value('h00, 32'h00010661); /* PCORE version register */
set_reset_reg_value('h0c, 32'h32303454); /* PCORE magic register */
set_reset_reg_value('h10, NUM_LANES); /* Number of lanes */
set_reset_reg_value('h14, 'h2); /* Datapath width */
@ -168,7 +171,7 @@ module axi_jesd204_tx_regmap_tb;
set_reset_reg_value('hc0, 'h1); /* Link disable */
set_reset_reg_value('hc4, 'h1); /* Core state */
// set_reset_reg_value('hc8, 'h80000); /* clock monitor */
set_reset_reg_value('h210, 'h3); /* OCTETS_PER_MULTIFRAME */
set_reset_reg_value('h210, 'h0); /* OCTETS_PER_MULTIFRAME */
set_reset_reg_value('h244, 'h3); /* MFRAMES_PER_ILAS */
end
@ -247,7 +250,7 @@ module axi_jesd204_tx_regmap_tb;
/* Check JESD common config */
write_reg_and_update('h210, 32'hff03ff);
check_all_registers();
write_reg_and_update('h214, 32'h03);
write_reg_and_update('h214, 32'h00);
check_all_registers();
/* Check links disable */
@ -356,11 +359,15 @@ module axi_jesd204_tx_regmap_tb;
.core_ilas_config_rd(1'b1),
.core_ilas_config_addr(2'b00),
.core_event_sysref_alignment_error(1'b0),
.core_event_sysref_edge(1'b0),
.device_event_sysref_alignment_error(1'b0),
.device_event_sysref_edge(1'b0),
.core_status_state(core_status_state),
.core_status_sync(core_status_sync)
.core_status_sync(core_status_sync),
.status_synth_params0(NUM_LANES),
.status_synth_params1(2),
.status_synth_params2(NUM_LINKS)
);
endmodule

1
library/jesd204/tb/frame_align_tb
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@ -12,6 +12,7 @@ SOURCE+=" ../jesd204_tx/jesd204_tx.v ../jesd204_tx/jesd204_tx_ctrl.v ../jesd204_
SOURCE+=" ../jesd204_tx_static_config/jesd204_tx_static_config.v"
SOURCE+=" ../jesd204_tx_static_config/jesd204_ilas_cfg_static.v"
SOURCE+=" ../../util_cdc/sync_bits.v"
SOURCE+=" ../../util_cdc/sync_event.v"
cd `dirname $0`
source run_tb.sh

121
library/jesd204/tb/frame_align_tb.v
View File

@ -227,9 +227,12 @@ module frame_align_tb;
wire [NUM_LINKS-1:0] tx_cfg_links_disable;
wire [9:0] tx_cfg_octets_per_multiframe;
wire [7:0] tx_cfg_octets_per_frame;
wire [7:0] tx_cfg_lmfc_offset;
wire tx_cfg_sysref_disable;
wire tx_cfg_sysref_oneshot;
wire [7:0] tx_device_cfg_lmfc_offset;
wire [9:0] tx_device_cfg_octets_per_multiframe;
wire [7:0] tx_device_cfg_octets_per_frame;
wire [7:0] tx_device_cfg_beats_per_multiframe;
wire tx_device_cfg_sysref_disable;
wire tx_device_cfg_sysref_oneshot;
wire tx_cfg_continuous_cgs;
wire tx_cfg_continuous_ilas;
wire tx_cfg_skip_ilas;
@ -262,7 +265,8 @@ module frame_align_tb;
.LINK_MODE(1),
.SYSREF_DISABLE(SYSREF_DISABLE),
.SYSREF_ONE_SHOT(SYSREF_ONE_SHOT),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH)
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH)
) i_tx_cfg (
.clk(clk),
@ -270,9 +274,6 @@ module frame_align_tb;
.cfg_links_disable(tx_cfg_links_disable),
.cfg_octets_per_multiframe(tx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(tx_cfg_octets_per_frame),
.cfg_lmfc_offset(tx_cfg_lmfc_offset),
.cfg_sysref_disable(tx_cfg_sysref_disable),
.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
.cfg_continuous_cgs(tx_cfg_continuous_cgs),
.cfg_continuous_ilas(tx_cfg_continuous_ilas),
.cfg_skip_ilas(tx_cfg_skip_ilas),
@ -280,6 +281,13 @@ module frame_align_tb;
.cfg_disable_char_replacement(tx_cfg_disable_char_replacement),
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(tx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(tx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(tx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(tx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(tx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(tx_device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
.ilas_config_data(tx_ilas_config_data)
@ -290,11 +298,17 @@ module frame_align_tb;
.NUM_LINKS(NUM_LINKS),
.NUM_OUTPUT_PIPELINE(0),
.LINK_MODE(1),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH)
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ASYNC_CLK(0),
.ENABLE_CHAR_REPLACE(1)
) i_tx (
.clk(clk),
.reset(reset),
.device_clk(clk),
.device_reset(reset),
.phy_data(phy_data_out),
.phy_charisk(phy_charisk_out),
.phy_header(),
@ -309,15 +323,14 @@ module frame_align_tb;
.tx_ready(tx_ready),
.tx_eof(tx_eof),
.tx_sof(tx_sof),
.tx_somf(),
.tx_eomf(),
.tx_valid(1'b1),
.cfg_lanes_disable(tx_cfg_lanes_disable),
.cfg_links_disable(tx_cfg_links_disable),
.cfg_octets_per_multiframe(tx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(tx_cfg_octets_per_frame),
.cfg_lmfc_offset(tx_cfg_lmfc_offset),
.cfg_sysref_disable(tx_cfg_sysref_disable),
.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
.cfg_continuous_cgs(tx_cfg_continuous_cgs),
.cfg_continuous_ilas(tx_cfg_continuous_ilas),
.cfg_skip_ilas(tx_cfg_skip_ilas),
@ -325,31 +338,44 @@ module frame_align_tb;
.cfg_disable_char_replacement(tx_cfg_disable_char_replacement),
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(tx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(tx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(tx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(tx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(tx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(tx_device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
.ilas_config_data(tx_ilas_config_data),
.ctrl_manual_sync_request(1'b0),
.event_sysref_edge (tx_event_sysref_edge),
.event_sysref_alignment_error (tx_event_sysref_alignment_error),
.device_event_sysref_edge (tx_event_sysref_edge),
.device_event_sysref_alignment_error (tx_event_sysref_alignment_error),
.status_sync (tx_status_sync),
.status_state (tx_status_state)
.status_state (tx_status_state),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
);
wire [NUM_LANES-1:0] rx_cfg_lanes_disable;
wire [NUM_LINKS-1:0] rx_cfg_links_disable;
wire [9:0] rx_cfg_octets_per_multiframe;
wire [7:0] rx_cfg_octets_per_frame;
wire [7:0] rx_cfg_lmfc_offset;
wire rx_cfg_sysref_disable;
wire rx_cfg_sysref_oneshot;
wire [7:0] rx_device_cfg_lmfc_offset;
wire [9:0] rx_device_cfg_octets_per_multiframe;
wire [7:0] rx_device_cfg_octets_per_frame;
wire [7:0] rx_device_cfg_beats_per_multiframe;
wire rx_device_cfg_sysref_disable;
wire rx_device_cfg_sysref_oneshot;
wire rx_device_cfg_buffer_early_release;
wire [7:0] rx_device_cfg_buffer_delay;
wire rx_cfg_disable_scrambler;
wire rx_cfg_disable_char_replacement;
wire rx_cfg_buffer_early_release;
wire [7:0] rx_cfg_buffer_delay;
wire [NUM_LANES-1:0] rx_status_lane_ifs_ready;
wire [NUM_LANES*14-1:0] rx_status_lane_latency;
wire [NUM_LANES*8-1:0] rx_status_lane_frame_align_err_cnt;
@ -376,7 +402,8 @@ module frame_align_tb;
.LINK_MODE(1),
.SYSREF_DISABLE(SYSREF_DISABLE),
.SYSREF_ONE_SHOT(SYSREF_ONE_SHOT),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH)
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH)
) i_rx_cfg (
.clk(clk),
@ -384,14 +411,18 @@ module frame_align_tb;
.cfg_links_disable(rx_cfg_links_disable),
.cfg_octets_per_multiframe(rx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
.cfg_lmfc_offset(rx_cfg_lmfc_offset),
.cfg_sysref_disable(rx_cfg_sysref_disable),
.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
.cfg_buffer_delay(rx_cfg_buffer_delay),
.cfg_buffer_early_release(rx_cfg_buffer_early_release),
.cfg_frame_align_err_threshold(rx_cfg_frame_align_err_threshold)
.cfg_frame_align_err_threshold(rx_cfg_frame_align_err_threshold),
.device_cfg_octets_per_multiframe(rx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(rx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(rx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(rx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(rx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(rx_device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(rx_device_cfg_buffer_early_release),
.device_cfg_buffer_delay(rx_device_cfg_buffer_delay)
);
jesd204_rx #(
@ -401,11 +432,17 @@ module frame_align_tb;
.LINK_MODE(1),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ENABLE_FRAME_ALIGN_CHECK(1),
.ENABLE_FRAME_ALIGN_ERR_RESET(1)
.ENABLE_FRAME_ALIGN_ERR_RESET(1),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ASYNC_CLK(0),
.ENABLE_CHAR_REPLACE(1)
) i_rx (
.clk(clk),
.reset(reset),
.device_clk(clk),
.device_reset(reset),
.phy_data(phy_data_in),
.phy_header({2*NUM_LANES{1'b0}}),
.phy_charisk(phy_charisk_in),
@ -417,8 +454,10 @@ module frame_align_tb;
.lmfc_edge(rx_lmfc_edge),
.lmfc_clk(rx_lmfc_clk),
.event_sysref_alignment_error(rx_event_sysref_alignment_error),
.event_sysref_edge(rx_event_sysref_edge),
.device_event_sysref_alignment_error(rx_event_sysref_alignment_error),
.device_event_sysref_edge(rx_event_sysref_edge),
.event_frame_alignment_error(),
.event_unexpected_lane_state_error(),
.sync(sync),
@ -428,19 +467,25 @@ module frame_align_tb;
.rx_valid(rx_valid),
.rx_eof(rx_eof),
.rx_sof(rx_sof),
.rx_eomf(),
.rx_somf(),
.cfg_lanes_disable(rx_cfg_lanes_disable),
.cfg_links_disable(rx_cfg_links_disable),
.cfg_octets_per_multiframe(rx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
.cfg_lmfc_offset(rx_cfg_lmfc_offset),
.cfg_sysref_disable(rx_cfg_sysref_disable),
.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
.cfg_buffer_early_release(rx_cfg_buffer_early_release),
.cfg_buffer_delay(rx_cfg_buffer_delay),
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(rx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(rx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(rx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(rx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(rx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(rx_device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(rx_device_cfg_buffer_early_release),
.device_cfg_buffer_delay(rx_device_cfg_buffer_delay),
.ctrl_err_statistics_reset(1'b0),
.ctrl_err_statistics_mask(7'b0),
@ -458,7 +503,11 @@ module frame_align_tb;
.status_lane_ifs_ready(rx_status_lane_ifs_ready),
.status_lane_latency(rx_status_lane_latency),
.status_lane_emb_state(),
.status_lane_frame_align_err_cnt(rx_status_lane_frame_align_err_cnt)
.status_lane_frame_align_err_cnt(rx_status_lane_frame_align_err_cnt),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
);
assign cur_data_mismatch = (rx_data & rx_mask) !== ({NUM_LANES{rx_ref_data}} & rx_mask);

4
library/jesd204/tb/jesd204_frame_mark_tb.v
View File

@ -54,6 +54,7 @@ parameter VCD_FILE = "jesd204_frame_mark_tb.vcd";
localparam DATA_PATH_WIDTH = 8;
wire [9:0] cfg_octets_per_multiframe = 23;
wire [7:0] cfg_beats_per_multiframe = 2;
wire [7:0] cfg_octets_per_frame = 5;
wire [DATA_PATH_WIDTH-1:0] sof;
wire [DATA_PATH_WIDTH-1:0] somf;
@ -67,6 +68,7 @@ jesd204_frame_mark #(
.clk (clk),
.reset (reset),
.cfg_octets_per_multiframe (cfg_octets_per_multiframe),
.cfg_beats_per_multiframe (cfg_beats_per_multiframe),
.cfg_octets_per_frame (cfg_octets_per_frame),
.sof (sof),
.eof (eof),
@ -74,4 +76,4 @@ jesd204_frame_mark #(
.eomf (eomf)
);
endmodule
endmodule

212
library/jesd204/tb/loopback_64b_tb.v
View File

@ -53,9 +53,10 @@ module loopback_64b_tb;
parameter ENABLE_SCRAMBLER = 1;
parameter BUFFER_EARLY_RELEASE = 0;
parameter LANE_DELAY = 1;
parameter DATA_PATH_WIDTH = 8;
localparam BEATS_PER_MULTIFRAME = OCTETS_PER_FRAME * FRAMES_PER_MULTIFRAME / 8;
localparam TX_LATENCY = 3;
localparam TX_LATENCY = 3 + i_tx.NUM_OUTPUT_PIPELINE;
localparam RX_LATENCY = 3;
localparam BASE_LATENCY = TX_LATENCY + RX_LATENCY;
@ -99,7 +100,7 @@ module loopback_64b_tb;
wire [NUM_LANES*2-1:0] phy_header_out;
wire [NUM_LANES*64-1:0] phy_data_in;
wire [NUM_LANES*2-1:0] phy_header_in;
reg [NUM_LANES-1:0] phy_block_sync = {NUM_LANES{1'b1}};
reg [5:0] sysref_counter = 'h00;
@ -142,11 +143,14 @@ module loopback_64b_tb;
wire [NUM_LANES-1:0] tx_cfg_lanes_disable;
wire [NUM_LINKS-1:0] tx_cfg_links_disable;
wire [7:0] tx_cfg_beats_per_multiframe;
wire [9:0] tx_cfg_octets_per_multiframe;
wire [7:0] tx_cfg_octets_per_frame;
wire [7:0] tx_cfg_lmfc_offset;
wire tx_cfg_sysref_disable;
wire tx_cfg_sysref_oneshot;
wire [7:0] tx_device_cfg_lmfc_offset;
wire [9:0] tx_device_cfg_octets_per_multiframe;
wire [7:0] tx_device_cfg_octets_per_frame;
wire [7:0] tx_device_cfg_beats_per_multiframe;
wire tx_device_cfg_sysref_disable;
wire tx_device_cfg_sysref_oneshot;
wire tx_cfg_continuous_cgs;
wire tx_cfg_continuous_ilas;
wire tx_cfg_skip_ilas;
@ -156,7 +160,7 @@ module loopback_64b_tb;
wire tx_ilas_config_rd;
wire [1:0] tx_ilas_config_addr;
wire [32*NUM_LANES-1:0] tx_ilas_config_data;
wire [DATA_PATH_WIDTH*8*NUM_LANES-1:0] tx_ilas_config_data;
jesd204_tx_static_config #(
.NUM_LANES(NUM_LANES),
@ -164,17 +168,16 @@ module loopback_64b_tb;
.OCTETS_PER_FRAME(OCTETS_PER_FRAME),
.FRAMES_PER_MULTIFRAME(FRAMES_PER_MULTIFRAME),
.SCR(ENABLE_SCRAMBLER),
.LINK_MODE(2)
.LINK_MODE(2),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH)
) i_tx_cfg (
.clk(clk),
.cfg_lanes_disable(tx_cfg_lanes_disable),
.cfg_links_disable(tx_cfg_links_disable),
.cfg_beats_per_multiframe(tx_cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(tx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(tx_cfg_octets_per_frame),
.cfg_lmfc_offset(tx_cfg_lmfc_offset),
.cfg_sysref_disable(tx_cfg_sysref_disable),
.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
.cfg_continuous_cgs(tx_cfg_continuous_cgs),
.cfg_continuous_ilas(tx_cfg_continuous_ilas),
.cfg_skip_ilas(tx_cfg_skip_ilas),
@ -182,6 +185,13 @@ module loopback_64b_tb;
.cfg_disable_char_replacement(tx_cfg_disable_char_replacement),
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(tx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(tx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(tx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(tx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(tx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(tx_device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
.ilas_config_data(tx_ilas_config_data)
@ -190,18 +200,40 @@ module loopback_64b_tb;
jesd204_tx #(
.NUM_LANES(NUM_LANES),
.NUM_LINKS(NUM_LINKS),
.LINK_MODE(2)
.LINK_MODE(2),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ASYNC_CLK(0),
.ENABLE_CHAR_REPLACE(1)
) i_tx (
.clk(clk),
.reset(reset),
.device_clk(clk),
.device_reset(reset),
.phy_data(phy_data_out),
.phy_charisk(),
.phy_header(phy_header_out),
.sysref(sysref_tx),
.lmfc_edge(),
.lmfc_clk(),
.sync(),
.tx_data({NUM_LANES{tx_data}}),
.tx_ready(tx_ready),
.tx_eof(),
.tx_sof(),
.tx_somf(),
.tx_eomf(),
.tx_valid(),
.cfg_lanes_disable(tx_cfg_lanes_disable),
.cfg_links_disable(tx_cfg_links_disable),
.cfg_beats_per_multiframe(tx_cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(tx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(tx_cfg_octets_per_frame),
.cfg_lmfc_offset(tx_cfg_lmfc_offset),
.cfg_sysref_disable(tx_cfg_sysref_disable),
.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
.cfg_continuous_cgs(tx_cfg_continuous_cgs),
.cfg_continuous_ilas(tx_cfg_continuous_ilas),
.cfg_skip_ilas(tx_cfg_skip_ilas),
@ -209,43 +241,46 @@ module loopback_64b_tb;
.cfg_disable_char_replacement(tx_cfg_disable_char_replacement),
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(tx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(tx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(tx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(tx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(tx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(tx_device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
.ilas_config_data(tx_ilas_config_data),
.ctrl_manual_sync_request(1'b0),
.tx_ready(tx_ready),
.tx_data({NUM_LANES{tx_data}}),
.tx_valid(),
.device_event_sysref_edge(),
.device_event_sysref_alignment_error(),
.sync(),
.sysref(sysref_tx),
.phy_data(phy_data_out),
.phy_charisk(),
.phy_header(phy_header_out),
.lmfc_edge(),
.lmfc_clk(),
.event_sysref_edge(),
.event_sysref_alignment_error(),
.status_sync(),
.status_state()
.status_state(),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
);
wire [NUM_LANES-1:0] rx_cfg_lanes_disable;
wire [NUM_LINKS-1:0] rx_cfg_links_disable;
wire [7:0] rx_cfg_beats_per_multiframe;
wire [9:0] rx_cfg_octets_per_multiframe;
wire [7:0] rx_cfg_octets_per_frame;
wire [7:0] rx_cfg_lmfc_offset;
wire rx_sysref_disable;
wire rx_sysref_oneshot;
wire [7:0] rx_device_cfg_lmfc_offset;
wire [9:0] rx_device_cfg_octets_per_multiframe;
wire [7:0] rx_device_cfg_octets_per_frame;
wire [7:0] rx_device_cfg_beats_per_multiframe;
wire rx_device_cfg_sysref_disable;
wire rx_device_cfg_sysref_oneshot;
wire rx_device_cfg_buffer_early_release;
wire [7:0] rx_device_cfg_buffer_delay;
wire rx_cfg_disable_scrambler;
wire rx_cfg_disable_char_replacement;
wire rx_cfg_buffer_early_release;
wire [7:0] rx_cfg_buffer_delay;
wire [NUM_LANES*3-1:0] status_lane_emb_state;
wire [7:0] rx_cfg_frame_align_err_threshold;
jesd204_rx_static_config #(
.NUM_LANES(NUM_LANES),
@ -259,69 +294,100 @@ module loopback_64b_tb;
.cfg_lanes_disable(rx_cfg_lanes_disable),
.cfg_links_disable(rx_cfg_links_disable),
.cfg_beats_per_multiframe(rx_cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(rx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
.cfg_lmfc_offset(rx_cfg_lmfc_offset),
.cfg_sysref_disable(rx_cfg_sysref_disable),
.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
.cfg_buffer_delay(rx_cfg_buffer_delay),
.cfg_buffer_early_release(rx_cfg_buffer_early_release)
.cfg_frame_align_err_threshold(rx_cfg_frame_align_err_threshold),
.device_cfg_octets_per_multiframe(rx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(rx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(rx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(rx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(rx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(rx_device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(rx_device_cfg_buffer_early_release),
.device_cfg_buffer_delay(rx_device_cfg_buffer_delay)
);
jesd204_rx #(
.NUM_LANES(NUM_LANES),
.LINK_MODE(2)
.LINK_MODE(2),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ASYNC_CLK(0)
) i_rx (
.clk(clk),
.reset(reset),
.cfg_lanes_disable(rx_cfg_lanes_disable),
.cfg_links_disable(rx_cfg_links_disable),
.cfg_beats_per_multiframe(rx_cfg_beats_per_multiframe),
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
.cfg_lmfc_offset(rx_cfg_lmfc_offset),
.cfg_sysref_disable(rx_cfg_sysref_disable),
.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
.cfg_buffer_delay(rx_cfg_buffer_delay),
.cfg_buffer_early_release(rx_cfg_buffer_early_release),
.device_clk(clk),
.device_reset(reset),
.ctrl_err_statistics_reset (1'b0),
.ctrl_err_statistics_mask(7'b0),
.phy_data(phy_data_in),
.phy_header(phy_header_in),
.phy_charisk({NUM_LANES*DATA_PATH_WIDTH{1'b0}}),
.phy_notintable({NUM_LANES*DATA_PATH_WIDTH{1'b0}}),
.phy_disperr({NUM_LANES*DATA_PATH_WIDTH{1'b0}}),
.phy_block_sync(phy_block_sync),
.sysref(sysref_rx),
.lmfc_edge(),
.lmfc_clk(),
.device_event_sysref_alignment_error(),
.device_event_sysref_edge(),
.event_frame_alignment_error(),
.event_unexpected_lane_state_error(),
.sync(),
.sysref(sysref_rx),
.phy_en_char_align(),
.rx_data(rx_data),
.rx_valid(rx_valid),
.rx_eof(),
.rx_sof(),
.rx_eomf(),
.rx_somf(),
.phy_data(phy_data_in),
.phy_charisk({NUM_LANES{4'b0}}),
.phy_notintable({NUM_LANES{4'b0000}}),
.phy_disperr({NUM_LANES{4'b0000}}),
.phy_header(phy_header_in),
.phy_block_sync(phy_block_sync),
.cfg_lanes_disable(rx_cfg_lanes_disable),
.cfg_links_disable(rx_cfg_links_disable),
.cfg_octets_per_multiframe(rx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(rx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(rx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(rx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(rx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(rx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(rx_device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(rx_device_cfg_buffer_early_release),
.device_cfg_buffer_delay(rx_device_cfg_buffer_delay),
.ctrl_err_statistics_reset(1'b0),
.ctrl_err_statistics_mask(7'b0),
.cfg_frame_align_err_threshold(rx_cfg_frame_align_err_threshold),
.status_lane_ifs_ready(),
.status_lane_latency(),
.status_err_statistics_cnt(),
.lmfc_edge(),
.lmfc_clk(),
.event_sysref_alignment_error(),
.event_sysref_edge(),
.phy_en_char_align(),
.ilas_config_valid(),
.ilas_config_addr(),
.ilas_config_data(),
.status_ctrl_state(),
.status_lane_cgs_state(),
.status_lane_emb_state(status_lane_emb_state)
.status_lane_ifs_ready(),
.status_lane_latency(),
.status_lane_emb_state(status_lane_emb_state),
.status_lane_frame_align_err_cnt(),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
);
integer ii;

126
library/jesd204/tb/loopback_tb.v
View File

@ -54,7 +54,7 @@ module loopback_tb;
parameter N = 16;
parameter NP = 16;
parameter HIGH_DENSITY = 1'b0;
parameter ENABLE_SCRAMBLER = 0;
parameter ENABLE_SCRAMBLER = 1;
parameter BUFFER_EARLY_RELEASE = 1;
parameter SYSREF_DISABLE = 0;
parameter SYSREF_ONE_SHOT = 0;
@ -64,7 +64,7 @@ module loopback_tb;
localparam DPW_LOG2 = DATA_PATH_WIDTH == 8 ? 3 : DATA_PATH_WIDTH == 4 ? 2 : 1;
localparam BEATS_PER_MULTIFRAME = OCTETS_PER_FRAME * FRAMES_PER_MULTIFRAME / 4;
localparam TX_LATENCY = 3;
localparam TX_LATENCY = 4 + i_tx.NUM_OUTPUT_PIPELINE;
wire [31:0] RX_LATENCY = 3 + i_rx.CHAR_INFO_REGISTERED + i_rx.ALIGN_MUX_REGISTERED + i_rx.SCRAMBLER_REGISTERED;
wire [31:0] BASE_LATENCY = TX_LATENCY + RX_LATENCY;
localparam SYSREF_HALF_COUNT = OCTETS_PER_FRAME * FRAMES_PER_MULTIFRAME;
@ -105,7 +105,6 @@ module loopback_tb;
end
end
reg [(DATA_PATH_WIDTH*8)-1:0] tx_random_data;
wire [(DATA_PATH_WIDTH*8)-1:0] tx_data;
wire [(DATA_PATH_WIDTH*8)-1:0] rx_ref_data;
@ -171,9 +170,12 @@ module loopback_tb;
wire [NUM_LINKS-1:0] tx_cfg_links_disable;
wire [9:0] tx_cfg_octets_per_multiframe;
wire [7:0] tx_cfg_octets_per_frame;
wire [7:0] tx_cfg_lmfc_offset;
wire tx_cfg_sysref_disable;
wire tx_cfg_sysref_oneshot;
wire [7:0] tx_device_cfg_lmfc_offset;
wire [9:0] tx_device_cfg_octets_per_multiframe;
wire [7:0] tx_device_cfg_octets_per_frame;
wire [7:0] tx_device_cfg_beats_per_multiframe;
wire tx_device_cfg_sysref_disable;
wire tx_device_cfg_sysref_oneshot;
wire tx_cfg_continuous_cgs;
wire tx_cfg_continuous_ilas;
wire tx_cfg_skip_ilas;
@ -206,7 +208,8 @@ module loopback_tb;
.LINK_MODE(1),
.SYSREF_DISABLE(SYSREF_DISABLE),
.SYSREF_ONE_SHOT(SYSREF_ONE_SHOT),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH)
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH)
) i_tx_cfg (
.clk(clk),
@ -214,9 +217,6 @@ module loopback_tb;
.cfg_links_disable(tx_cfg_links_disable),
.cfg_octets_per_multiframe(tx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(tx_cfg_octets_per_frame),
.cfg_lmfc_offset(tx_cfg_lmfc_offset),
.cfg_sysref_disable(tx_cfg_sysref_disable),
.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
.cfg_continuous_cgs(tx_cfg_continuous_cgs),
.cfg_continuous_ilas(tx_cfg_continuous_ilas),
.cfg_skip_ilas(tx_cfg_skip_ilas),
@ -224,6 +224,13 @@ module loopback_tb;
.cfg_disable_char_replacement(tx_cfg_disable_char_replacement),
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(tx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(tx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(tx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(tx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(tx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(tx_device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
.ilas_config_data(tx_ilas_config_data)
@ -234,11 +241,17 @@ module loopback_tb;
.NUM_LINKS(NUM_LINKS),
.NUM_OUTPUT_PIPELINE(0),
.LINK_MODE(1),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH)
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ASYNC_CLK(0),
.ENABLE_CHAR_REPLACE(1)
) i_tx (
.clk(clk),
.reset(reset),
.device_clk(clk),
.device_reset(reset),
.phy_data(phy_data_out),
.phy_charisk(phy_charisk_out),
.phy_header(),
@ -253,15 +266,14 @@ module loopback_tb;
.tx_ready(tx_ready),
.tx_eof(tx_eof),
.tx_sof(tx_sof),
.tx_somf(),
.tx_eomf(),
.tx_valid(1'b1),
.cfg_lanes_disable(tx_cfg_lanes_disable),
.cfg_links_disable(tx_cfg_links_disable),
.cfg_octets_per_multiframe(tx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(tx_cfg_octets_per_frame),
.cfg_lmfc_offset(tx_cfg_lmfc_offset),
.cfg_sysref_disable(tx_cfg_sysref_disable),
.cfg_sysref_oneshot(tx_cfg_sysref_oneshot),
.cfg_continuous_cgs(tx_cfg_continuous_cgs),
.cfg_continuous_ilas(tx_cfg_continuous_ilas),
.cfg_skip_ilas(tx_cfg_skip_ilas),
@ -269,30 +281,44 @@ module loopback_tb;
.cfg_disable_char_replacement(tx_cfg_disable_char_replacement),
.cfg_disable_scrambler(tx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(tx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(tx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(tx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(tx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(tx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(tx_device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
.ilas_config_data(tx_ilas_config_data),
.ctrl_manual_sync_request(1'b0),
.event_sysref_edge (tx_event_sysref_edge),
.event_sysref_alignment_error (tx_event_sysref_alignment_error),
.device_event_sysref_edge (tx_event_sysref_edge),
.device_event_sysref_alignment_error (tx_event_sysref_alignment_error),
.status_sync (tx_status_sync),
.status_state (tx_status_state)
.status_state (tx_status_state),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
);
wire [NUM_LANES-1:0] rx_cfg_lanes_disable;
wire [NUM_LINKS-1:0] rx_cfg_links_disable;
wire [9:0] rx_cfg_octets_per_multiframe;
wire [7:0] rx_cfg_octets_per_frame;
wire [7:0] rx_cfg_lmfc_offset;
wire rx_cfg_sysref_disable;
wire rx_cfg_sysref_oneshot;
wire [7:0] rx_device_cfg_lmfc_offset;
wire [9:0] rx_device_cfg_octets_per_multiframe;
wire [7:0] rx_device_cfg_octets_per_frame;
wire [7:0] rx_device_cfg_beats_per_multiframe;
wire rx_device_cfg_sysref_disable;
wire rx_device_cfg_sysref_oneshot;
wire rx_device_cfg_buffer_early_release;
wire [7:0] rx_device_cfg_buffer_delay;
wire rx_cfg_disable_scrambler;
wire rx_cfg_disable_char_replacement;
wire rx_cfg_buffer_early_release;
wire [7:0] rx_cfg_buffer_delay;
wire [NUM_LANES-1:0] rx_status_lane_ifs_ready;
wire [NUM_LANES*14-1:0] rx_status_lane_latency;
wire [NUM_LANES*8-1:0] rx_status_lane_frame_align_err_cnt;
@ -319,7 +345,8 @@ module loopback_tb;
.LINK_MODE(1),
.SYSREF_DISABLE(SYSREF_DISABLE),
.SYSREF_ONE_SHOT(SYSREF_ONE_SHOT),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH)
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH)
) i_rx_cfg (
.clk(clk),
@ -327,14 +354,18 @@ module loopback_tb;
.cfg_links_disable(rx_cfg_links_disable),
.cfg_octets_per_multiframe(rx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
.cfg_lmfc_offset(rx_cfg_lmfc_offset),
.cfg_sysref_disable(rx_cfg_sysref_disable),
.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
.cfg_buffer_delay(rx_cfg_buffer_delay),
.cfg_buffer_early_release(rx_cfg_buffer_early_release),
.cfg_frame_align_err_threshold(rx_cfg_frame_align_err_threshold)
.cfg_frame_align_err_threshold(rx_cfg_frame_align_err_threshold),
.device_cfg_octets_per_multiframe(rx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(rx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(rx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(rx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(rx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(rx_device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(rx_device_cfg_buffer_early_release),
.device_cfg_buffer_delay(rx_device_cfg_buffer_delay)
);
jesd204_rx #(
@ -344,11 +375,17 @@ module loopback_tb;
.LINK_MODE(1),
.DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ENABLE_FRAME_ALIGN_CHECK(1),
.ENABLE_FRAME_ALIGN_ERR_RESET(1)
.ENABLE_FRAME_ALIGN_ERR_RESET(1),
.TPL_DATA_PATH_WIDTH(DATA_PATH_WIDTH),
.ASYNC_CLK(0),
.ENABLE_CHAR_REPLACE(1)
) i_rx (
.clk(clk),
.reset(reset),
.device_clk(clk),
.device_reset(reset),
.phy_data(phy_data_in),
.phy_header({2*NUM_LANES{1'b0}}),
.phy_charisk(phy_charisk_in),
@ -360,8 +397,10 @@ module loopback_tb;
.lmfc_edge(rx_lmfc_edge),
.lmfc_clk(rx_lmfc_clk),
.event_sysref_alignment_error(rx_event_sysref_alignment_error),
.event_sysref_edge(rx_event_sysref_edge),
.device_event_sysref_alignment_error(rx_event_sysref_alignment_error),
.device_event_sysref_edge(rx_event_sysref_edge),
.event_frame_alignment_error(),
.event_unexpected_lane_state_error(),
.sync(sync),
@ -371,19 +410,25 @@ module loopback_tb;
.rx_valid(rx_valid),
.rx_eof(rx_eof),
.rx_sof(rx_sof),
.rx_eomf(),
.rx_somf(),
.cfg_lanes_disable(rx_cfg_lanes_disable),
.cfg_links_disable(rx_cfg_links_disable),
.cfg_octets_per_multiframe(rx_cfg_octets_per_multiframe),
.cfg_octets_per_frame(rx_cfg_octets_per_frame),
.cfg_lmfc_offset(rx_cfg_lmfc_offset),
.cfg_sysref_disable(rx_cfg_sysref_disable),
.cfg_sysref_oneshot(rx_cfg_sysref_oneshot),
.cfg_buffer_early_release(rx_cfg_buffer_early_release),
.cfg_buffer_delay(rx_cfg_buffer_delay),
.cfg_disable_char_replacement(rx_cfg_disable_char_replacement),
.cfg_disable_scrambler(rx_cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(rx_device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(rx_device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(rx_device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(rx_device_cfg_lmfc_offset),
.device_cfg_sysref_disable(rx_device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(rx_device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(rx_device_cfg_buffer_early_release),
.device_cfg_buffer_delay(rx_device_cfg_buffer_delay),
.ctrl_err_statistics_reset(1'b0),
.ctrl_err_statistics_mask(7'b0),
@ -397,10 +442,15 @@ module loopback_tb;
.status_ctrl_state(rx_status_ctrl_state),
.status_lane_cgs_state(rx_status_lane_cgs_state),
.status_lane_ifs_ready(rx_status_lane_ifs_ready),
.status_lane_latency(rx_status_lane_latency),
.status_lane_emb_state(),
.status_lane_frame_align_err_cnt(rx_status_lane_frame_align_err_cnt)
.status_lane_frame_align_err_cnt(rx_status_lane_frame_align_err_cnt),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
);
always @(posedge clk) begin

14
library/jesd204/tb/rx_lane_tb.v
View File

@ -63,7 +63,7 @@ module rx_lane_tb;
wire [1:0] status_cgs_state;
wire status_ifs_ready;
wire [1:0] status_frame_align;
wire [2:0] status_frame_align;
integer counter = 'h00;
wire [31:0] counter2 = (counter - 'h20) * 4;
@ -116,6 +116,9 @@ module rx_lane_tb;
.clk(clk),
.reset(1'b0),
.device_clk(clk),
.device_reset(1'b0),
.phy_data(data),
.phy_charisk(charisk),
.phy_disperr(disperr),
@ -131,18 +134,23 @@ module rx_lane_tb;
.buffer_release_n(buffer_release_n),
.buffer_ready_n(buffer_ready_n),
.cfg_octets_per_multiframe(10'd31),
.cfg_octets_per_frame(8'd3),
.cfg_disable_char_replacement(1'b0),
.cfg_disable_scrambler(1'b0),
.ilas_config_valid(ilas_config_valid),
.ilas_config_addr(ilas_config_addr),
.ilas_config_data(ilas_config_data),
.ctrl_err_statistics_reset(1'b0),
.err_statistics_reset(1'b0),
.ctrl_err_statistics_mask(3'h7),
.status_err_statistics_cnt(status_err_statistics_cnt),
.status_cgs_state(status_cgs_state),
.status_ifs_ready(status_ifs_ready),
.status_frame_align(status_frame_align)
.status_frame_align(status_frame_align),
.status_frame_align_err_cnt()
);
endmodule

113
library/jesd204/tb/rx_tb.v
View File

@ -139,13 +139,19 @@ module rx_tb;
wire [NUM_LANES-1:0] cfg_lanes_disable;
wire [NUM_LINKS-1:0] cfg_links_disable;
wire [7:0] cfg_beats_per_multiframe;
wire [9:0] cfg_octets_per_multiframe;
wire [7:0] cfg_octets_per_frame;
wire [7:0] cfg_lmfc_offset;
wire cfg_sysref_oneshot;
wire cfg_sysref_disable;
wire [7:0] device_cfg_lmfc_offset;
wire [9:0] device_cfg_octets_per_multiframe;
wire [7:0] device_cfg_octets_per_frame;
wire [7:0] device_cfg_beats_per_multiframe;
wire device_cfg_sysref_disable;
wire device_cfg_sysref_oneshot;
wire device_cfg_buffer_early_release;
wire [7:0] device_cfg_buffer_delay;
wire cfg_disable_scrambler;
wire cfg_buffer_early_release;
wire cfg_disable_char_replacement;
wire [7:0] cfg_frame_align_err_threshold;
always @(posedge clk) begin
if ($urandom % 400 == 0)
@ -171,13 +177,20 @@ module rx_tb;
.cfg_lanes_disable(cfg_lanes_disable),
.cfg_links_disable(cfg_links_disable),
.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.cfg_octets_per_frame(cfg_octets_per_frame),
.cfg_lmfc_offset(cfg_lmfc_offset),
.cfg_sysref_oneshot(cfg_sysref_oneshot),
.cfg_sysref_disable(cfg_sysref_disable),
.cfg_disable_scrambler(cfg_disable_scrambler),
.cfg_buffer_early_release(cfg_buffer_early_release)
.cfg_disable_char_replacement(cfg_disable_char_replacement),
.cfg_frame_align_err_threshold(cfg_frame_align_err_threshold),
.device_cfg_octets_per_multiframe(device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(device_cfg_lmfc_offset),
.device_cfg_sysref_disable(device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(device_cfg_buffer_early_release),
.device_cfg_buffer_delay(device_cfg_buffer_delay)
);
jesd204_rx #(
@ -187,29 +200,75 @@ module rx_tb;
.clk(clk),
.reset(reset),
.cfg_lanes_disable(cfg_lanes_disable),
.cfg_links_disable(cfg_links_disable),
.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
.cfg_octets_per_frame(cfg_octets_per_frame),
.cfg_lmfc_offset(cfg_lmfc_offset),
.cfg_sysref_oneshot(cfg_sysref_oneshot),
.cfg_sysref_disable(cfg_sysref_disable),
.cfg_disable_scrambler(cfg_disable_scrambler),
.cfg_buffer_early_release(cfg_buffer_early_release),
.ctrl_err_statistics_reset(1'b0),
.ctrl_err_statistics_mask(3'h7),
.status_err_statistics_cnt(status_err_statistics_cnt),
.phy_en_char_align(en_align),
.device_clk(clk),
.device_reset(reset),
.phy_data({NUM_LANES{data}}),
.phy_header({2*NUM_LANES{1'b0}}),
.phy_charisk({NUM_LANES{charisk}}),
.phy_notintable({NUM_LANES{notintable}}),
.phy_disperr({NUM_LANES{disperr}}),
.phy_block_sync({NUM_LANES{1'b0}}),
.sysref(sysref),
.lmfc_edge(),
.lmfc_clk(),
.device_event_sysref_alignment_error(),
.device_event_sysref_edge(),
.event_frame_alignment_error(),
.event_unexpected_lane_state_error(),
.sync(sync),
.sysref(sysref)
.phy_en_char_align(en_align),
.rx_data(),
.rx_valid(),
.rx_eof(),
.rx_sof(),
.rx_eomf(),
.rx_somf(),
.cfg_lanes_disable(cfg_lanes_disable),
.cfg_links_disable(cfg_links_disable),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.cfg_octets_per_frame(cfg_octets_per_frame),
.cfg_disable_char_replacement(cfg_disable_char_replacement),
.cfg_disable_scrambler(cfg_disable_scrambler),
.device_cfg_octets_per_multiframe(device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(device_cfg_lmfc_offset),
.device_cfg_sysref_disable(device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(device_cfg_sysref_oneshot),
.device_cfg_buffer_early_release(device_cfg_buffer_early_release),
.device_cfg_buffer_delay(device_cfg_buffer_delay),
.ctrl_err_statistics_reset(1'b0),
.ctrl_err_statistics_mask(7'h7),
.cfg_frame_align_err_threshold(cfg_frame_align_err_threshold),
.status_err_statistics_cnt(status_err_statistics_cnt),
.ilas_config_valid(),
.ilas_config_addr(),
.ilas_config_data(),
.status_ctrl_state(),
.status_lane_cgs_state(),
.status_lane_ifs_ready(),
.status_lane_latency(),
.status_lane_emb_state(),
.status_lane_frame_align_err_cnt(),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
);
endmodule

6
library/jesd204/tb/soft_pcs_8b10b_table_tb.v
View File

@ -104,7 +104,8 @@ module soft_pcs_8b10b_table_tb;
.in_char(encoder_char),
.in_charisk(encoder_charisk),
.in_disparity(encoder_disparity),
.out_char(encoder_raw)
.out_char(encoder_raw),
.out_disparity()
);
always @(posedge clk) begin
@ -132,7 +133,8 @@ module soft_pcs_8b10b_table_tb;
.out_charisk(decoder_charisk),
.in_disparity(decoder_disparity),
.out_disparity(decoder_disparity_s)
.out_disparity(decoder_disparity_s),
.out_disperr()
);
wire decoder_should_be_in_table = valid_table[decoder_raw];

105
library/jesd204/tb/tx_64b_tb.v
View File

@ -51,22 +51,24 @@ module tx_64b_tb;
parameter OCTETS_PER_FRAME = 4;
parameter FRAMES_PER_MULTIFRAME = 32;
localparam SYSREF_HALF_COUNT = OCTETS_PER_FRAME * FRAMES_PER_MULTIFRAME;
`include "tb_base.v"
reg [NUM_LINKS-1:0] sync = {NUM_LINKS{1'b1}};
reg [31:0] counter = 'h00;
reg [63:0] tx_data = 'h00000000;
wire tx_ready;
wire tx_valid = 1'b1;
wire [NUM_LANES-1:0] cfg_lanes_disable;
wire [NUM_LINKS-1:0] cfg_links_disable;
wire [7:0] cfg_beats_per_multiframe;
wire [9:0] cfg_octets_per_multiframe;
wire [7:0] cfg_octets_per_frame;
wire [7:0] cfg_lmfc_offset;
wire cfg_sysref_oneshot;
wire cfg_sysref_disable;
wire [7:0] device_cfg_lmfc_offset;
wire [9:0] device_cfg_octets_per_multiframe;
wire [7:0] device_cfg_octets_per_frame;
wire [7:0] device_cfg_beats_per_multiframe;
wire device_cfg_sysref_disable;
wire device_cfg_sysref_oneshot;
wire cfg_continuous_cgs;
wire cfg_continuous_ilas;
wire cfg_skip_ilas;
@ -75,7 +77,7 @@ module tx_64b_tb;
wire cfg_disable_scrambler;
wire tx_ilas_config_rd;
wire [1:0] tx_ilas_config_addr;
wire [32*NUM_LANES-1:0] tx_ilas_config_data;
wire [64*NUM_LANES-1:0] tx_ilas_config_data;
always @(posedge clk) begin
if (reset == 1'b1) begin
@ -85,51 +87,34 @@ module tx_64b_tb;
end
end
/* Generate independent SYNCs
*
* Each SYNC will be asserted/deasserted at different clock edges.
* The assertion/deassertion order: first SYNC[0], ..., last SYNC[NUM_LINKS-1]
*/
always @(posedge clk) begin
counter <= counter + 1'b1;
end
genvar i;
generate
for (i=1; i<=NUM_LINKS; i=i+1) begin: SYNC_GENERATOR
always @(posedge clk) begin
if (counter >= (32'h100 | (i << 4)) && counter <= (32'h300 | (i << 4))) begin
sync[i-1] <= 1'b0;
end else begin
sync[i-1] <= 1'b1;
end
end
end
endgenerate
// DUT with static configuration
jesd204_tx_static_config #(
.NUM_LANES(NUM_LANES),
.NUM_LINKS(NUM_LINKS),
.OCTETS_PER_FRAME(OCTETS_PER_FRAME),
.FRAMES_PER_MULTIFRAME(FRAMES_PER_MULTIFRAME)
.FRAMES_PER_MULTIFRAME(FRAMES_PER_MULTIFRAME),
.LINK_MODE(2)
) i_cfg (
.clk(clk),
.cfg_lanes_disable(cfg_lanes_disable),
.cfg_links_disable(cfg_links_disable),
.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.cfg_octets_per_frame(cfg_octets_per_frame),
.cfg_lmfc_offset(cfg_lmfc_offset),
.cfg_continuous_cgs(cfg_continuous_cgs),
.cfg_continuous_ilas(cfg_continuous_ilas),
.cfg_skip_ilas(cfg_skip_ilas),
.cfg_mframes_per_ilas(cfg_mframes_per_ilas),
.cfg_disable_char_replacement(cfg_disable_char_replacement),
.cfg_disable_scrambler(cfg_disable_scrambler),
.cfg_sysref_oneshot(cfg_sysref_oneshot),
.cfg_sysref_disable(cfg_sysref_disable),
.device_cfg_octets_per_multiframe(device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(device_cfg_lmfc_offset),
.device_cfg_sysref_disable(device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
@ -139,24 +124,50 @@ module tx_64b_tb;
jesd204_tx #(
.NUM_LANES(NUM_LANES),
.NUM_LINKS(NUM_LINKS),
.LINK_MODE(2)
.LINK_MODE(2),
.ASYNC_CLK(0)
) i_tx (
.clk(clk),
.reset(reset),
.device_clk(clk),
.device_reset(reset),
.phy_data(),
.phy_charisk(),
.phy_header(),
.sysref(sysref),
.lmfc_edge(),
.lmfc_clk(),
.sync(),
.tx_data({NUM_LANES{tx_data}}),
.tx_ready(tx_ready),
.tx_eof(),
.tx_sof(),
.tx_somf(),
.tx_eomf(),
.tx_valid(1'b1),
.cfg_lanes_disable(cfg_lanes_disable),
.cfg_links_disable(cfg_links_disable),
.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.cfg_octets_per_frame(cfg_octets_per_frame),
.cfg_lmfc_offset(cfg_lmfc_offset),
.cfg_continuous_cgs(cfg_continuous_cgs),
.cfg_continuous_ilas(cfg_continuous_ilas),
.cfg_skip_ilas(cfg_skip_ilas),
.cfg_mframes_per_ilas(cfg_mframes_per_ilas),
.cfg_disable_char_replacement(cfg_disable_char_replacement),
.cfg_disable_scrambler(cfg_disable_scrambler),
.cfg_sysref_oneshot(cfg_sysref_oneshot),
.cfg_sysref_disable(cfg_sysref_disable),
.device_cfg_octets_per_multiframe(device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(device_cfg_lmfc_offset),
.device_cfg_sysref_disable(device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
@ -164,12 +175,16 @@ module tx_64b_tb;
.ctrl_manual_sync_request (1'b0),
.tx_ready(tx_ready),
.tx_valid(tx_valid),
.tx_data({NUM_LANES{tx_data}}),
.device_event_sysref_edge (),
.device_event_sysref_alignment_error (),
.status_sync (),
.status_state (),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
.sync(sync),
.sysref(sysref)
);

41
library/jesd204/tb/tx_ctrl_phase_tb.v
View File

@ -52,7 +52,6 @@
module tx_ctrl_phase_tb;
parameter VCD_FILE = "tx_ctrl_phase.vcd";
parameter NUM_LANES = 1;
parameter BEATS_PER_LMFC = 20;
`include "tb_base.v"
@ -75,6 +74,8 @@ module tx_ctrl_phase_tb;
wire b_tx_ready;
wire b_lane_cgs_enable;
wire [9:0] cfg_octets_per_multiframe = BEATS_PER_LMFC*4-1;
reg reset2 = 1'b1;
integer reset_counter = 0;
@ -131,10 +132,16 @@ module tx_ctrl_phase_tb;
.sync(a_sync),
.lmfc_edge(lmfc_edge),
.somf(),
.somf_early2({3'b0,lmfc_edge}),
.eomf(),
.lane_cgs_enable(a_lane_cgs_enable),
.eof_reset(),
.tx_ready(a_tx_ready),
.tx_ready_nx(),
.tx_next_mf_ready(),
.ilas_data(a_ilas_data),
.ilas_charisk(a_ilas_charisk),
@ -143,12 +150,19 @@ module tx_ctrl_phase_tb;
.ilas_config_rd(a_ilas_config_rd),
.ilas_config_data('h00),
.ctrl_manual_sync_request(1'b0),
.cfg_lanes_disable(1'b0),
.cfg_links_disable(1'b0),
.cfg_continuous_cgs(1'b0),
.cfg_continuous_ilas(1'b0),
.cfg_skip_ilas(1'b0),
.cfg_mframes_per_ilas(8'h3)
.cfg_mframes_per_ilas(8'h3),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.ctrl_manual_sync_request(1'b0),
.status_sync(),
.status_state()
);
jesd204_tx_ctrl i_tx_ctrl_b (
@ -157,10 +171,16 @@ module tx_ctrl_phase_tb;
.sync(b_sync),
.lmfc_edge(lmfc_edge),
.somf(),
.somf_early2({3'b0,lmfc_edge}),
.eomf(),
.lane_cgs_enable(b_lane_cgs_enable),
.eof_reset(),
.tx_ready(b_tx_ready),
.tx_ready_nx(),
.tx_next_mf_ready(),
.ilas_data(b_ilas_data),
.ilas_charisk(b_ilas_charisk),
@ -169,12 +189,19 @@ module tx_ctrl_phase_tb;
.ilas_config_rd(b_ilas_config_rd),
.ilas_config_data('h00),
.ctrl_manual_sync_request(1'b0),
.cfg_lanes_disable(1'b0),
.cfg_links_disable(1'b0),
.cfg_continuous_cgs(1'b0),
.cfg_continuous_ilas(1'b0),
.cfg_skip_ilas(1'b0),
.cfg_mframes_per_ilas(8'h3)
.cfg_mframes_per_ilas(8'h3),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.ctrl_manual_sync_request(1'b0),
.status_sync(),
.status_state()
);
reg status = 1'b1;

74
library/jesd204/tb/tx_tb.v
View File

@ -62,11 +62,14 @@ module tx_tb;
wire tx_valid = 1'b1;
wire [NUM_LANES-1:0] cfg_lanes_disable;
wire [NUM_LINKS-1:0] cfg_links_disable;
wire [7:0] cfg_beats_per_multiframe;
wire [9:0] cfg_octets_per_multiframe;
wire [7:0] cfg_octets_per_frame;
wire [7:0] cfg_lmfc_offset;
wire cfg_sysref_oneshot;
wire cfg_sysref_disable;
wire [7:0] device_cfg_lmfc_offset;
wire [9:0] device_cfg_octets_per_multiframe;
wire [7:0] device_cfg_octets_per_frame;
wire [7:0] device_cfg_beats_per_multiframe;
wire device_cfg_sysref_disable;
wire device_cfg_sysref_oneshot;
wire cfg_continuous_cgs;
wire cfg_continuous_ilas;
wire cfg_skip_ilas;
@ -119,17 +122,21 @@ module tx_tb;
.cfg_lanes_disable(cfg_lanes_disable),
.cfg_links_disable(cfg_links_disable),
.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.cfg_octets_per_frame(cfg_octets_per_frame),
.cfg_lmfc_offset(cfg_lmfc_offset),
.cfg_continuous_cgs(cfg_continuous_cgs),
.cfg_continuous_ilas(cfg_continuous_ilas),
.cfg_skip_ilas(cfg_skip_ilas),
.cfg_mframes_per_ilas(cfg_mframes_per_ilas),
.cfg_disable_char_replacement(cfg_disable_char_replacement),
.cfg_disable_scrambler(cfg_disable_scrambler),
.cfg_sysref_oneshot(cfg_sysref_oneshot),
.cfg_sysref_disable(cfg_sysref_disable),
.device_cfg_octets_per_multiframe(device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(device_cfg_lmfc_offset),
.device_cfg_sysref_disable(device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
@ -138,24 +145,50 @@ module tx_tb;
jesd204_tx #(
.NUM_LANES(NUM_LANES),
.NUM_LINKS(NUM_LINKS)
.NUM_LINKS(NUM_LINKS),
.ASYNC_CLK(0)
) i_tx (
.clk(clk),
.reset(reset),
.device_clk(clk),
.device_reset(reset),
.phy_data(),
.phy_charisk(),
.phy_header(),
.sysref(sysref),
.lmfc_edge(),
.lmfc_clk(),
.sync(sync),
.tx_data({NUM_LANES{tx_data}}),
.tx_ready(tx_ready),
.tx_eof(),
.tx_sof(),
.tx_somf(),
.tx_eomf(),
.tx_valid(1'b1),
.cfg_lanes_disable(cfg_lanes_disable),
.cfg_links_disable(cfg_links_disable),
.cfg_beats_per_multiframe(cfg_beats_per_multiframe),
.cfg_octets_per_multiframe(cfg_octets_per_multiframe),
.cfg_octets_per_frame(cfg_octets_per_frame),
.cfg_lmfc_offset(cfg_lmfc_offset),
.cfg_continuous_cgs(cfg_continuous_cgs),
.cfg_continuous_ilas(cfg_continuous_ilas),
.cfg_skip_ilas(cfg_skip_ilas),
.cfg_mframes_per_ilas(cfg_mframes_per_ilas),
.cfg_disable_char_replacement(cfg_disable_char_replacement),
.cfg_disable_scrambler(cfg_disable_scrambler),
.cfg_sysref_oneshot(cfg_sysref_oneshot),
.cfg_sysref_disable(cfg_sysref_disable),
.device_cfg_octets_per_multiframe(device_cfg_octets_per_multiframe),
.device_cfg_octets_per_frame(device_cfg_octets_per_frame),
.device_cfg_beats_per_multiframe(device_cfg_beats_per_multiframe),
.device_cfg_lmfc_offset(device_cfg_lmfc_offset),
.device_cfg_sysref_disable(device_cfg_sysref_disable),
.device_cfg_sysref_oneshot(device_cfg_sysref_oneshot),
.ilas_config_rd(tx_ilas_config_rd),
.ilas_config_addr(tx_ilas_config_addr),
@ -163,12 +196,17 @@ module tx_tb;
.ctrl_manual_sync_request (1'b0),
.tx_ready(tx_ready),
.tx_valid(tx_valid),
.tx_data({NUM_LANES{tx_data}}),
.device_event_sysref_edge (),
.device_event_sysref_alignment_error (),
.status_sync (),
.status_state (),
.status_synth_params0(),
.status_synth_params1(),
.status_synth_params2()
.sync(sync),
.sysref(sysref)
);