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pzsdr: ccpci: Set IO standard to LVCMOS33 for banks 12 and 13 

The IO voltage for bank 12 and 13 is 3.3V on the PCIe carrier. Set the
IOSTANDARD of the pins on these banks accordingly.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2016-07-14 17:20:04 +02:00
parent 418217dd10
commit 91782989ad
1 changed files with 6 additions and 2 deletions
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8
projects/pzsdr/ccpci/system_constr.xdc
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@ -19,8 +19,12 @@ set_property -dict {PACKAGE_PIN AF4} [get_ports pcie_data_tx_p[2]]
set_property -dict {PACKAGE_PIN AF3} [get_ports pcie_data_tx_n[2]] ; ## MGTXTXN1_111 set_property -dict {PACKAGE_PIN AF3} [get_ports pcie_data_tx_n[2]] ; ## MGTXTXN1_111
set_property -dict {PACKAGE_PIN AF8} [get_ports pcie_data_tx_p[3]] ; ## MGTXTXP0_111 set_property -dict {PACKAGE_PIN AF8} [get_ports pcie_data_tx_p[3]] ; ## MGTXTXP0_111
set_property -dict {PACKAGE_PIN AF7} [get_ports pcie_data_tx_n[3]] ; ## MGTXTXN0_111 set_property -dict {PACKAGE_PIN AF7} [get_ports pcie_data_tx_n[3]] ; ## MGTXTXN0_111
set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS25} [get_ports pcie_rstn] ; ## IO_L19P_T3_13 set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS33} [get_ports pcie_rstn] ; ## IO_L19P_T3_13
set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVCMOS25} [get_ports pcie_waken] ; ## IO_L20N_T3_13 set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVCMOS33} [get_ports pcie_waken] ; ## IO_L20N_T3_13
# Default constraints have LVCMOS25, overwite it
set_property -dict {IOSTANDARD LVCMOS33} [get_ports iic_scl] ; ## IO_L5P_T0_13
set_property -dict {IOSTANDARD LVCMOS33} [get_ports iic_sda] ; ## IO_L5N_T0_13
set_property PULLUP true [get_ports pcie_rstn] set_property PULLUP true [get_ports pcie_rstn]
set_property LOC IBUFDS_GTE2_X0Y5 [get_cells i_ibufds_pcie_ref_clk] set_property LOC IBUFDS_GTE2_X0Y5 [get_cells i_ibufds_pcie_ref_clk]