From 91765fdd822ecc9e2f8b9e664f8bd6677b83ec30 Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Thu, 5 Mar 2015 10:55:01 -0500 Subject: [PATCH] daq2+base: board tcl updates --- projects/common/zc706/zc706_system_bd.tcl | 219 +++++++++++----------- 1 file changed, 107 insertions(+), 112 deletions(-) diff --git a/projects/common/zc706/zc706_system_bd.tcl b/projects/common/zc706/zc706_system_bd.tcl index 81aaae09a..a0ff4ef1a 100644 --- a/projects/common/zc706/zc706_system_bd.tcl +++ b/projects/common/zc706/zc706_system_bd.tcl @@ -46,9 +46,9 @@ set_property -dict [list CONFIG.IIC_BOARD_INTERFACE {Custom}] $axi_iic_main set sys_concat_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 sys_concat_intc] set_property -dict [list CONFIG.NUM_PORTS {16}] $sys_concat_intc -set axi_cpu_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_interconnect] -set_property -dict [list CONFIG.NUM_MI {7}] $axi_cpu_interconnect -set_property -dict [list CONFIG.STRATEGY {1}] $axi_cpu_interconnect +#set axi_cpu_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_interconnect] +#set_property -dict [list CONFIG.NUM_MI {7}] $axi_cpu_interconnect +#set_property -dict [list CONFIG.STRATEGY {1}] $axi_cpu_interconnect set sys_rstgen [create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 sys_rstgen] set_property -dict [list CONFIG.C_EXT_RST_WIDTH {1}] $sys_rstgen @@ -63,8 +63,8 @@ set_property -dict [list CONFIG.c_m_axis_mm2s_tdata_width {64}] $axi_hdmi_dma set_property -dict [list CONFIG.c_use_mm2s_fsync {1}] $axi_hdmi_dma set_property -dict [list CONFIG.c_include_s2mm {0}] $axi_hdmi_dma -set axi_hdmi_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_hdmi_interconnect] -set_property -dict [list CONFIG.NUM_MI {1}] $axi_hdmi_interconnect +#set axi_hdmi_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_hdmi_interconnect] +#set_property -dict [list CONFIG.NUM_MI {1}] $axi_hdmi_interconnect # audio peripherals @@ -80,142 +80,137 @@ set_property -dict [list CONFIG.C_S_AXI_ADDR_WIDTH {16}] $axi_spdif_tx_core # system reset/clock definitions -set sys_100m_clk_source [get_bd_pins sys_ps7/FCLK_CLK0] -set sys_200m_clk_source [get_bd_pins sys_ps7/FCLK_CLK1] +ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0 +ad_connect sys_200m_clk sys_ps7/FCLK_CLK1 +ad_connect sys_cpu_reset sys_rstgen/peripheral_reset +ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn -connect_bd_net -net sys_100m_clk $sys_100m_clk_source -connect_bd_net -net sys_200m_clk $sys_200m_clk_source - -connect_bd_net -net sys_100m_clk [get_bd_pins sys_rstgen/slowest_sync_clk] -connect_bd_net -net sys_aux_reset [get_bd_pins sys_rstgen/ext_reset_in] [get_bd_pins sys_ps7/FCLK_RESET0_N] - -set sys_100m_resetn_source [get_bd_pins sys_rstgen/peripheral_aresetn] -set sys_200m_resetn_source [get_bd_pins sys_rstgen/interconnect_aresetn] -connect_bd_net -net sys_100m_resetn $sys_100m_resetn_source -connect_bd_net -net sys_200m_resetn $sys_200m_resetn_source +ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk +ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N # interface connections -connect_bd_intf_net -intf_net sys_ps7_ddr [get_bd_intf_ports DDR] [get_bd_intf_pins sys_ps7/DDR] -connect_bd_net -net sys_ps7_GPIO_I [get_bd_ports GPIO_I] [get_bd_pins sys_ps7/GPIO_I] -connect_bd_net -net sys_ps7_GPIO_O [get_bd_ports GPIO_O] [get_bd_pins sys_ps7/GPIO_O] -connect_bd_net -net sys_ps7_GPIO_T [get_bd_ports GPIO_T] [get_bd_pins sys_ps7/GPIO_T] -connect_bd_intf_net -intf_net sys_ps7_fixed_io [get_bd_intf_ports FIXED_IO] [get_bd_intf_pins sys_ps7/FIXED_IO] -connect_bd_intf_net -intf_net axi_iic_main_iic [get_bd_intf_ports IIC_MAIN] [get_bd_intf_pins axi_iic_main/iic] +ad_connect DDR sys_ps7/DDR +ad_connect GPIO_I sys_ps7/GPIO_I +ad_connect GPIO_O sys_ps7/GPIO_O +ad_connect GPIO_T sys_ps7/GPIO_T +ad_connect FIXED_IO sys_ps7/FIXED_IO +ad_connect IIC_MAIN axi_iic_main/iic +ad_connect sys_200m_clk axi_hdmi_clkgen/clk -connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/M_AXI_GP0_ACLK] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/ARESETN] $sys_100m_resetn_source +#ad_connect sys_cpu_clk sys_ps7/M_AXI_GP0_ACLK +#ad_connect sys_cpu_clk axi_cpu_interconnect/ACLK +#ad_connect sys_cpu_resetn axi_cpu_interconnect/ARESETN -connect_bd_intf_net -intf_net axi_cpu_interconnect_s00_axi [get_bd_intf_pins axi_cpu_interconnect/S00_AXI] [get_bd_intf_pins sys_ps7/M_AXI_GP0] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/S00_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/S00_ARESETN] $sys_100m_resetn_source - -connect_bd_intf_net -intf_net axi_cpu_interconnect_m00_axi [get_bd_intf_pins axi_cpu_interconnect/M00_AXI] [get_bd_intf_pins axi_iic_main/s_axi] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M00_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M00_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_iic_main/s_axi_aclk] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_iic_main/s_axi_aresetn] +#ad_connect axi_cpu_interconnect/S00_AXI sys_ps7/M_AXI_GP0 +#ad_connect sys_cpu_clk axi_cpu_interconnect/S00_ACLK +#ad_connect sys_cpu_resetn axi_cpu_interconnect/S00_ARESETN +#ad_connect axi_cpu_interconnect/M00_AXI axi_iic_main/s_axi +#ad_connect sys_cpu_clk axi_cpu_interconnect/M00_ACLK +#ad_connect sys_cpu_resetn axi_cpu_interconnect/M00_ARESETN +#ad_connect sys_cpu_clk axi_iic_main/s_axi_aclk +#ad_connect sys_cpu_resetn axi_iic_main/s_axi_aresetn # hdmi -connect_bd_net -net sys_200m_clk [get_bd_pins axi_hdmi_clkgen/clk] -connect_bd_intf_net -intf_net axi_cpu_interconnect_m01_axi [get_bd_intf_pins axi_cpu_interconnect/M01_AXI] [get_bd_intf_pins axi_hdmi_clkgen/s_axi] -connect_bd_intf_net -intf_net axi_cpu_interconnect_m02_axi [get_bd_intf_pins axi_cpu_interconnect/M02_AXI] [get_bd_intf_pins axi_hdmi_core/s_axi] -connect_bd_intf_net -intf_net axi_cpu_interconnect_m03_axi [get_bd_intf_pins axi_cpu_interconnect/M03_AXI] [get_bd_intf_pins axi_hdmi_dma/S_AXI_LITE] +#ad_connect axi_cpu_interconnect/M01_AXI axi_hdmi_clkgen/s_axi +#ad_connect axi_cpu_interconnect/M02_AXI axi_hdmi_core/s_axi +#ad_connect axi_cpu_interconnect/M03_AXI axi_hdmi_dma/S_AXI_LITE +#ad_connect axi_hdmi_interconnect/S00_AXI axi_hdmi_dma/M_AXI_MM2S +#ad_connect axi_hdmi_interconnect/M00_AXI sys_ps7/S_AXI_HP0 +#ad_connect sys_cpu_clk axi_cpu_interconnect/M01_ACLK +#ad_connect sys_cpu_clk axi_cpu_interconnect/M02_ACLK +#ad_connect sys_cpu_clk axi_cpu_interconnect/M03_ACLK +#ad_connect sys_cpu_clk axi_hdmi_interconnect/ACLK +#ad_connect sys_cpu_clk axi_hdmi_interconnect/S00_ACLK +#ad_connect sys_cpu_clk axi_hdmi_interconnect/M00_ACLK +#ad_connect sys_cpu_clk axi_hdmi_clkgen/s_axi_aclk +#ad_connect sys_cpu_clk axi_hdmi_core/s_axi_aclk +#ad_connect sys_cpu_clk axi_hdmi_dma/s_axi_lite_aclk +#ad_connect sys_cpu_clk axi_hdmi_dma/m_axi_mm2s_aclk +#ad_connect sys_cpu_clk sys_ps7/S_AXI_HP0_ACLK +#ad_connect sys_cpu_resetn axi_cpu_interconnect/M01_ARESETN +#ad_connect sys_cpu_resetn axi_cpu_interconnect/M02_ARESETN +#ad_connect sys_cpu_resetn axi_cpu_interconnect/M03_ARESETN +#ad_connect sys_cpu_resetn axi_hdmi_interconnect/ARESETN +#ad_connect sys_cpu_resetn axi_hdmi_interconnect/S00_ARESETN +#ad_connect sys_cpu_resetn axi_hdmi_interconnect/M00_ARESETN +#ad_connect sys_cpu_resetn axi_hdmi_clkgen/s_axi_aresetn +#ad_connect sys_cpu_resetn axi_hdmi_core/s_axi_aresetn +#ad_connect sys_cpu_resetn axi_hdmi_dma/axi_resetn -connect_bd_intf_net -intf_net axi_hdmi_interconnect_s00_axi [get_bd_intf_pins axi_hdmi_interconnect/S00_AXI] [get_bd_intf_pins axi_hdmi_dma/M_AXI_MM2S] -connect_bd_intf_net -intf_net axi_hdmi_interconnect_m00_axi [get_bd_intf_pins axi_hdmi_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP0] - -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M01_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M02_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M03_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_interconnect/ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_interconnect/S00_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_interconnect/M00_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_clkgen/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_clkgen/drp_clk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_core/s_axi_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_core/m_axis_mm2s_clk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_dma/s_axi_lite_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_dma/m_axi_mm2s_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_hdmi_dma/m_axis_mm2s_aclk] -connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/S_AXI_HP0_ACLK] - -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M01_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M02_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M03_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_hdmi_interconnect/ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_hdmi_interconnect/S00_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_hdmi_interconnect/M00_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_hdmi_clkgen/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_hdmi_core/s_axi_aresetn] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_hdmi_dma/axi_resetn] - -connect_bd_net -net axi_hdmi_tx_core_hdmi_clk [get_bd_pins axi_hdmi_core/hdmi_clk] [get_bd_pins axi_hdmi_clkgen/clk_0] -connect_bd_net -net axi_hdmi_tx_core_hdmi_out_clk [get_bd_pins axi_hdmi_core/hdmi_out_clk] [get_bd_ports hdmi_out_clk] -connect_bd_net -net axi_hdmi_tx_core_hdmi_hsync [get_bd_pins axi_hdmi_core/hdmi_24_hsync] [get_bd_ports hdmi_hsync] -connect_bd_net -net axi_hdmi_tx_core_hdmi_vsync [get_bd_pins axi_hdmi_core/hdmi_24_vsync] [get_bd_ports hdmi_vsync] -connect_bd_net -net axi_hdmi_tx_core_hdmi_data_e [get_bd_pins axi_hdmi_core/hdmi_24_data_e] [get_bd_ports hdmi_data_e] -connect_bd_net -net axi_hdmi_tx_core_hdmi_data [get_bd_pins axi_hdmi_core/hdmi_24_data] [get_bd_ports hdmi_data] -connect_bd_net -net axi_hdmi_tx_core_mm2s_tvalid [get_bd_pins axi_hdmi_core/m_axis_mm2s_tvalid] [get_bd_pins axi_hdmi_dma/m_axis_mm2s_tvalid] -connect_bd_net -net axi_hdmi_tx_core_mm2s_tdata [get_bd_pins axi_hdmi_core/m_axis_mm2s_tdata] [get_bd_pins axi_hdmi_dma/m_axis_mm2s_tdata] -connect_bd_net -net axi_hdmi_tx_core_mm2s_tkeep [get_bd_pins axi_hdmi_core/m_axis_mm2s_tkeep] [get_bd_pins axi_hdmi_dma/m_axis_mm2s_tkeep] -connect_bd_net -net axi_hdmi_tx_core_mm2s_tlast [get_bd_pins axi_hdmi_core/m_axis_mm2s_tlast] [get_bd_pins axi_hdmi_dma/m_axis_mm2s_tlast] -connect_bd_net -net axi_hdmi_tx_core_mm2s_tready [get_bd_pins axi_hdmi_core/m_axis_mm2s_tready] [get_bd_pins axi_hdmi_dma/m_axis_mm2s_tready] -connect_bd_net -net axi_hdmi_tx_core_mm2s_fsync [get_bd_pins axi_hdmi_core/m_axis_mm2s_fsync] [get_bd_pins axi_hdmi_dma/mm2s_fsync] -connect_bd_net -net axi_hdmi_tx_core_mm2s_fsync [get_bd_pins axi_hdmi_core/m_axis_mm2s_fsync_ret] +ad_connect sys_cpu_clk axi_hdmi_clkgen/drp_clk +ad_connect sys_cpu_clk axi_hdmi_core/m_axis_mm2s_clk +ad_connect sys_cpu_clk axi_hdmi_dma/m_axis_mm2s_aclk +ad_connect axi_hdmi_core/hdmi_clk axi_hdmi_clkgen/clk_0 +ad_connect axi_hdmi_core/hdmi_out_clk hdmi_out_clk +ad_connect axi_hdmi_core/hdmi_24_hsync hdmi_hsync +ad_connect axi_hdmi_core/hdmi_24_vsync hdmi_vsync +ad_connect axi_hdmi_core/hdmi_24_data_e hdmi_data_e +ad_connect axi_hdmi_core/hdmi_24_data hdmi_data +ad_connect axi_hdmi_core/m_axis_mm2s_tvalid axi_hdmi_dma/m_axis_mm2s_tvalid +ad_connect axi_hdmi_core/m_axis_mm2s_tdata axi_hdmi_dma/m_axis_mm2s_tdata +ad_connect axi_hdmi_core/m_axis_mm2s_tkeep axi_hdmi_dma/m_axis_mm2s_tkeep +ad_connect axi_hdmi_core/m_axis_mm2s_tlast axi_hdmi_dma/m_axis_mm2s_tlast +ad_connect axi_hdmi_core/m_axis_mm2s_tready axi_hdmi_dma/m_axis_mm2s_tready +ad_connect axi_hdmi_core/m_axis_mm2s_fsync axi_hdmi_dma/mm2s_fsync +ad_connect axi_hdmi_core/m_axis_mm2s_fsync axi_hdmi_core/m_axis_mm2s_fsync_ret # spdif audio -connect_bd_intf_net -intf_net axi_cpu_interconnect_m04_axi [get_bd_intf_pins axi_cpu_interconnect/M04_AXI] [get_bd_intf_pins axi_spdif_tx_core/s_axi] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M04_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_spdif_tx_core/S_AXI_ACLK] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M04_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_spdif_tx_core/S_AXI_ARESETN] +#ad_connect axi_cpu_interconnect/M04_AXI axi_spdif_tx_core/s_axi +#ad_connect sys_cpu_clk axi_cpu_interconnect/M04_ACLK +#ad_connect sys_cpu_clk axi_spdif_tx_core/S_AXI_ACLK +#ad_connect sys_cpu_resetn axi_cpu_interconnect/M04_ARESETN +#ad_connect sys_cpu_resetn axi_spdif_tx_core/S_AXI_ARESETN +ad_connect sys_cpu_clk axi_spdif_tx_core/DMA_REQ_ACLK +ad_connect sys_cpu_clk sys_ps7/DMA0_ACLK +ad_connect sys_cpu_resetn axi_spdif_tx_core/DMA_REQ_RSTN +ad_connect sys_ps7/DMA0_REQ axi_spdif_tx_core/DMA_REQ +ad_connect sys_ps7/DMA0_ACK axi_spdif_tx_core/DMA_ACK -connect_bd_net -net sys_100m_clk [get_bd_pins axi_spdif_tx_core/DMA_REQ_ACLK] -connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/DMA0_ACLK] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_spdif_tx_core/DMA_REQ_RSTN] -connect_bd_intf_net -intf_net axi_spdif_dma_req_tx [get_bd_intf_pins sys_ps7/DMA0_REQ] [get_bd_intf_pins axi_spdif_tx_core/DMA_REQ] -connect_bd_intf_net -intf_net axi_spdif_dma_ack_tx [get_bd_intf_pins sys_ps7/DMA0_ACK] [get_bd_intf_pins axi_spdif_tx_core/DMA_ACK] - -connect_bd_net -net sys_200m_clk [get_bd_pins sys_audio_clkgen/clk_in1] -connect_bd_net -net sys_100m_resetn [get_bd_pins sys_audio_clkgen/resetn] $sys_100m_resetn_source -connect_bd_net -net sys_audio_clkgen_clk [get_bd_pins sys_audio_clkgen/clk_out1] [get_bd_pins axi_spdif_tx_core/spdif_data_clk] -connect_bd_net -net spdif_s [get_bd_ports spdif] [get_bd_pins axi_spdif_tx_core/spdif_tx_o] +ad_connect sys_200m_clk sys_audio_clkgen/clk_in1 +ad_connect sys_cpu_resetn sys_audio_clkgen/resetn +ad_connect sys_audio_clkgen/clk_out1 axi_spdif_tx_core/spdif_data_clk +ad_connect spdif axi_spdif_tx_core/spdif_tx_o # match up interconnects -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M05_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M05_ARESETN] $sys_100m_resetn_source -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M06_ACLK] $sys_100m_clk_source -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M06_ARESETN] $sys_100m_resetn_source +#ad_connect sys_cpu_clk axi_cpu_interconnect/M05_ACLK +#ad_connect sys_cpu_resetn axi_cpu_interconnect/M05_ARESETN +#ad_connect sys_cpu_clk axi_cpu_interconnect/M06_ACLK +#ad_connect sys_cpu_resetn axi_cpu_interconnect/M06_ARESETN # interrupts -connect_bd_net [get_bd_pins sys_concat_intc/dout] [get_bd_pins sys_ps7/IRQ_F2P] -connect_bd_net [get_bd_pins sys_concat_intc/In15] [get_bd_pins axi_hdmi_dma/mm2s_introut] -connect_bd_net [get_bd_pins sys_concat_intc/In14] [get_bd_pins axi_iic_main/iic2intc_irpt] +ad_connect sys_concat_intc/dout sys_ps7/IRQ_F2P +ad_connect sys_concat_intc/In15 axi_hdmi_dma/mm2s_introut +ad_connect sys_concat_intc/In14 axi_iic_main/iic2intc_irpt for {set intc_index 0} {$intc_index < 14} {incr intc_index} { set ps_intr_${intc_index} [create_bd_port -dir I ps_intr_${intc_index}] - connect_bd_net [get_bd_pins sys_concat_intc/In${intc_index}] [get_bd_ports ps_intr_${intc_index}] + ad_connect sys_concat_intc/In${intc_index} ps_intr_${intc_index} } # address map -set sys_zynq 1 -set sys_mem_size 0x40000000 -set sys_addr_cntrl_space [get_bd_addr_spaces sys_ps7/Data] +#set sys_mem_size 0x40000000 -create_bd_addr_seg -range 0x00010000 -offset 0x41600000 $sys_addr_cntrl_space [get_bd_addr_segs axi_iic_main/s_axi/Reg] SEG_data_iic_main -create_bd_addr_seg -range 0x00010000 -offset 0x79000000 $sys_addr_cntrl_space [get_bd_addr_segs axi_hdmi_clkgen/s_axi/axi_lite] SEG_data_hdmi_clkgen -create_bd_addr_seg -range 0x00010000 -offset 0x43000000 $sys_addr_cntrl_space [get_bd_addr_segs axi_hdmi_dma/S_AXI_LITE/Reg] SEG_data_hdmi_dma -create_bd_addr_seg -range 0x00010000 -offset 0x70e00000 $sys_addr_cntrl_space [get_bd_addr_segs axi_hdmi_core/s_axi/axi_lite] SEG_data_hdmi_core -create_bd_addr_seg -range 0x00010000 -offset 0x75c00000 $sys_addr_cntrl_space [get_bd_addr_segs axi_spdif_tx_core/S_AXI/reg0] SEG_data_spdif_core +ad_cpu_interconnect 0x41600000 axi_iic_main +ad_cpu_interconnect 0x79000000 axi_hdmi_clkgen +ad_cpu_interconnect 0x43000000 axi_hdmi_dma +ad_cpu_interconnect 0x70e00000 axi_hdmi_core +ad_cpu_interconnect 0x75c00000 axi_spdif_tx_core +ad_mem_hp0_interconnect sys_cpu_clk sys_ps7/S_AXI_HP0 +ad_mem_hp0_interconnect sys_cpu_clk axi_hdmi_dma/M_AXI_MM2S -create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_hdmi_dma/Data_MM2S] [get_bd_addr_segs sys_ps7/S_AXI_HP0/HP0_DDR_LOWOCM] SEG_sys_ps7_hp0_ddr_lowocm +#create_bd_addr_seg -range 0x00010000 -offset 0x41600000 $sys_addr_cntrl_space [get_bd_addr_segs axi_iic_main/s_axi/Reg] SEG_data_iic_main +#create_bd_addr_seg -range 0x00010000 -offset 0x79000000 $sys_addr_cntrl_space [get_bd_addr_segs axi_hdmi_clkgen/s_axi/axi_lite] SEG_data_hdmi_clkgen +#create_bd_addr_seg -range 0x00010000 -offset 0x43000000 $sys_addr_cntrl_space [get_bd_addr_segs axi_hdmi_dma/S_AXI_LITE/Reg] SEG_data_hdmi_dma +#create_bd_addr_seg -range 0x00010000 -offset 0x70e00000 $sys_addr_cntrl_space [get_bd_addr_segs axi_hdmi_core/s_axi/axi_lite] SEG_data_hdmi_core +#create_bd_addr_seg -range 0x00010000 -offset 0x75c00000 $sys_addr_cntrl_space [get_bd_addr_segs axi_spdif_tx_core/S_AXI/reg0] SEG_data_spdif_core + +#create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_hdmi_dma/Data_MM2S] [get_bd_addr_segs sys_ps7/S_AXI_HP0/HP0_DDR_LOWOCM] SEG_sys_ps7_hp0_ddr_lowocm