From 90a5bb81b607d56ea586c79848ac234100ff001e Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Tue, 5 May 2015 23:34:52 +0300 Subject: [PATCH] cftl_cip: Updated project to work with the new util_pmod_adc core --- projects/cftl_cip/common/cftl_cip_bd.tcl | 5 ----- 1 file changed, 5 deletions(-) diff --git a/projects/cftl_cip/common/cftl_cip_bd.tcl b/projects/cftl_cip/common/cftl_cip_bd.tcl index 2d90caada..3d1ccba03 100644 --- a/projects/cftl_cip/common/cftl_cip_bd.tcl +++ b/projects/cftl_cip/common/cftl_cip_bd.tcl @@ -33,11 +33,6 @@ set pmod_gpio_core [create_bd_cell -type ip -vlnv analog.com:user:util_pmod_fmet # additional configurations set_property -dict [list CONFIG.PCW_USE_S_AXI_HP1 {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ $adc_spi_freq] $sys_ps7 - -ad_connect sys_ps7/FCLK_CLK2 pmod_spi_core/adc_spi_clk ad_connect sys_cpu_clk pmod_spi_dma/fifo_wr_clk ad_connect sys_cpu_clk pmod_spi_core/clk