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hdlmake- altera

main
Rejeesh Kutty 2016-10-10 12:55:55 -04:00
parent e5cf417576
commit 905e29eb01
7 changed files with 1 additions and 57 deletions
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7
projects/arradio/c5soc/Makefile
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@ -27,13 +27,6 @@ M_DEPS += ../../../library/altera/common/ad_lvds_clk.v
M_DEPS += ../../../library/altera/common/ad_lvds_in.v
M_DEPS += ../../../library/altera/common/ad_lvds_out.v
M_DEPS += ../../../library/altera/common/ad_mul.v
M_DEPS += ../../../library/altera_avalon_pio/altera_avalon_pio_hw.tcl
M_DEPS += ../../../library/altera_avalon_spi/altera_avalon_spi_hw.tcl
M_DEPS += ../../../library/altera_clock_bridge/altera_clock_bridge_hw.tcl
M_DEPS += ../../../library/altera_hps/altera_hps_hw.tcl
M_DEPS += ../../../library/altera_irq_bridge/altera_irq_bridge_hw.tcl
M_DEPS += ../../../library/altera_pll/altera_pll_hw.tcl
M_DEPS += ../../../library/altera_reset_bridge/altera_reset_bridge_hw.tcl
M_DEPS += ../../../library/axi_ad9361/axi_ad9361.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_cmos_if.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_hw.tcl

11
projects/daq2/a10gx/Makefile
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@ -21,17 +21,6 @@ M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../common/a10gx/a10gx_system_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
M_DEPS += ../../../library/altera/common/ad_mul.v
M_DEPS += ../../../library/altera_avalon_jtag_uart/altera_avalon_jtag_uart_hw.tcl
M_DEPS += ../../../library/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl
M_DEPS += ../../../library/altera_avalon_pio/altera_avalon_pio_hw.tcl
M_DEPS += ../../../library/altera_avalon_spi/altera_avalon_spi_hw.tcl
M_DEPS += ../../../library/altera_avalon_sysid_qsys/altera_avalon_sysid_qsys_hw.tcl
M_DEPS += ../../../library/altera_avalon_timer/altera_avalon_timer_hw.tcl
M_DEPS += ../../../library/altera_emif/altera_emif_hw.tcl
M_DEPS += ../../../library/altera_eth_tse/altera_eth_tse_hw.tcl
M_DEPS += ../../../library/altera_msgdma/altera_msgdma_hw.tcl
M_DEPS += ../../../library/altera_nios2_gen2/altera_nios2_gen2_hw.tcl
M_DEPS += ../../../library/altera_reset_bridge/altera_reset_bridge_hw.tcl
M_DEPS += ../../../library/axi_ad9144/axi_ad9144.v
M_DEPS += ../../../library/axi_ad9144/axi_ad9144_channel.v
M_DEPS += ../../../library/axi_ad9144/axi_ad9144_core.v

5
projects/daq3/a10gx/Makefile
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@ -31,6 +31,7 @@ M_DEPS += ../../../library/axi_ad9680/axi_ad9680_channel.v
M_DEPS += ../../../library/axi_ad9680/axi_ad9680_hw.tcl
M_DEPS += ../../../library/axi_ad9680/axi_ad9680_if.v
M_DEPS += ../../../library/axi_ad9680/axi_ad9680_pnmon.v
M_DEPS += ../../../library/axi_adxcvr/axi_adxcvr_hw.tcl
M_DEPS += ../../../library/axi_dmac/2d_transfer.v
M_DEPS += ../../../library/axi_dmac/address_generator.v
M_DEPS += ../../../library/axi_dmac/axi_dmac.v
@ -50,13 +51,10 @@ M_DEPS += ../../../library/axi_dmac/splitter.v
M_DEPS += ../../../library/axi_dmac/src_axi_mm.v
M_DEPS += ../../../library/axi_dmac/src_axi_stream.v
M_DEPS += ../../../library/axi_dmac/src_fifo_inf.v
M_DEPS += ../../../library/axi_jesd_xcvr/axi_jesd_xcvr.v
M_DEPS += ../../../library/axi_jesd_xcvr/axi_jesd_xcvr_hw.tcl
M_DEPS += ../../../library/common/ad_datafmt.v
M_DEPS += ../../../library/common/ad_dds.v
M_DEPS += ../../../library/common/ad_dds_1.v
M_DEPS += ../../../library/common/ad_dds_sine.v
M_DEPS += ../../../library/common/ad_jesd_align.v
M_DEPS += ../../../library/common/ad_pnmon.v
M_DEPS += ../../../library/common/ad_rst.v
M_DEPS += ../../../library/common/ad_xcvr_rx_if.v
@ -69,7 +67,6 @@ M_DEPS += ../../../library/common/up_clock_mon.v
M_DEPS += ../../../library/common/up_dac_channel.v
M_DEPS += ../../../library/common/up_dac_common.v
M_DEPS += ../../../library/common/up_delay_cntrl.v
M_DEPS += ../../../library/common/up_xcvr.v
M_DEPS += ../../../library/common/up_xfer_cntrl.v
M_DEPS += ../../../library/common/up_xfer_status.v
M_DEPS += ../../../library/util_adcfifo/../common/ad_axis_inf_rx.v

9
projects/fmcjesdadc1/a5gt/Makefile
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@ -20,15 +20,6 @@ M_DEPS += ../common/fmcjesdadc1_bd.qsys
M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../common/a5gt/a5gt_system_bd.qsys
M_DEPS += ../../common/a5gt/a5gt_system_assign.tcl
M_DEPS += ../../../library/altera_avalon_pio/altera_avalon_pio_hw.tcl
M_DEPS += ../../../library/altera_avalon_spi/altera_avalon_spi_hw.tcl
M_DEPS += ../../../library/altera_clock_bridge/altera_clock_bridge_hw.tcl
M_DEPS += ../../../library/altera_eth_tse/altera_eth_tse_hw.tcl
M_DEPS += ../../../library/altera_irq_bridge/altera_irq_bridge_hw.tcl
M_DEPS += ../../../library/altera_jesd204/altera_jesd204_hw.tcl
M_DEPS += ../../../library/altera_nios2_gen2/altera_nios2_gen2_hw.tcl
M_DEPS += ../../../library/altera_pll/altera_pll_hw.tcl
M_DEPS += ../../../library/altera_reset_bridge/altera_reset_bridge_hw.tcl
M_DEPS += ../../../library/axi_ad9250/axi_ad9250.v
M_DEPS += ../../../library/axi_ad9250/axi_ad9250_channel.v
M_DEPS += ../../../library/axi_ad9250/axi_ad9250_hw.tcl

7
projects/fmcjesdadc1/a5soc/Makefile
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@ -20,13 +20,6 @@ M_DEPS += ../common/fmcjesdadc1_bd.qsys
M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../common/a5soc/a5soc_system_bd.qsys
M_DEPS += ../../common/a5soc/a5soc_system_assign.tcl
M_DEPS += ../../../library/altera_avalon_pio/altera_avalon_pio_hw.tcl
M_DEPS += ../../../library/altera_clock_bridge/altera_clock_bridge_hw.tcl
M_DEPS += ../../../library/altera_hps/altera_hps_hw.tcl
M_DEPS += ../../../library/altera_irq_bridge/altera_irq_bridge_hw.tcl
M_DEPS += ../../../library/altera_jesd204/altera_jesd204_hw.tcl
M_DEPS += ../../../library/altera_pll/altera_pll_hw.tcl
M_DEPS += ../../../library/altera_reset_bridge/altera_reset_bridge_hw.tcl
M_DEPS += ../../../library/axi_ad9250/axi_ad9250.v
M_DEPS += ../../../library/axi_ad9250/axi_ad9250_channel.v
M_DEPS += ../../../library/axi_ad9250/axi_ad9250_hw.tcl

11
projects/fmcomms2/a10gx/Makefile
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@ -27,17 +27,6 @@ M_DEPS += ../../../library/altera/common/ad_lvds_clk.v
M_DEPS += ../../../library/altera/common/ad_lvds_in.v
M_DEPS += ../../../library/altera/common/ad_lvds_out.v
M_DEPS += ../../../library/altera/common/ad_mul.v
M_DEPS += ../../../library/altera_avalon_jtag_uart/altera_avalon_jtag_uart_hw.tcl
M_DEPS += ../../../library/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl
M_DEPS += ../../../library/altera_avalon_pio/altera_avalon_pio_hw.tcl
M_DEPS += ../../../library/altera_avalon_spi/altera_avalon_spi_hw.tcl
M_DEPS += ../../../library/altera_avalon_sysid_qsys/altera_avalon_sysid_qsys_hw.tcl
M_DEPS += ../../../library/altera_avalon_timer/altera_avalon_timer_hw.tcl
M_DEPS += ../../../library/altera_emif/altera_emif_hw.tcl
M_DEPS += ../../../library/altera_eth_tse/altera_eth_tse_hw.tcl
M_DEPS += ../../../library/altera_msgdma/altera_msgdma_hw.tcl
M_DEPS += ../../../library/altera_nios2_gen2/altera_nios2_gen2_hw.tcl
M_DEPS += ../../../library/altera_reset_bridge/altera_reset_bridge_hw.tcl
M_DEPS += ../../../library/axi_ad9361/axi_ad9361.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_cmos_if.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_hw.tcl

8
projects/usdrx1/a5gt/Makefile
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@ -18,14 +18,6 @@ M_DEPS += ../../common/a5gt/a5gt_system_bd.qsys
M_DEPS += ../../common/a5gt/a5gt_system_assign.tcl
M_DEPS += ../../../library/common/altera/ad_xcvr_rx_rst.v
M_DEPS += ../../../library/common/altera/ad_jesd_align.v
M_DEPS += ../../../library/altera_avalon_pio/altera_avalon_pio_hw.tcl
M_DEPS += ../../../library/altera_avalon_spi/altera_avalon_spi_hw.tcl
M_DEPS += ../../../library/altera_clock_bridge/altera_clock_bridge_hw.tcl
M_DEPS += ../../../library/altera_eth_tse/altera_eth_tse_hw.tcl
M_DEPS += ../../../library/altera_irq_bridge/altera_irq_bridge_hw.tcl
M_DEPS += ../../../library/altera_nios2_gen2/altera_nios2_gen2_hw.tcl
M_DEPS += ../../../library/altera_pll/altera_pll_hw.tcl
M_DEPS += ../../../library/altera_reset_bridge/altera_reset_bridge_hw.tcl
M_ALTERA := quartus_sh --64bit -t