transceiver split up outside qsys
parent
e40aac9ab6
commit
8c0d74aa90
File diff suppressed because it is too large
Load Diff
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@ -8,6 +8,14 @@ source $ad_hdl_dir/projects/common/a10gx/a10gx_system_assign.tcl
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set_global_assignment -name VERILOG_FILE $ad_hdl_dir/library/common/ad_iobuf.v
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set_global_assignment -name VERILOG_FILE ../common/daq2_spi.v
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set_global_assignment -name VERILOG_FILE ../common/sys_xcvr.v
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set_global_assignment -name QSYS_FILE ../common/sys_xcvr_tx_lane_pll.qsys
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set_global_assignment -name QSYS_FILE ../common/sys_xcvr_core.qsys
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set_global_assignment -name QSYS_FILE ../common/sys_xcvr_rstcntrl.qsys
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set_global_assignment -name QSYS_FILE ../common/sys_xcvr_rx_pll.qsys
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set_global_assignment -name QSYS_FILE ../common/sys_xcvr_tx_pll.qsys
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set_global_assignment -name QSYS_FILE ../common/sys_xcvr_rx_ip.qsys
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set_global_assignment -name QSYS_FILE ../common/sys_xcvr_tx_ip.qsys
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# lane interface
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@ -239,10 +239,13 @@ module system_top (
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.dio_p (gpio_bd));
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system_bd i_system_bd (
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.rx_data_rx_serial_data (rx_data),
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.rx_data_rx_d (rx_data),
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.rx_ref_clk_clk (rx_ref_clk),
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.rx_sync_rx_sync (rx_sync),
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.rx_sysref_rx_ext_sysref (rx_sysref),
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.stp_clk_clk (),
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.stp_data_stp_data (),
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.stp_trigger_stp_trigger (),
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.sys_clk_clk (sys_clk),
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.sys_ddr3_cntrl_mem_mem_ck (ddr3_clk_p),
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.sys_ddr3_cntrl_mem_mem_ck_n (ddr3_clk_n),
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@ -277,7 +280,7 @@ module system_top (
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.sys_spi_MOSI (spi_mosi_s),
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.sys_spi_SCLK (spi_clk),
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.sys_spi_SS_n (spi_csn_s),
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.tx_data_tx_serial_data (tx_data),
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.tx_data_tx_d (tx_data),
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.tx_ref_clk_clk (tx_ref_clk),
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.tx_sync_tx_sync (tx_sync),
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.tx_sysref_tx_ext_sysref (tx_sysref));
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