diff --git a/library/axi_dmac/axi_dmac.v b/library/axi_dmac/axi_dmac.v
index 5d2bdad8f..64199a56b 100644
--- a/library/axi_dmac/axi_dmac.v
+++ b/library/axi_dmac/axi_dmac.v
@@ -125,6 +125,7 @@ module axi_dmac (
 	input  [C_DMA_DATA_WIDTH_SRC-1:0]        fifo_wr_din,
 	output                                   fifo_wr_overflow,
 	input                                    fifo_wr_sync,
+	output                                   fifo_wr_xfer_req,
 
 	// Input FIFO interface
 	input                                    fifo_rd_clk,
@@ -546,6 +547,7 @@ dmac_request_arb #(
 	.fifo_wr_din(fifo_wr_din),
 	.fifo_wr_overflow(fifo_wr_overflow),
 	.fifo_wr_sync(fifo_wr_sync),
+	.fifo_wr_xfer_req(fifo_wr_xfer_req),
 
 	
 	.fifo_rd_clk(fifo_rd_clk),
diff --git a/library/axi_dmac/data_mover.v b/library/axi_dmac/data_mover.v
index ed7b11b61..bf87afe88 100644
--- a/library/axi_dmac/data_mover.v
+++ b/library/axi_dmac/data_mover.v
@@ -48,6 +48,8 @@ module dmac_data_mover (
 	input enable,
 	output reg enabled,
 
+	output xfer_req,
+
 	output s_axi_ready,
 	input s_axi_valid,
 	input [C_DATA_WIDTH-1:0] s_axi_data,
@@ -83,6 +85,8 @@ reg last_non_eot = 1'b0;
 wire last_load;
 wire last;
 
+assign xfer_req = active;
+
 assign response_id = id;
 
 assign last = eot ? last_eot : last_non_eot;
diff --git a/library/axi_dmac/request_arb.v b/library/axi_dmac/request_arb.v
index e4313b938..ee7c9518d 100644
--- a/library/axi_dmac/request_arb.v
+++ b/library/axi_dmac/request_arb.v
@@ -115,6 +115,7 @@ module dmac_request_arb (
 	input  [C_DMA_DATA_WIDTH_SRC-1:0]   fifo_wr_din,
 	output                              fifo_wr_overflow,
 	input                               fifo_wr_sync,
+	output                              fifo_wr_xfer_req,
 
 	// Input FIFO interface
 	input                               fifo_rd_clk,
@@ -742,7 +743,8 @@ dmac_src_fifo_inf #(
 	.en(fifo_wr_en),
 	.din(fifo_wr_din),
 	.overflow(fifo_wr_overflow),
-	.sync(fifo_wr_sync)
+	.sync(fifo_wr_sync),
+	.xfer_req(fifo_wr_xfer_req)
 );
 
 end else begin
diff --git a/library/axi_dmac/src_fifo_inf.v b/library/axi_dmac/src_fifo_inf.v
index 4663c4bd1..e72618004 100644
--- a/library/axi_dmac/src_fifo_inf.v
+++ b/library/axi_dmac/src_fifo_inf.v
@@ -53,6 +53,7 @@ module dmac_src_fifo_inf (
 	input [C_DATA_WIDTH-1:0] din,
 	output reg overflow,
 	input sync,
+	output xfer_req,
 
 	input fifo_ready,
 	output fifo_valid,
@@ -134,6 +135,8 @@ dmac_data_mover # (
 	.enabled(enabled),
 	.sync_id(sync_id),
 
+	.xfer_req(xfer_req),
+
 	.request_id(request_id),
 	.response_id(response_id),
 	.eot(eot),