fmcomms1: KC705 project updated to the latest framework

main
Adrian Costina 2015-03-30 18:09:17 +03:00
parent 11379939d0
commit 89b83f8a00
4 changed files with 46 additions and 63 deletions

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@ -1,4 +1,5 @@
source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl
source ../common/fmcomms1_bd.tcl

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@ -86,5 +86,3 @@ create_clock -name dac_clk_in -period 2.00 [get_ports dac_clk_in_p]
create_clock -name adc_clk_in -period 4.00 [get_ports adc_clk_in_p]
create_clock -name dac_div_clk -period 8.00 [get_pins i_system_wrapper/system_i/axi_ad9122/dac_div_clk]
set_false_path -from [get_pins i_system_wrapper/system_i/axi_ad9643_dma/inst/i_request_arb/i_src_dma_fifo/overflow_reg/C] \
-to [get_pins i_system_wrapper/system_i/sys_wfifo/wfifo_ctl/inst/m_wovf_m1_reg/D]

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@ -1,13 +1,13 @@
source ../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_create fmcomms1_kc705
adi_project_files fmcomms1_kc705 [list \
"system_top.v" \
"system_constr.xdc"\
"$ad_hdl_dir/library/common/ad_iobuf.v" \
"$ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc" ]
set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc]

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@ -89,8 +89,7 @@ module system_top (
fan_pwm,
gpio_lcd,
gpio_led,
gpio_sw,
gpio_bd,
iic_rstn,
iic_scl,
@ -113,15 +112,7 @@ module system_top (
adc_data_in_n,
ref_clk_out_p,
ref_clk_out_n,
hdmi_out_clk,
hdmi_hsync,
hdmi_vsync,
hdmi_data_e,
hdmi_data,
spdif);
ref_clk_out_n);
input sys_rst;
input sys_clk_p;
@ -171,8 +162,7 @@ module system_top (
output fan_pwm;
inout [ 6:0] gpio_lcd;
inout [ 7:0] gpio_led;
inout [ 8:0] gpio_sw;
inout [16:0] gpio_bd;
output iic_rstn;
inout iic_scl;
@ -197,14 +187,6 @@ module system_top (
output ref_clk_out_p;
output ref_clk_out_n;
output hdmi_out_clk;
output hdmi_hsync;
output hdmi_vsync;
output hdmi_data_e;
output [15:0] hdmi_data;
output spdif;
// internal registers
reg [63:0] dac_ddata_0 = 'd0;
@ -216,6 +198,13 @@ module system_top (
// internal signals
wire [63:0] gpio_i;
wire [63:0] gpio_o;
wire [63:0] gpio_t;
wire [ 7:0] spi_csn;
wire spi_clk;
wire spi_mosi;
wire spi_miso;
wire dac_clk;
wire dac_valid_0;
wire dac_enable_0;
@ -231,7 +220,13 @@ module system_top (
wire [15:0] adc_data_1;
wire ref_clk;
wire oddr_ref_clk;
wire [31:0] mb_intrs;
// default logic
assign ddr3_1_p = 2'b11;
assign ddr3_1_n = 3'b000;
assign fan_pwm = 1'b1;
assign iic_rstn = 1'b1;
// instantiations
@ -283,9 +278,13 @@ module system_top (
endcase
end
ad_iobuf #(.DATA_WIDTH(17)) i_iobuf_bd (
.dt (gpio_t[16:0]),
.di (gpio_o[16:0]),
.do (gpio_i[16:0]),
.dio (gpio_bd));
system_wrapper i_system_wrapper (
.ddr3_1_n (ddr3_1_n),
.ddr3_1_p (ddr3_1_p),
.ddr3_addr (ddr3_addr),
.ddr3_ba (ddr3_ba),
.ddr3_cas_n (ddr3_cas_n),
@ -301,10 +300,13 @@ module system_top (
.ddr3_ras_n (ddr3_ras_n),
.ddr3_reset_n (ddr3_reset_n),
.ddr3_we_n (ddr3_we_n),
.fan_pwm (fan_pwm),
.gpio0_i (gpio_i[31:0]),
.gpio0_o (gpio_o[31:0]),
.gpio0_t (gpio_t[31:0]),
.gpio1_i (gpio_i[63:32]),
.gpio1_o (gpio_o[63:32]),
.gpio1_t (gpio_t[63:32]),
.gpio_lcd_tri_io (gpio_lcd),
.gpio_led_tri_io (gpio_led),
.gpio_sw_tri_io (gpio_sw),
.adc_clk (adc_clk),
.adc_clk_in_n (adc_clk_in_n),
.adc_clk_in_p (adc_clk_in_p),
@ -312,7 +314,6 @@ module system_top (
.adc_data_1 (adc_data_1),
.adc_data_in_n (adc_data_in_n),
.adc_data_in_p (adc_data_in_p),
.adc_dma_sync (1'b1),
.adc_dma_wdata (adc_dma_wdata),
.adc_dma_wr (adc_dma_wr),
.adc_enable_0 (adc_enable_0),
@ -339,38 +340,15 @@ module system_top (
.dac_valid_0 (dac_valid_0),
.dac_valid_1 (dac_valid_1),
.ref_clk (ref_clk),
.hdmi_data (hdmi_data),
.hdmi_data_e (hdmi_data_e),
.hdmi_hsync (hdmi_hsync),
.hdmi_out_clk (hdmi_out_clk),
.hdmi_vsync (hdmi_vsync),
.iic_main_scl_io (iic_scl),
.iic_main_sda_io (iic_sda),
.iic_rstn (iic_rstn),
.mb_intr_10 (mb_intrs[10]),
.mb_intr_11 (mb_intrs[11]),
.mb_intr_12 (mb_intrs[12]),
.mb_intr_13 (mb_intrs[13]),
.mb_intr_14 (mb_intrs[14]),
.mb_intr_15 (mb_intrs[15]),
.mb_intr_16 (mb_intrs[16]),
.mb_intr_17 (mb_intrs[17]),
.mb_intr_18 (mb_intrs[18]),
.mb_intr_19 (mb_intrs[19]),
.mb_intr_20 (mb_intrs[20]),
.mb_intr_21 (mb_intrs[21]),
.mb_intr_22 (mb_intrs[22]),
.mb_intr_23 (mb_intrs[23]),
.mb_intr_24 (mb_intrs[24]),
.mb_intr_25 (mb_intrs[25]),
.mb_intr_26 (mb_intrs[26]),
.mb_intr_27 (mb_intrs[27]),
.mb_intr_28 (mb_intrs[28]),
.mb_intr_29 (mb_intrs[29]),
.mb_intr_30 (mb_intrs[30]),
.mb_intr_31 (mb_intrs[31]),
.ad9122_dma_irq (mb_intrs[12]),
.ad9643_dma_irq (mb_intrs[13]),
.mb_intr_02 (1'd0),
.mb_intr_03 (1'd0),
.mb_intr_06 (1'd0),
.mb_intr_07 (1'd0),
.mb_intr_08 (1'd0),
.mb_intr_14 (1'd0),
.mb_intr_15 (1'd0),
.mdio_mdc (mdio_mdc),
.mdio_mdio_io (mdio_mdio_io),
.mii_col (mii_col),
@ -389,7 +367,13 @@ module system_top (
.linear_flash_dq_io (linear_flash_dq_io),
.linear_flash_oen (linear_flash_oen),
.linear_flash_wen (linear_flash_wen),
.spdif (spdif),
.spi_clk_i (spi_clk),
.spi_clk_o (spi_clk),
.spi_csn_i (spi_csn),
.spi_csn_o (spi_csn),
.spi_sdi_i (spi_miso),
.spi_sdo_i (spi_mosi),
.spi_sdo_o (spi_mosi),
.sys_clk_n (sys_clk_n),
.sys_clk_p (sys_clk_p),
.sys_rst (sys_rst),