diff --git a/projects/common/a5soc/a5soc_system_bd.qsys b/projects/common/a5soc/a5soc_system_bd.qsys
index 3013f7056..68d81e091 100644
--- a/projects/common/a5soc/a5soc_system_bd.qsys
+++ b/projects/common/a5soc/a5soc_system_bd.qsys
@@ -9,14 +9,6 @@
    categories="System" />
  <parameter name="bonusData"><![CDATA[bonusData 
 {
-   element $${FILENAME}
-   {
-      datum _originalDeviceFamily
-      {
-         value = "Arria V";
-         type = "String";
-      }
-   }
    element sys_clk
    {
       datum _sortIndex
@@ -164,7 +156,7 @@
  <parameter name="hideFromIPCatalog" value="false" />
  <parameter name="lockedInterfaceDefinition" value="" />
  <parameter name="maxAdditionalLatency" value="2" />
- <parameter name="projectName">fmcjesdadc1_a5soc.qpf</parameter>
+ <parameter name="projectName" value="" />
  <parameter name="sopcBorderPoints" value="false" />
  <parameter name="systemHash" value="0" />
  <parameter name="testBenchDutName" value="" />
@@ -247,7 +239,7 @@
    internal="sys_rst_out.out_reset"
    type="reset"
    dir="start" />
- <module name="sys_clk" kind="altera_clock_bridge" version="15.0" enabled="1">
+ <module name="sys_clk" kind="altera_clock_bridge" version="15.1" enabled="1">
   <parameter name="DERIVED_CLOCK_RATE" value="100000000" />
   <parameter name="EXPLICIT_CLOCK_RATE" value="50000000" />
   <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
@@ -255,7 +247,7 @@
  <module
    name="sys_cpu_interconnect"
    kind="altera_avalon_mm_bridge"
-   version="15.0"
+   version="15.1"
    enabled="1">
   <parameter name="ADDRESS_UNITS" value="SYMBOLS" />
   <parameter name="ADDRESS_WIDTH" value="20" />
@@ -272,7 +264,7 @@
   <parameter name="USE_AUTO_ADDRESS_WIDTH" value="0" />
   <parameter name="USE_RESPONSE" value="0" />
  </module>
- <module name="sys_gpio" kind="altera_avalon_pio" version="15.0" enabled="1">
+ <module name="sys_gpio" kind="altera_avalon_pio" version="15.1" enabled="1">
   <parameter name="bitClearingEdgeCapReg" value="true" />
   <parameter name="bitModifyingOutReg" value="false" />
   <parameter name="captureEdge" value="true" />
@@ -289,7 +281,7 @@
  <module
    name="sys_gpio_bd"
    kind="altera_avalon_pio"
-   version="15.0"
+   version="15.1"
    enabled="1">
   <parameter name="bitClearingEdgeCapReg" value="false" />
   <parameter name="bitModifyingOutReg" value="false" />
@@ -304,7 +296,7 @@
   <parameter name="simDrivenValue" value="0" />
   <parameter name="width" value="32" />
  </module>
- <module name="sys_hps" kind="altera_hps" version="15.0" enabled="1">
+ <module name="sys_hps" kind="altera_hps" version="15.1" enabled="1">
   <parameter name="ABSTRACT_REAL_COMPARE_TEST" value="false" />
   <parameter name="ABS_RAM_MEM_INIT_FILENAME" value="meminit" />
   <parameter name="ACV_PHY_CLK_ADD_FR_PHASE" value="0.0" />
@@ -652,6 +644,7 @@
   <parameter name="S2FCLK_USER0CLK_Enable" value="true" />
   <parameter name="S2FCLK_USER1CLK_Enable" value="false" />
   <parameter name="S2FCLK_USER1CLK_FREQ" value="150.0" />
+  <parameter name="S2FCLK_USER2CLK" value="4" />
   <parameter name="S2FCLK_USER2CLK_Enable" value="false" />
   <parameter name="S2FCLK_USER2CLK_FREQ" value="100.0" />
   <parameter name="S2FINTERRUPT_CAN_Enable" value="false" />
@@ -808,6 +801,7 @@
   <parameter name="periph_pll_n" value="1" />
   <parameter name="periph_pll_source" value="0" />
   <parameter name="qspi_clk_source" value="1" />
+  <parameter name="quartus_ini_hps_emif_pll" value="false" />
   <parameter
      name="quartus_ini_hps_ip_enable_all_peripheral_fpga_interfaces"
      value="false" />
@@ -833,7 +827,7 @@
  <module
    name="sys_id"
    kind="altera_avalon_sysid_qsys"
-   version="15.0"
+   version="15.1"
    enabled="1">
   <parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
   <parameter name="id" value="-1395322095" />
@@ -841,7 +835,7 @@
  <module
    name="sys_int_mem"
    kind="altera_avalon_onchip_memory2"
-   version="15.0"
+   version="15.1"
    enabled="1">
   <parameter name="allowInSystemMemoryContentEditor" value="false" />
   <parameter name="autoInitializationFileName">$${FILENAME}_sys_int_mem</parameter>
@@ -849,7 +843,7 @@
   <parameter name="copyInitFile" value="false" />
   <parameter name="dataWidth" value="64" />
   <parameter name="deviceFamily" value="Arria V" />
-  <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
+  <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
   <parameter name="dualPort" value="false" />
   <parameter name="ecc_enabled" value="false" />
   <parameter name="initMemContent" value="true" />
@@ -867,14 +861,14 @@
   <parameter name="useShallowMemBlocks" value="false" />
   <parameter name="writable" value="true" />
  </module>
- <module name="sys_intr" kind="altera_irq_bridge" version="15.0" enabled="1">
+ <module name="sys_intr" kind="altera_irq_bridge" version="15.1" enabled="1">
   <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
   <parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
   <parameter name="AUTO_RECEIVER_IRQ_INTERRUPTS_USED" value="0" />
   <parameter name="IRQ_N" value="0" />
   <parameter name="IRQ_WIDTH" value="8" />
  </module>
- <module name="sys_rst" kind="altera_reset_bridge" version="15.0" enabled="1">
+ <module name="sys_rst" kind="altera_reset_bridge" version="15.1" enabled="1">
   <parameter name="ACTIVE_LOW_RESET" value="0" />
   <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
   <parameter name="NUM_RESET_OUTPUTS" value="1" />
@@ -884,7 +878,7 @@
  <module
    name="sys_rst_out"
    kind="altera_reset_bridge"
-   version="15.0"
+   version="15.1"
    enabled="1">
   <parameter name="ACTIVE_LOW_RESET" value="0" />
   <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
@@ -894,7 +888,7 @@
  </module>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_axi_master"
    end="sys_int_mem.s1">
   <parameter name="arbitrationPriority" value="1" />
@@ -903,7 +897,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_lw_axi_master"
    end="sys_id.control_slave">
   <parameter name="arbitrationPriority" value="1" />
@@ -912,7 +906,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_lw_axi_master"
    end="sys_cpu_interconnect.s0">
   <parameter name="arbitrationPriority" value="1" />
@@ -921,7 +915,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_lw_axi_master"
    end="sys_gpio.s1">
   <parameter name="arbitrationPriority" value="1" />
@@ -930,7 +924,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_lw_axi_master"
    end="sys_gpio_bd.s1">
   <parameter name="arbitrationPriority" value="1" />
@@ -939,172 +933,172 @@
  </connection>
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_rst.clk" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_id.clk" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_gpio.clk" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_gpio_bd.clk" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_rst_out.clk" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_cpu_interconnect.clk" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_intr.clk" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_int_mem.clk1" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_hps.f2h_axi_clock" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_hps.h2f_axi_clock" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_hps.h2f_lw_axi_clock" />
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_user0_clock"
    end="sys_clk.in_clk" />
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_gpio.irq">
   <parameter name="irqNumber" value="1" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_gpio_bd.irq">
   <parameter name="irqNumber" value="0" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender0_irq">
   <parameter name="irqNumber" value="2" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender1_irq">
   <parameter name="irqNumber" value="3" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender2_irq">
   <parameter name="irqNumber" value="4" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender3_irq">
   <parameter name="irqNumber" value="5" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender4_irq">
   <parameter name="irqNumber" value="6" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender5_irq">
   <parameter name="irqNumber" value="7" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender6_irq">
   <parameter name="irqNumber" value="8" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="sys_hps.f2h_irq0"
    end="sys_intr.sender7_irq">
   <parameter name="irqNumber" value="9" />
  </connection>
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_reset"
    end="sys_rst.in_reset" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_hps.h2f_reset"
    end="sys_rst_out.in_reset" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_rst.out_reset"
    end="sys_intr.clk_reset" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_rst.out_reset"
    end="sys_gpio_bd.reset" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_rst.out_reset"
    end="sys_gpio.reset" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_rst.out_reset"
    end="sys_id.reset" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_rst.out_reset"
    end="sys_cpu_interconnect.reset" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="sys_rst.out_reset"
    end="sys_int_mem.reset1" />
  <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="FIFO" />
diff --git a/projects/fmcjesdadc1/a5soc/system_bd.qsys b/projects/fmcjesdadc1/a5soc/system_bd.qsys
index 67c2527a4..af46dfc16 100644
--- a/projects/fmcjesdadc1/a5soc/system_bd.qsys
+++ b/projects/fmcjesdadc1/a5soc/system_bd.qsys
@@ -9,14 +9,6 @@
    categories="System" />
  <parameter name="bonusData"><![CDATA[bonusData 
 {
-   element $${FILENAME}
-   {
-      datum _originalDeviceFamily
-      {
-         value = "Arria V";
-         type = "String";
-      }
-   }
    element a5soc_base
    {
       datum _sortIndex
@@ -195,6 +187,9 @@
   <parameter name="AUTO_AXI_DMAC_0_M_AXI_ADDRESS_WIDTH" value="AddressWidth = 32" />
   <parameter name="AUTO_AXI_DMAC_1_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a5soc_base_sys_hps_axi_sdram.axi_slave0' start='0x0' end='0x80000000' /><slave name='a5soc_base_sys_hps_gmac0.axi_slave0' start='0xFF700000' end='0xFF702000' /><slave name='a5soc_base_sys_hps_gmac1.axi_slave0' start='0xFF702000' end='0xFF704000' /><slave name='a5soc_base_sys_hps_sdmmc.axi_slave0' start='0xFF704000' end='0xFF705000' /><slave name='a5soc_base_sys_hps_qspi.axi_slave0' start='0xFF705000' end='0xFF705100' /><slave name='a5soc_base_sys_hps_fpgamgr.axi_slave0' start='0xFF706000' end='0xFF707000' /><slave name='a5soc_base_sys_hps_gpio0.axi_slave0' start='0xFF708000' end='0xFF708100' /><slave name='a5soc_base_sys_hps_gpio1.axi_slave0' start='0xFF709000' end='0xFF709100' /><slave name='a5soc_base_sys_hps_gpio2.axi_slave0' start='0xFF70A000' end='0xFF70A100' /><slave name='a5soc_base_sys_hps_l3regs.axi_slave0' start='0xFF800000' end='0xFF801000' /><slave name='a5soc_base_sys_hps_nand0.axi_slave0' start='0xFF900000' end='0xFF910000' /><slave name='a5soc_base_sys_hps_qspi.axi_slave1' start='0xFFA00000' end='0xFFA00100' /><slave name='a5soc_base_sys_hps_usb0.axi_slave0' start='0xFFB00000' end='0xFFB40000' /><slave name='a5soc_base_sys_hps_usb1.axi_slave0' start='0xFFB40000' end='0xFFB80000' /><slave name='a5soc_base_sys_hps_nand0.axi_slave1' start='0xFFB80000' end='0xFFB90000' /><slave name='a5soc_base_sys_hps_fpgamgr.axi_slave1' start='0xFFB90000' end='0xFFB90100' /><slave name='a5soc_base_sys_hps_dcan0.axi_slave0' start='0xFFC00000' end='0xFFC01000' /><slave name='a5soc_base_sys_hps_dcan1.axi_slave0' start='0xFFC01000' end='0xFFC02000' /><slave name='a5soc_base_sys_hps_uart0.axi_slave0' start='0xFFC02000' end='0xFFC02100' /><slave name='a5soc_base_sys_hps_uart1.axi_slave0' start='0xFFC03000' end='0xFFC03100' /><slave name='a5soc_base_sys_hps_i2c0.axi_slave0' start='0xFFC04000' end='0xFFC04100' /><slave name='a5soc_base_sys_hps_i2c1.axi_slave0' start='0xFFC05000' end='0xFFC05100' /><slave name='a5soc_base_sys_hps_i2c2.axi_slave0' start='0xFFC06000' end='0xFFC06100' /><slave name='a5soc_base_sys_hps_i2c3.axi_slave0' start='0xFFC07000' end='0xFFC07100' /><slave name='a5soc_base_sys_hps_timer0.axi_slave0' start='0xFFC08000' end='0xFFC08100' /><slave name='a5soc_base_sys_hps_timer1.axi_slave0' start='0xFFC09000' end='0xFFC09100' /><slave name='a5soc_base_sys_hps_sdrctl.axi_slave0' start='0xFFC25000' end='0xFFC26000' /><slave name='a5soc_base_sys_hps_timer2.axi_slave0' start='0xFFD00000' end='0xFFD00100' /><slave name='a5soc_base_sys_hps_timer3.axi_slave0' start='0xFFD01000' end='0xFFD01100' /><slave name='a5soc_base_sys_hps_clkmgr.axi_slave0' start='0xFFD04000' end='0xFFD05000' /><slave name='a5soc_base_sys_hps_rstmgr.axi_slave0' start='0xFFD05000' end='0xFFD05100' /><slave name='a5soc_base_sys_hps_sysmgr.axi_slave0' start='0xFFD08000' end='0xFFD08400' /><slave name='a5soc_base_sys_hps_dma.axi_slave0' start='0xFFE01000' end='0xFFE02000' /><slave name='a5soc_base_sys_hps_spim0.axi_slave0' start='0xFFF00000' end='0xFFF00100' /><slave name='a5soc_base_sys_hps_spim1.axi_slave0' start='0xFFF01000' end='0xFFF01100' /><slave name='a5soc_base_sys_hps_arm_gic_0.axi_slave1' start='0xFFFEC100' end='0xFFFEC200' /><slave name='a5soc_base_sys_hps_timer.axi_slave0' start='0xFFFEC600' end='0xFFFEC700' /><slave name='a5soc_base_sys_hps_arm_gic_0.axi_slave0' start='0xFFFED000' end='0xFFFEE000' /><slave name='a5soc_base_sys_hps_L2.axi_slave0' start='0xFFFEF000' end='0xFFFF0000' /><slave name='a5soc_base_sys_hps_axi_ocram.axi_slave0' start='0xFFFF0000' end='0x100000000' /></address-map>]]></parameter>
   <parameter name="AUTO_AXI_DMAC_1_M_AXI_ADDRESS_WIDTH" value="AddressWidth = 32" />
+  <parameter name="AUTO_CPU_CLK_CLOCK_DOMAIN" value="5" />
+  <parameter name="AUTO_CPU_CLK_CLOCK_RATE" value="50000000" />
+  <parameter name="AUTO_CPU_CLK_RESET_DOMAIN" value="5" />
   <parameter name="AUTO_DEVICE" value="5ASTFD5K3F40I3ES" />
   <parameter name="AUTO_DEVICE_FAMILY" value="Arria V" />
   <parameter name="AUTO_DEVICE_SPEEDGRADE" value="3_H3" />
@@ -205,14 +200,11 @@
   <parameter name="AUTO_RX_REF_CLK_CLOCK_DOMAIN" value="4" />
   <parameter name="AUTO_RX_REF_CLK_CLOCK_RATE" value="0" />
   <parameter name="AUTO_RX_REF_CLK_RESET_DOMAIN" value="4" />
-  <parameter name="AUTO_SYS_CLK_CLOCK_DOMAIN" value="5" />
-  <parameter name="AUTO_SYS_CLK_CLOCK_RATE" value="50000000" />
-  <parameter name="AUTO_SYS_CLK_RESET_DOMAIN" value="5" />
   <parameter name="AUTO_UNIQUE_ID">$${FILENAME}_fmcjesdadc1</parameter>
  </module>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="fmcjesdadc1.axi_dmac_0_m_axi"
    end="a5soc_base.sys_hps_s_axi">
   <parameter name="arbitrationPriority" value="1" />
@@ -221,7 +213,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="fmcjesdadc1.axi_dmac_1_m_axi"
    end="a5soc_base.sys_hps_s_axi">
   <parameter name="arbitrationPriority" value="1" />
@@ -230,7 +222,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_cpu_interconnect_m0"
    end="fmcjesdadc1.axi_ad9250_0_s_axi">
   <parameter name="arbitrationPriority" value="1" />
@@ -239,7 +231,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_cpu_interconnect_m0"
    end="fmcjesdadc1.axi_ad9250_1_s_axi">
   <parameter name="arbitrationPriority" value="1" />
@@ -248,7 +240,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_cpu_interconnect_m0"
    end="fmcjesdadc1.axi_dmac_0_s_axi">
   <parameter name="arbitrationPriority" value="1" />
@@ -257,7 +249,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_cpu_interconnect_m0"
    end="fmcjesdadc1.axi_dmac_1_s_axi">
   <parameter name="arbitrationPriority" value="1" />
@@ -266,7 +258,7 @@
  </connection>
  <connection
    kind="avalon"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_cpu_interconnect_m0"
    end="fmcjesdadc1.axi_jesd_xcvr_s_axi">
   <parameter name="arbitrationPriority" value="1" />
@@ -275,38 +267,38 @@
  </connection>
  <connection
    kind="clock"
-   version="15.0"
+   version="15.1"
+   start="a5soc_base.sys_clk"
+   end="fmcjesdadc1.cpu_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
    start="a5soc_base.sys_clk"
    end="fmcjesdadc1.mem_clk" />
- <connection
-   kind="clock"
-   version="15.0"
-   start="a5soc_base.sys_clk"
-   end="fmcjesdadc1.sys_clk" />
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_intr"
    end="fmcjesdadc1.axi_dmac_0_intr">
   <parameter name="irqNumber" value="0" />
  </connection>
  <connection
    kind="interrupt"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_intr"
    end="fmcjesdadc1.axi_dmac_1_intr">
   <parameter name="irqNumber" value="1" />
  </connection>
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_rst"
-   end="fmcjesdadc1.mem_rst" />
+   end="fmcjesdadc1.cpu_rst" />
  <connection
    kind="reset"
-   version="15.0"
+   version="15.1"
    start="a5soc_base.sys_rst"
-   end="fmcjesdadc1.sys_rst" />
+   end="fmcjesdadc1.mem_rst" />
  <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="FIFO" />
  <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
  <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="2" />