From 84b2ad51e28f59a28e8f1443615975f0f49cb9dd Mon Sep 17 00:00:00 2001
From: Istvan Csomortani <istvan.csomortani@analog.com>
Date: Wed, 31 May 2017 18:15:24 +0300
Subject: [PATCH] license: Add some clarification to the header license

---
 library/altera/avl_adxcfg/avl_adxcfg.v        | 18 ++++++++---
 library/altera/avl_adxphy/avl_adxphy.v        | 18 ++++++++---
 library/altera/avl_dacfifo/avl_dacfifo.v      | 18 ++++++++---
 .../avl_dacfifo_byteenable_coder.v            | 18 ++++++++---
 .../avl_dacfifo_byteenable_decoder.v          | 18 ++++++++---
 library/altera/avl_dacfifo/avl_dacfifo_rd.v   | 18 ++++++++---
 library/altera/avl_dacfifo/avl_dacfifo_wr.v   | 18 ++++++++---
 library/altera/axi_adxcvr/axi_adxcvr.v        | 18 ++++++++---
 library/altera/axi_adxcvr/axi_adxcvr_up.v     | 18 ++++++++---
 library/altera/common/ad_cmos_clk.v           | 18 ++++++++---
 library/altera/common/ad_cmos_in.v            | 18 ++++++++---
 library/altera/common/ad_cmos_out.v           | 18 ++++++++---
 library/altera/common/ad_cmos_out_core_c5.v   | 18 ++++++++---
 library/altera/common/ad_dcfilter.v           | 18 ++++++++---
 library/altera/common/ad_lvds_clk.v           | 18 ++++++++---
 library/altera/common/ad_lvds_in.v            | 18 ++++++++---
 library/altera/common/ad_lvds_out.v           | 18 ++++++++---
 library/altera/common/ad_mem_asym.v           | 18 ++++++++---
 library/altera/common/ad_mul.v                | 18 ++++++++---
 library/altera/common/ad_serdes_clk.v         | 18 ++++++++---
 library/altera/common/ad_serdes_in.v          | 18 ++++++++---
 library/altera/common/ad_serdes_in_core_c5.v  | 18 ++++++++---
 library/altera/common/ad_serdes_out.v         | 18 ++++++++---
 library/altera/common/ad_serdes_out_core_c5.v | 18 ++++++++---
 library/axi_ad5766/axi_ad5766.v               | 18 ++++++++---
 library/axi_ad5766/up_ad5766_sequencer.v      | 18 ++++++++---
 library/axi_ad6676/axi_ad6676.v               | 18 ++++++++---
 library/axi_ad6676/axi_ad6676_channel.v       | 18 ++++++++---
 library/axi_ad6676/axi_ad6676_if.v            | 18 ++++++++---
 library/axi_ad6676/axi_ad6676_pnmon.v         | 18 ++++++++---
 library/axi_ad7616/axi_ad7616.v               | 18 ++++++++---
 library/axi_ad7616/axi_ad7616_control.v       | 18 ++++++++---
 library/axi_ad7616/axi_ad7616_maxis2wrfifo.v  | 18 ++++++++---
 library/axi_ad7616/axi_ad7616_pif.v           | 18 ++++++++---
 library/axi_ad9122/axi_ad9122.v               | 18 ++++++++---
 library/axi_ad9122/axi_ad9122_channel.v       | 18 ++++++++---
 library/axi_ad9122/axi_ad9122_core.v          | 18 ++++++++---
 library/axi_ad9122/axi_ad9122_if.v            | 18 ++++++++---
 library/axi_ad9144/axi_ad9144.v               | 18 ++++++++---
 library/axi_ad9144/axi_ad9144_channel.v       | 18 ++++++++---
 library/axi_ad9144/axi_ad9144_core.v          | 18 ++++++++---
 library/axi_ad9144/axi_ad9144_if.v            | 18 ++++++++---
 library/axi_ad9152/axi_ad9152.v               | 18 ++++++++---
 library/axi_ad9152/axi_ad9152_channel.v       | 18 ++++++++---
 library/axi_ad9152/axi_ad9152_core.v          | 18 ++++++++---
 library/axi_ad9152/axi_ad9152_if.v            | 18 ++++++++---
 library/axi_ad9162/axi_ad9162.v               | 18 ++++++++---
 library/axi_ad9162/axi_ad9162_channel.v       | 18 ++++++++---
 library/axi_ad9162/axi_ad9162_core.v          | 18 ++++++++---
 library/axi_ad9162/axi_ad9162_if.v            | 18 ++++++++---
 library/axi_ad9234/axi_ad9234.v               | 18 ++++++++---
 library/axi_ad9234/axi_ad9234_channel.v       | 18 ++++++++---
 library/axi_ad9234/axi_ad9234_if.v            | 18 ++++++++---
 library/axi_ad9234/axi_ad9234_pnmon.v         | 18 ++++++++---
 library/axi_ad9250/axi_ad9250.v               | 18 ++++++++---
 library/axi_ad9250/axi_ad9250_channel.v       | 18 ++++++++---
 library/axi_ad9250/axi_ad9250_if.v            | 18 ++++++++---
 library/axi_ad9250/axi_ad9250_pnmon.v         | 18 ++++++++---
 library/axi_ad9265/axi_ad9265.v               | 18 ++++++++---
 library/axi_ad9265/axi_ad9265_channel.v       | 18 ++++++++---
 library/axi_ad9265/axi_ad9265_if.v            | 18 ++++++++---
 library/axi_ad9265/axi_ad9265_pnmon.v         | 18 ++++++++---
 .../axi_ad9361/altera/axi_ad9361_cmos_if.v    | 18 ++++++++---
 .../axi_ad9361/altera/axi_ad9361_cmos_out.v   | 30 +++++++++++++------
 .../axi_ad9361/altera/axi_ad9361_lvds_if.v    | 18 ++++++++---
 .../axi_ad9361/altera/axi_ad9361_serdes_clk.v | 30 +++++++++++++------
 .../axi_ad9361/altera/axi_ad9361_serdes_in.v  | 30 +++++++++++++------
 .../axi_ad9361/altera/axi_ad9361_serdes_out.v | 30 +++++++++++++------
 library/axi_ad9361/axi_ad9361.v               | 18 ++++++++---
 library/axi_ad9361/axi_ad9361_rx.v            | 18 ++++++++---
 library/axi_ad9361/axi_ad9361_rx_channel.v    | 18 ++++++++---
 library/axi_ad9361/axi_ad9361_rx_pnmon.v      | 18 ++++++++---
 library/axi_ad9361/axi_ad9361_tdd.v           | 18 ++++++++---
 library/axi_ad9361/axi_ad9361_tdd_if.v        | 18 ++++++++---
 library/axi_ad9361/axi_ad9361_tx.v            | 18 ++++++++---
 library/axi_ad9361/axi_ad9361_tx_channel.v    | 18 ++++++++---
 .../axi_ad9361/xilinx/axi_ad9361_cmos_if.v    | 18 ++++++++---
 .../axi_ad9361/xilinx/axi_ad9361_lvds_if.v    | 18 ++++++++---
 library/axi_ad9371/axi_ad9371.v               | 18 ++++++++---
 library/axi_ad9371/axi_ad9371_if.v            | 18 ++++++++---
 library/axi_ad9371/axi_ad9371_rx.v            | 18 ++++++++---
 library/axi_ad9371/axi_ad9371_rx_channel.v    | 18 ++++++++---
 library/axi_ad9371/axi_ad9371_rx_os.v         | 18 ++++++++---
 library/axi_ad9371/axi_ad9371_tx.v            | 18 ++++++++---
 library/axi_ad9371/axi_ad9371_tx_channel.v    | 18 ++++++++---
 library/axi_ad9434/axi_ad9434.v               | 18 ++++++++---
 library/axi_ad9434/axi_ad9434_core.v          | 18 ++++++++---
 library/axi_ad9434/axi_ad9434_if.v            | 18 ++++++++---
 library/axi_ad9434/axi_ad9434_pnmon.v         | 18 ++++++++---
 library/axi_ad9467/axi_ad9467.v               | 18 ++++++++---
 library/axi_ad9467/axi_ad9467_channel.v       | 18 ++++++++---
 library/axi_ad9467/axi_ad9467_if.v            | 18 ++++++++---
 library/axi_ad9467/axi_ad9467_pnmon.v         | 18 ++++++++---
 library/axi_ad9625/axi_ad9625.v               | 18 ++++++++---
 library/axi_ad9625/axi_ad9625_channel.v       | 18 ++++++++---
 library/axi_ad9625/axi_ad9625_if.v            | 18 ++++++++---
 library/axi_ad9625/axi_ad9625_pnmon.v         | 18 ++++++++---
 library/axi_ad9643/axi_ad9643.v               | 18 ++++++++---
 library/axi_ad9643/axi_ad9643_channel.v       | 18 ++++++++---
 library/axi_ad9643/axi_ad9643_if.v            | 18 ++++++++---
 library/axi_ad9643/axi_ad9643_pnmon.v         | 18 ++++++++---
 library/axi_ad9652/axi_ad9652.v               | 18 ++++++++---
 library/axi_ad9652/axi_ad9652_channel.v       | 18 ++++++++---
 library/axi_ad9652/axi_ad9652_if.v            | 18 ++++++++---
 library/axi_ad9652/axi_ad9652_pnmon.v         | 18 ++++++++---
 library/axi_ad9671/axi_ad9671.v               | 18 ++++++++---
 library/axi_ad9671/axi_ad9671_channel.v       | 18 ++++++++---
 library/axi_ad9671/axi_ad9671_if.v            | 18 ++++++++---
 library/axi_ad9671/axi_ad9671_pnmon.v         | 18 ++++++++---
 library/axi_ad9680/axi_ad9680.v               | 18 ++++++++---
 library/axi_ad9680/axi_ad9680_channel.v       | 18 ++++++++---
 library/axi_ad9680/axi_ad9680_if.v            | 18 ++++++++---
 library/axi_ad9680/axi_ad9680_pnmon.v         | 18 ++++++++---
 library/axi_ad9684/axi_ad9684.v               | 18 ++++++++---
 library/axi_ad9684/axi_ad9684_channel.v       | 18 ++++++++---
 library/axi_ad9684/axi_ad9684_if.v            | 18 ++++++++---
 library/axi_ad9684/axi_ad9684_pnmon.v         | 18 ++++++++---
 library/axi_ad9739a/axi_ad9739a.v             | 18 ++++++++---
 library/axi_ad9739a/axi_ad9739a_channel.v     | 18 ++++++++---
 library/axi_ad9739a/axi_ad9739a_core.v        | 18 ++++++++---
 library/axi_ad9739a/axi_ad9739a_if.v          | 18 ++++++++---
 library/axi_ad9963/axi_ad9963.v               | 18 ++++++++---
 library/axi_ad9963/axi_ad9963_if.v            | 18 ++++++++---
 library/axi_ad9963/axi_ad9963_rx.v            | 18 ++++++++---
 library/axi_ad9963/axi_ad9963_rx_channel.v    | 18 ++++++++---
 library/axi_ad9963/axi_ad9963_rx_pnmon.v      | 18 ++++++++---
 library/axi_ad9963/axi_ad9963_tx.v            | 18 ++++++++---
 library/axi_ad9963/axi_ad9963_tx_channel.v    | 18 ++++++++---
 library/axi_adc_decimate/axi_adc_decimate.v   | 18 ++++++++---
 .../axi_adc_decimate_filter.v                 | 18 ++++++++---
 .../axi_adc_decimate/axi_adc_decimate_reg.v   | 18 ++++++++---
 library/axi_adc_decimate/cic_decim.v          | 18 ++++++++---
 library/axi_adc_decimate/fir_decim.v          | 18 ++++++++---
 library/axi_adc_trigger/axi_adc_trigger.v     | 18 ++++++++---
 library/axi_adc_trigger/axi_adc_trigger_reg.v | 18 ++++++++---
 library/axi_clkgen/axi_clkgen.v               | 18 ++++++++---
 .../axi_dac_interpolate/axi_dac_interpolate.v | 18 ++++++++---
 .../axi_dac_interpolate_filter.v              | 18 ++++++++---
 .../axi_dac_interpolate_reg.v                 | 18 ++++++++---
 library/axi_dmac/2d_transfer.v                | 18 ++++++++---
 library/axi_dmac/address_generator.v          | 18 ++++++++---
 library/axi_dmac/axi_dmac.v                   | 18 ++++++++---
 library/axi_dmac/axi_register_slice.v         | 18 ++++++++---
 library/axi_dmac/data_mover.v                 | 18 ++++++++---
 library/axi_dmac/dest_axi_mm.v                | 18 ++++++++---
 library/axi_dmac/dest_axi_stream.v            | 18 ++++++++---
 library/axi_dmac/dest_fifo_inf.v              | 18 ++++++++---
 library/axi_dmac/request_arb.v                | 18 ++++++++---
 library/axi_dmac/request_generator.v          | 18 ++++++++---
 library/axi_dmac/response_generator.v         | 18 ++++++++---
 library/axi_dmac/response_handler.v           | 18 ++++++++---
 library/axi_dmac/splitter.v                   | 18 ++++++++---
 library/axi_dmac/src_axi_mm.v                 | 18 ++++++++---
 library/axi_dmac/src_axi_stream.v             | 18 ++++++++---
 library/axi_dmac/src_fifo_inf.v               | 18 ++++++++---
 library/axi_fmcadc5_sync/axi_fmcadc5_sync.v   | 18 ++++++++---
 .../axi_fmcadc5_sync_calcor.v                 | 18 ++++++++---
 library/axi_generic_adc/axi_generic_adc.v     | 18 ++++++++---
 library/axi_gpreg/axi_gpreg.v                 | 18 ++++++++---
 library/axi_gpreg/axi_gpreg_clock_mon.v       | 18 ++++++++---
 library/axi_gpreg/axi_gpreg_io.v              | 18 ++++++++---
 library/axi_hdmi_rx/axi_hdmi_rx.v             | 18 ++++++++---
 library/axi_hdmi_rx/axi_hdmi_rx_core.v        | 18 ++++++++---
 library/axi_hdmi_rx/axi_hdmi_rx_es.v          | 18 ++++++++---
 library/axi_hdmi_rx/axi_hdmi_rx_tpm.v         | 18 ++++++++---
 library/axi_hdmi_tx/axi_hdmi_tx.v             | 18 ++++++++---
 library/axi_hdmi_tx/axi_hdmi_tx_core.v        | 18 ++++++++---
 library/axi_hdmi_tx/axi_hdmi_tx_es.v          | 18 ++++++++---
 library/axi_hdmi_tx/axi_hdmi_tx_vdma.v        | 18 ++++++++---
 library/axi_i2s_adi/axi_i2s_adi.vhd           | 18 ++++++++---
 library/axi_i2s_adi/fifo_synchronizer.vhd     | 18 ++++++++---
 library/axi_i2s_adi/i2s_clkgen.vhd            | 18 ++++++++---
 library/axi_i2s_adi/i2s_controller.vhd        | 18 ++++++++---
 library/axi_i2s_adi/i2s_rx.vhd                | 18 ++++++++---
 library/axi_i2s_adi/i2s_tx.vhd                | 18 ++++++++---
 library/axi_intr_monitor/axi_intr_monitor.v   | 18 ++++++++---
 .../axi_logic_analyzer/axi_logic_analyzer.v   | 18 ++++++++---
 .../axi_logic_analyzer_reg.v                  | 18 ++++++++---
 .../axi_logic_analyzer_trigger.v              | 18 ++++++++---
 library/axi_mc_controller/axi_mc_controller.v | 18 ++++++++---
 library/axi_mc_controller/control_registers.v | 18 ++++++++---
 library/axi_mc_controller/delay.v             | 18 ++++++++---
 library/axi_mc_controller/motor_driver.v      | 18 ++++++++---
 library/axi_mc_current_monitor/ad7401.v       | 18 ++++++++---
 .../axi_mc_current_monitor.v                  | 18 ++++++++---
 .../axi_mc_current_monitor/dec256sinc24b.v    | 18 ++++++++---
 library/axi_mc_speed/axi_mc_speed.v           | 18 ++++++++---
 library/axi_mc_speed/debouncer.v              | 18 ++++++++---
 library/axi_mc_speed/delay_30_degrees.v       | 18 ++++++++---
 library/axi_mc_speed/speed_detector.v         | 18 ++++++++---
 .../axi_rd_wr_combiner/axi_rd_wr_combiner.v   | 18 ++++++++---
 library/axi_spdif_rx/axi_spdif_rx.vhd         | 18 ++++++++---
 library/axi_spdif_tx/axi_spdif_tx.vhd         | 18 ++++++++---
 library/axi_usb_fx3/axi_usb_fx3.v             | 18 ++++++++---
 library/axi_usb_fx3/axi_usb_fx3_core.v        | 18 ++++++++---
 library/axi_usb_fx3/axi_usb_fx3_if.v          | 18 ++++++++---
 library/axi_usb_fx3/axi_usb_fx3_reg.v         | 18 ++++++++---
 .../cn0363_dma_sequencer.v                    | 18 ++++++++---
 .../cn0363_phase_data_sync.v                  | 18 ++++++++---
 library/common/ad_addsub.v                    | 18 ++++++++---
 library/common/ad_axis_inf_rx.v               | 18 ++++++++---
 library/common/ad_b2g.v                       | 18 ++++++++---
 library/common/ad_csc_1.v                     | 18 ++++++++---
 library/common/ad_csc_1_add.v                 | 18 ++++++++---
 library/common/ad_csc_1_mul.v                 | 18 ++++++++---
 library/common/ad_csc_CrYCb2RGB.v             | 18 ++++++++---
 library/common/ad_csc_RGB2CrYCb.v             | 18 ++++++++---
 library/common/ad_datafmt.v                   | 18 ++++++++---
 library/common/ad_dcfilter.v                  | 18 ++++++++---
 library/common/ad_dds.v                       | 18 ++++++++---
 library/common/ad_dds_1.v                     | 18 ++++++++---
 library/common/ad_dds_sine.v                  | 18 ++++++++---
 library/common/ad_edge_detect.v               | 18 ++++++++---
 library/common/ad_g2b.v                       | 18 ++++++++---
 library/common/ad_gt_channel.v                | 18 ++++++++---
 library/common/ad_gt_channel_1.v              | 18 ++++++++---
 library/common/ad_gt_common.v                 | 18 ++++++++---
 library/common/ad_gt_common_1.v               | 18 ++++++++---
 library/common/ad_gt_es.v                     | 18 ++++++++---
 library/common/ad_gt_es_axi.v                 | 18 ++++++++---
 library/common/ad_iqcor.v                     | 18 ++++++++---
 library/common/ad_jesd_align.v                | 18 ++++++++---
 library/common/ad_mem.v                       | 18 ++++++++---
 library/common/ad_mem_asym.v                  | 18 ++++++++---
 library/common/ad_pnmon.v                     | 18 ++++++++---
 library/common/ad_rst.v                       | 18 ++++++++---
 library/common/ad_ss_422to444.v               | 18 ++++++++---
 library/common/ad_ss_444to422.v               | 18 ++++++++---
 library/common/ad_sysref_gen.v                | 18 ++++++++---
 library/common/ad_tdd_control.v               | 18 ++++++++---
 library/common/ad_xcvr_rx_if.v                | 18 ++++++++---
 library/common/axi_ctrlif.vhd                 | 18 ++++++++---
 library/common/axi_streaming_dma_rx_fifo.vhd  | 18 ++++++++---
 library/common/axi_streaming_dma_tx_fifo.vhd  | 18 ++++++++---
 library/common/dma_fifo.vhd                   | 18 ++++++++---
 library/common/pl330_dma_fifo.vhd             | 18 ++++++++---
 library/common/sync_bits.v                    | 18 ++++++++---
 library/common/sync_gray.v                    | 18 ++++++++---
 library/common/up_adc_channel.v               | 18 ++++++++---
 library/common/up_adc_common.v                | 18 ++++++++---
 library/common/up_axi.v                       | 18 ++++++++---
 library/common/up_clkgen.v                    | 18 ++++++++---
 library/common/up_clock_mon.v                 | 18 ++++++++---
 library/common/up_dac_channel.v               | 18 ++++++++---
 library/common/up_dac_common.v                | 18 ++++++++---
 library/common/up_delay_cntrl.v               | 18 ++++++++---
 library/common/up_gt.v                        | 18 ++++++++---
 library/common/up_gt_channel.v                | 18 ++++++++---
 library/common/up_hdmi_rx.v                   | 18 ++++++++---
 library/common/up_hdmi_tx.v                   | 18 ++++++++---
 library/common/up_pmod.v                      | 18 ++++++++---
 library/common/up_tdd_cntrl.v                 | 18 ++++++++---
 library/common/up_xfer_cntrl.v                | 18 ++++++++---
 library/common/up_xfer_status.v               | 18 ++++++++---
 library/common/util_dacfifo_bypass.v          | 18 ++++++++---
 library/common/util_delay.v                   | 18 ++++++++---
 library/common/util_pulse_gen.v               | 18 ++++++++---
 library/cordic_demod/cordic_demod.v           | 18 ++++++++---
 library/prcfg/bist/prcfg_adc.v                | 18 ++++++++---
 library/prcfg/bist/prcfg_dac.v                | 18 ++++++++---
 library/prcfg/common/prcfg_top.v              | 18 ++++++++---
 library/prcfg/default/prcfg_adc.v             | 18 ++++++++---
 library/prcfg/default/prcfg_dac.v             | 18 ++++++++---
 library/prcfg/qpsk/prcfg_adc.v                | 18 ++++++++---
 library/prcfg/qpsk/prcfg_dac.v                | 18 ++++++++---
 library/prcfg/qpsk/qpsk_demod.v               | 18 ++++++++---
 library/prcfg/qpsk/qpsk_mod.v                 | 18 ++++++++---
 .../axi_spi_engine/axi_spi_engine.v           | 18 ++++++++---
 .../spi_engine_execution.v                    | 18 ++++++++---
 .../spi_engine_interconnect.v                 | 18 ++++++++---
 .../spi_engine_offload/spi_engine_offload.v   | 18 ++++++++---
 library/util_adcfifo/util_adcfifo.v           | 18 ++++++++---
 library/util_axis_fifo/address_gray.v         | 18 ++++++++---
 .../util_axis_fifo/address_gray_pipelined.v   | 18 ++++++++---
 library/util_axis_fifo/address_sync.v         | 18 ++++++++---
 library/util_axis_fifo/util_axis_fifo.v       | 18 ++++++++---
 library/util_axis_resize/util_axis_resize.v   | 18 ++++++++---
 library/util_bsplit/util_bsplit.v             | 18 ++++++++---
 library/util_ccat/util_ccat.v                 | 18 ++++++++---
 library/util_cic/cic_comb.v                   | 18 ++++++++---
 library/util_cic/cic_int.v                    | 18 ++++++++---
 library/util_clkdiv/util_clkdiv.v             | 18 ++++++++---
 library/util_cpack/util_cpack.v               | 18 ++++++++---
 library/util_cpack/util_cpack_dsf.v           | 18 ++++++++---
 library/util_cpack/util_cpack_mux.v           | 18 ++++++++---
 library/util_dacfifo/util_dacfifo.v           | 18 ++++++++---
 library/util_extract/util_extract.v           | 18 ++++++++---
 library/util_fir_dec/util_fir_dec.v           | 18 ++++++++---
 library/util_fir_int/util_fir_int.v           | 18 ++++++++---
 library/util_gmii_to_rgmii/mdc_mdio.v         | 18 ++++++++---
 .../util_gmii_to_rgmii/util_gmii_to_rgmii.v   | 18 ++++++++---
 library/util_i2c_mixer/util_i2c_mixer.vhd     | 18 ++++++++---
 library/util_mfifo/util_mfifo.v               | 18 ++++++++---
 library/util_pmod_adc/util_pmod_adc.v         | 18 ++++++++---
 library/util_pmod_fmeter/util_pmod_fmeter.v   | 18 ++++++++---
 .../util_pmod_fmeter/util_pmod_fmeter_core.v  | 18 ++++++++---
 library/util_rfifo/util_rfifo.v               | 18 ++++++++---
 .../util_sigma_delta_spi.v                    | 18 ++++++++---
 library/util_tdd_sync/util_tdd_sync.v         | 18 ++++++++---
 library/util_upack/util_upack.v               | 18 ++++++++---
 library/util_upack/util_upack_dmx.v           | 18 ++++++++---
 library/util_upack/util_upack_dsf.v           | 18 ++++++++---
 library/util_var_fifo/util_var_fifo.v         | 18 ++++++++---
 library/util_wfifo/util_wfifo.v               | 18 ++++++++---
 library/xilinx/axi_adcfifo/axi_adcfifo.v      | 18 ++++++++---
 library/xilinx/axi_adcfifo/axi_adcfifo_adc.v  | 18 ++++++++---
 library/xilinx/axi_adcfifo/axi_adcfifo_dma.v  | 18 ++++++++---
 library/xilinx/axi_adcfifo/axi_adcfifo_rd.v   | 18 ++++++++---
 library/xilinx/axi_adcfifo/axi_adcfifo_wr.v   | 18 ++++++++---
 library/xilinx/axi_adxcvr/axi_adxcvr.v        | 18 ++++++++---
 library/xilinx/axi_adxcvr/axi_adxcvr_es.v     | 18 ++++++++---
 library/xilinx/axi_adxcvr/axi_adxcvr_mdrp.v   | 18 ++++++++---
 .../xilinx/axi_adxcvr/axi_adxcvr_mstatus.v    | 18 ++++++++---
 library/xilinx/axi_adxcvr/axi_adxcvr_up.v     | 18 ++++++++---
 library/xilinx/axi_dacfifo/axi_dacfifo.v      | 18 ++++++++---
 library/xilinx/axi_dacfifo/axi_dacfifo_dac.v  | 18 ++++++++---
 library/xilinx/axi_dacfifo/axi_dacfifo_rd.v   | 18 ++++++++---
 library/xilinx/axi_dacfifo/axi_dacfifo_wr.v   | 18 ++++++++---
 library/xilinx/axi_xcvrlb/axi_xcvrlb.v        | 18 ++++++++---
 library/xilinx/axi_xcvrlb/axi_xcvrlb_1.v      | 18 ++++++++---
 library/xilinx/common/ad_cmos_clk.v           | 18 ++++++++---
 library/xilinx/common/ad_cmos_in.v            | 18 ++++++++---
 library/xilinx/common/ad_cmos_out.v           | 18 ++++++++---
 library/xilinx/common/ad_iobuf.v              | 18 ++++++++---
 library/xilinx/common/ad_lvds_clk.v           | 18 ++++++++---
 library/xilinx/common/ad_lvds_in.v            | 18 ++++++++---
 library/xilinx/common/ad_lvds_out.v           | 18 ++++++++---
 library/xilinx/common/ad_mmcm_drp.v           | 18 ++++++++---
 library/xilinx/common/ad_mul.v                | 18 ++++++++---
 library/xilinx/common/ad_serdes_clk.v         | 18 ++++++++---
 library/xilinx/common/ad_serdes_in.v          | 18 ++++++++---
 library/xilinx/common/ad_serdes_out.v         | 18 ++++++++---
 library/xilinx/util_adxcvr/util_adxcvr.v      | 18 ++++++++---
 library/xilinx/util_adxcvr/util_adxcvr_xch.v  | 18 ++++++++---
 library/xilinx/util_adxcvr/util_adxcvr_xcm.v  | 18 ++++++++---
 projects/ad5766_sdz/zed/system_top.v          | 18 ++++++++---
 projects/ad6676evb/vc707/system_top.v         | 18 ++++++++---
 projects/ad6676evb/zc706/system_top.v         | 18 ++++++++---
 projects/ad7616_sdz/zc706/system_top_pi.v     | 18 ++++++++---
 projects/ad7616_sdz/zc706/system_top_si.v     | 18 ++++++++---
 projects/ad7616_sdz/zed/system_top_pi.v       | 18 ++++++++---
 projects/ad7616_sdz/zed/system_top_si.v       | 18 ++++++++---
 projects/ad77681evb/zed/system_top.v          | 18 ++++++++---
 projects/ad7768evb/common/ad7768_if.v         | 18 ++++++++---
 projects/ad7768evb/zed/system_top.v           | 18 ++++++++---
 projects/ad9265_fmc/common/ad9265_spi.v       | 18 ++++++++---
 projects/ad9265_fmc/zc706/system_top.v        | 18 ++++++++---
 projects/ad9434_fmc/common/ad9434_spi.v       | 18 ++++++++---
 projects/ad9434_fmc/zc706/system_top.v        | 18 ++++++++---
 projects/ad9467_fmc/common/ad9467_spi.v       | 18 ++++++++---
 projects/ad9467_fmc/kc705/system_top.v        | 18 ++++++++---
 projects/ad9467_fmc/zed/system_top.v          | 18 ++++++++---
 projects/ad9739a_fmc/zc706/system_top.v       | 18 ++++++++---
 projects/adaq7980_sdz/zed/system_top.v        | 18 ++++++++---
 .../adrv9361z7035/ccbob_cmos/system_top.v     | 18 ++++++++---
 .../adrv9361z7035/ccbob_lvds/system_top.v     | 18 ++++++++---
 .../adrv9361z7035/ccbox_lvds/system_top.v     | 18 ++++++++---
 .../adrv9361z7035/ccfmc_lvds/system_top.v     | 18 ++++++++---
 .../adrv9361z7035/ccpci_lvds/system_top.v     | 18 ++++++++---
 .../adrv9361z7035/ccusb_lvds/system_top.v     | 18 ++++++++---
 .../adrv9364z7020/ccbob_cmos/system_top.v     | 18 ++++++++---
 .../adrv9364z7020/ccbob_lvds/system_top.v     | 18 ++++++++---
 .../adrv9364z7020/ccbox_lvds/system_top.v     | 18 ++++++++---
 .../adrv9364z7020/ccusb_lvds/system_top.v     | 18 ++++++++---
 projects/adrv9371x/a10gx/system_top.v         | 18 ++++++++---
 projects/adrv9371x/a10soc/system_top.v        | 18 ++++++++---
 projects/adrv9371x/zc706/system_top.v         | 18 ++++++++---
 projects/adv7511/ac701/system_top.v           | 18 ++++++++---
 projects/adv7511/kc705/system_top.v           | 18 ++++++++---
 projects/adv7511/kcu105/system_top.v          | 18 ++++++++---
 projects/adv7511/mitx045/system_top.v         | 18 ++++++++---
 projects/adv7511/vc707/system_top.v           | 18 ++++++++---
 projects/adv7511/zc702/system_top.v           | 18 ++++++++---
 projects/adv7511/zc706/system_top.v           | 18 ++++++++---
 projects/adv7511/zed/system_top.v             | 18 ++++++++---
 projects/arradio/c5soc/system_top.v           | 18 ++++++++---
 projects/cftl_cip/zed/system_top.v            | 18 ++++++++---
 projects/cftl_std/zed/system_top.v            | 18 ++++++++---
 projects/cn0363/microzed/system_top.v         | 18 ++++++++---
 projects/cn0363/zed/system_top.v              | 18 ++++++++---
 projects/common/a5gte/system_top.v            | 18 ++++++++---
 projects/daq1/common/daq1_spi.v               | 18 ++++++++---
 projects/daq1/cpld/daq1_cpld.v                | 18 ++++++++---
 projects/daq1/zc706/system_top.v              | 18 ++++++++---
 projects/daq2/a10gx/system_top.v              | 18 ++++++++---
 projects/daq2/common/daq2_spi.v               | 18 ++++++++---
 projects/daq2/kc705/system_top.v              | 18 ++++++++---
 projects/daq2/kcu105/system_top.v             | 18 ++++++++---
 projects/daq2/vc707/system_top.v              | 18 ++++++++---
 projects/daq2/zc706/system_top.v              | 18 ++++++++---
 projects/daq2/zcu102/system_top.v             | 18 ++++++++---
 projects/daq3/a10gx/system_top.v              | 18 ++++++++---
 projects/daq3/common/daq3_spi.v               | 18 ++++++++---
 projects/daq3/kcu105/system_top.v             | 18 ++++++++---
 projects/daq3/zc706/system_top.v              | 18 ++++++++---
 projects/fmcadc2/common/fmcadc2_spi.v         | 18 ++++++++---
 projects/fmcadc2/vc707/system_top.v           | 18 ++++++++---
 projects/fmcadc2/zc706/system_top.v           | 18 ++++++++---
 projects/fmcadc4/common/fmcadc4_spi.v         | 18 ++++++++---
 projects/fmcadc4/zc706/system_top.v           | 18 ++++++++---
 projects/fmcadc5/common/fmcadc5_spi.v         | 18 ++++++++---
 projects/fmcadc5/vc707/system_top.v           | 18 ++++++++---
 projects/fmcjesdadc1/a5gt/system_top.v        | 18 ++++++++---
 projects/fmcjesdadc1/a5soc/system_top.v       | 18 ++++++++---
 projects/fmcjesdadc1/common/fmcjesdadc1_spi.v | 18 ++++++++---
 projects/fmcjesdadc1/kc705/system_top.v       | 18 ++++++++---
 projects/fmcjesdadc1/vc707/system_top.v       | 18 ++++++++---
 projects/fmcjesdadc1/zc706/system_top.v       | 18 ++++++++---
 projects/fmcomms11/common/fmcomms11_spi.v     | 18 ++++++++---
 projects/fmcomms11/zc706/system_top.v         | 18 ++++++++---
 projects/fmcomms2/ac701/system_top.v          | 18 ++++++++---
 projects/fmcomms2/common/prcfg.v              | 18 ++++++++---
 projects/fmcomms2/common/prcfg_bb.v           | 18 ++++++++---
 projects/fmcomms2/kc705/system_top.v          | 18 ++++++++---
 projects/fmcomms2/mitx045/system_top.v        | 18 ++++++++---
 projects/fmcomms2/vc707/system_top.v          | 18 ++++++++---
 projects/fmcomms2/zc702/system_top.v          | 18 ++++++++---
 projects/fmcomms2/zc706/system_top.v          | 18 ++++++++---
 projects/fmcomms2/zc706pr/system_top.v        | 18 ++++++++---
 projects/fmcomms2/zcu102/system_top.v         | 18 ++++++++---
 projects/fmcomms2/zed/system_top.v            | 18 ++++++++---
 projects/fmcomms5/zc702/system_top.v          | 18 ++++++++---
 projects/fmcomms5/zc706/system_top.v          | 18 ++++++++---
 projects/fmcomms5/zcu102/system_top.v         | 18 ++++++++---
 projects/fmcomms7/common/fmcomms7_spi.v       | 18 ++++++++---
 projects/fmcomms7/zc706/system_top.v          | 18 ++++++++---
 projects/imageon/zc706/system_top.v           | 18 ++++++++---
 projects/imageon/zed/system_top.v             | 18 ++++++++---
 projects/m2k/common/m2k_spi.v                 | 18 ++++++++---
 projects/m2k/standalone/system_top.v          | 18 ++++++++---
 projects/m2k/zed/system_top.v                 | 18 ++++++++---
 projects/motcon2_fmc/zed/system_top.v         | 18 ++++++++---
 projects/pluto/system_top.v                   | 18 ++++++++---
 projects/usb_fx3/zc706/system_top.v           | 18 ++++++++---
 projects/usdrx1/a5gt/system_top.v             | 18 ++++++++---
 projects/usdrx1/common/usdrx1_spi.v           | 18 ++++++++---
 projects/usdrx1/cpld/usdrx1_cpld.v            | 18 ++++++++---
 projects/usdrx1/zc706/system_top.v            | 18 ++++++++---
 projects/usrpe31x/system_top.v                | 18 ++++++++---
 439 files changed, 6174 insertions(+), 1776 deletions(-)

diff --git a/library/altera/avl_adxcfg/avl_adxcfg.v b/library/altera/avl_adxcfg/avl_adxcfg.v
index 5b2537946..ca06ec63b 100644
--- a/library/altera/avl_adxcfg/avl_adxcfg.v
+++ b/library/altera/avl_adxcfg/avl_adxcfg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/avl_adxphy/avl_adxphy.v b/library/altera/avl_adxphy/avl_adxphy.v
index 5835f544f..b83655b96 100644
--- a/library/altera/avl_adxphy/avl_adxphy.v
+++ b/library/altera/avl_adxphy/avl_adxphy.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/avl_dacfifo/avl_dacfifo.v b/library/altera/avl_dacfifo/avl_dacfifo.v
index 14dd92f0a..faadff0a5 100644
--- a/library/altera/avl_dacfifo/avl_dacfifo.v
+++ b/library/altera/avl_dacfifo/avl_dacfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/avl_dacfifo/avl_dacfifo_byteenable_coder.v b/library/altera/avl_dacfifo/avl_dacfifo_byteenable_coder.v
index f0171a1b0..fb52a996a 100644
--- a/library/altera/avl_dacfifo/avl_dacfifo_byteenable_coder.v
+++ b/library/altera/avl_dacfifo/avl_dacfifo_byteenable_coder.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/avl_dacfifo/avl_dacfifo_byteenable_decoder.v b/library/altera/avl_dacfifo/avl_dacfifo_byteenable_decoder.v
index 83a7adb7e..22a3b4471 100644
--- a/library/altera/avl_dacfifo/avl_dacfifo_byteenable_decoder.v
+++ b/library/altera/avl_dacfifo/avl_dacfifo_byteenable_decoder.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/avl_dacfifo/avl_dacfifo_rd.v b/library/altera/avl_dacfifo/avl_dacfifo_rd.v
index 3ed1804af..927838cd9 100644
--- a/library/altera/avl_dacfifo/avl_dacfifo_rd.v
+++ b/library/altera/avl_dacfifo/avl_dacfifo_rd.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/avl_dacfifo/avl_dacfifo_wr.v b/library/altera/avl_dacfifo/avl_dacfifo_wr.v
index 6c83e3c10..3f5cc544d 100644
--- a/library/altera/avl_dacfifo/avl_dacfifo_wr.v
+++ b/library/altera/avl_dacfifo/avl_dacfifo_wr.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/axi_adxcvr/axi_adxcvr.v b/library/altera/axi_adxcvr/axi_adxcvr.v
index 41a33c9bb..e9ea9741c 100644
--- a/library/altera/axi_adxcvr/axi_adxcvr.v
+++ b/library/altera/axi_adxcvr/axi_adxcvr.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/axi_adxcvr/axi_adxcvr_up.v b/library/altera/axi_adxcvr/axi_adxcvr_up.v
index 983b79712..940908e0e 100644
--- a/library/altera/axi_adxcvr/axi_adxcvr_up.v
+++ b/library/altera/axi_adxcvr/axi_adxcvr_up.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_cmos_clk.v b/library/altera/common/ad_cmos_clk.v
index 637b55335..29af9873a 100644
--- a/library/altera/common/ad_cmos_clk.v
+++ b/library/altera/common/ad_cmos_clk.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_cmos_in.v b/library/altera/common/ad_cmos_in.v
index 04ca869c5..255b444c6 100644
--- a/library/altera/common/ad_cmos_in.v
+++ b/library/altera/common/ad_cmos_in.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_cmos_out.v b/library/altera/common/ad_cmos_out.v
index e59b5f592..2fd8c9744 100644
--- a/library/altera/common/ad_cmos_out.v
+++ b/library/altera/common/ad_cmos_out.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_cmos_out_core_c5.v b/library/altera/common/ad_cmos_out_core_c5.v
index 94a773b79..9e23d3338 100644
--- a/library/altera/common/ad_cmos_out_core_c5.v
+++ b/library/altera/common/ad_cmos_out_core_c5.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_dcfilter.v b/library/altera/common/ad_dcfilter.v
index 231769b65..6e9119f26 100755
--- a/library/altera/common/ad_dcfilter.v
+++ b/library/altera/common/ad_dcfilter.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_lvds_clk.v b/library/altera/common/ad_lvds_clk.v
index b90e5305d..6fff99190 100644
--- a/library/altera/common/ad_lvds_clk.v
+++ b/library/altera/common/ad_lvds_clk.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_lvds_in.v b/library/altera/common/ad_lvds_in.v
index 9b0f87eb8..8b5cd60d2 100644
--- a/library/altera/common/ad_lvds_in.v
+++ b/library/altera/common/ad_lvds_in.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_lvds_out.v b/library/altera/common/ad_lvds_out.v
index d1a1964bb..862e7a597 100644
--- a/library/altera/common/ad_lvds_out.v
+++ b/library/altera/common/ad_lvds_out.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_mem_asym.v b/library/altera/common/ad_mem_asym.v
index 9bb608f5c..2638d333c 100644
--- a/library/altera/common/ad_mem_asym.v
+++ b/library/altera/common/ad_mem_asym.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_mul.v b/library/altera/common/ad_mul.v
index 10bc0ae4a..65f24e445 100644
--- a/library/altera/common/ad_mul.v
+++ b/library/altera/common/ad_mul.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_serdes_clk.v b/library/altera/common/ad_serdes_clk.v
index 93f99d442..5c09eaf0a 100644
--- a/library/altera/common/ad_serdes_clk.v
+++ b/library/altera/common/ad_serdes_clk.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_serdes_in.v b/library/altera/common/ad_serdes_in.v
index 7bb309b13..ec50e977b 100644
--- a/library/altera/common/ad_serdes_in.v
+++ b/library/altera/common/ad_serdes_in.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_serdes_in_core_c5.v b/library/altera/common/ad_serdes_in_core_c5.v
index c6d644fae..4b90c281b 100644
--- a/library/altera/common/ad_serdes_in_core_c5.v
+++ b/library/altera/common/ad_serdes_in_core_c5.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_serdes_out.v b/library/altera/common/ad_serdes_out.v
index 499385caf..3ca7d6934 100644
--- a/library/altera/common/ad_serdes_out.v
+++ b/library/altera/common/ad_serdes_out.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/altera/common/ad_serdes_out_core_c5.v b/library/altera/common/ad_serdes_out_core_c5.v
index 4119d18ce..e2622135e 100644
--- a/library/altera/common/ad_serdes_out_core_c5.v
+++ b/library/altera/common/ad_serdes_out_core_c5.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad5766/axi_ad5766.v b/library/axi_ad5766/axi_ad5766.v
index 75debb3f7..35a649541 100644
--- a/library/axi_ad5766/axi_ad5766.v
+++ b/library/axi_ad5766/axi_ad5766.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad5766/up_ad5766_sequencer.v b/library/axi_ad5766/up_ad5766_sequencer.v
index ad9f3a45b..e020dc0af 100644
--- a/library/axi_ad5766/up_ad5766_sequencer.v
+++ b/library/axi_ad5766/up_ad5766_sequencer.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad6676/axi_ad6676.v b/library/axi_ad6676/axi_ad6676.v
index 6e475f729..1e88226f3 100755
--- a/library/axi_ad6676/axi_ad6676.v
+++ b/library/axi_ad6676/axi_ad6676.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad6676/axi_ad6676_channel.v b/library/axi_ad6676/axi_ad6676_channel.v
index b093f33cf..d444518a0 100755
--- a/library/axi_ad6676/axi_ad6676_channel.v
+++ b/library/axi_ad6676/axi_ad6676_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad6676/axi_ad6676_if.v b/library/axi_ad6676/axi_ad6676_if.v
index c95ca466e..7bc82482c 100755
--- a/library/axi_ad6676/axi_ad6676_if.v
+++ b/library/axi_ad6676/axi_ad6676_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad6676/axi_ad6676_pnmon.v b/library/axi_ad6676/axi_ad6676_pnmon.v
index 232453ebe..acce2ef92 100755
--- a/library/axi_ad6676/axi_ad6676_pnmon.v
+++ b/library/axi_ad6676/axi_ad6676_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad7616/axi_ad7616.v b/library/axi_ad7616/axi_ad7616.v
index 3b02d15c2..f005aea80 100644
--- a/library/axi_ad7616/axi_ad7616.v
+++ b/library/axi_ad7616/axi_ad7616.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad7616/axi_ad7616_control.v b/library/axi_ad7616/axi_ad7616_control.v
index 3a08e12fa..ea2017dc9 100644
--- a/library/axi_ad7616/axi_ad7616_control.v
+++ b/library/axi_ad7616/axi_ad7616_control.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad7616/axi_ad7616_maxis2wrfifo.v b/library/axi_ad7616/axi_ad7616_maxis2wrfifo.v
index d9e816e83..54b064874 100644
--- a/library/axi_ad7616/axi_ad7616_maxis2wrfifo.v
+++ b/library/axi_ad7616/axi_ad7616_maxis2wrfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad7616/axi_ad7616_pif.v b/library/axi_ad7616/axi_ad7616_pif.v
index 9113a3f4f..17673bc4c 100644
--- a/library/axi_ad7616/axi_ad7616_pif.v
+++ b/library/axi_ad7616/axi_ad7616_pif.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9122/axi_ad9122.v b/library/axi_ad9122/axi_ad9122.v
index 1e7769041..d1dc68a69 100644
--- a/library/axi_ad9122/axi_ad9122.v
+++ b/library/axi_ad9122/axi_ad9122.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9122/axi_ad9122_channel.v b/library/axi_ad9122/axi_ad9122_channel.v
index 765db3a16..315c5188b 100644
--- a/library/axi_ad9122/axi_ad9122_channel.v
+++ b/library/axi_ad9122/axi_ad9122_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9122/axi_ad9122_core.v b/library/axi_ad9122/axi_ad9122_core.v
index 9d19bd41e..f754d2dee 100644
--- a/library/axi_ad9122/axi_ad9122_core.v
+++ b/library/axi_ad9122/axi_ad9122_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9122/axi_ad9122_if.v b/library/axi_ad9122/axi_ad9122_if.v
index 66cb05796..7eceb5958 100644
--- a/library/axi_ad9122/axi_ad9122_if.v
+++ b/library/axi_ad9122/axi_ad9122_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9144/axi_ad9144.v b/library/axi_ad9144/axi_ad9144.v
index c6520ca91..04a6e8c35 100644
--- a/library/axi_ad9144/axi_ad9144.v
+++ b/library/axi_ad9144/axi_ad9144.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9144/axi_ad9144_channel.v b/library/axi_ad9144/axi_ad9144_channel.v
index d47c66319..23dc26778 100644
--- a/library/axi_ad9144/axi_ad9144_channel.v
+++ b/library/axi_ad9144/axi_ad9144_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9144/axi_ad9144_core.v b/library/axi_ad9144/axi_ad9144_core.v
index 0e7ab48ce..4fb3330b4 100644
--- a/library/axi_ad9144/axi_ad9144_core.v
+++ b/library/axi_ad9144/axi_ad9144_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9144/axi_ad9144_if.v b/library/axi_ad9144/axi_ad9144_if.v
index d28dec8ce..fa15f957d 100644
--- a/library/axi_ad9144/axi_ad9144_if.v
+++ b/library/axi_ad9144/axi_ad9144_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9152/axi_ad9152.v b/library/axi_ad9152/axi_ad9152.v
index 06ae09df3..b312691e0 100644
--- a/library/axi_ad9152/axi_ad9152.v
+++ b/library/axi_ad9152/axi_ad9152.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9152/axi_ad9152_channel.v b/library/axi_ad9152/axi_ad9152_channel.v
index cbdf62258..36b236776 100644
--- a/library/axi_ad9152/axi_ad9152_channel.v
+++ b/library/axi_ad9152/axi_ad9152_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9152/axi_ad9152_core.v b/library/axi_ad9152/axi_ad9152_core.v
index 84843e7e7..6913da510 100644
--- a/library/axi_ad9152/axi_ad9152_core.v
+++ b/library/axi_ad9152/axi_ad9152_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9152/axi_ad9152_if.v b/library/axi_ad9152/axi_ad9152_if.v
index 3d951fe7a..c2f14a39b 100644
--- a/library/axi_ad9152/axi_ad9152_if.v
+++ b/library/axi_ad9152/axi_ad9152_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9162/axi_ad9162.v b/library/axi_ad9162/axi_ad9162.v
index 4198a15b7..bb69fdd50 100644
--- a/library/axi_ad9162/axi_ad9162.v
+++ b/library/axi_ad9162/axi_ad9162.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9162/axi_ad9162_channel.v b/library/axi_ad9162/axi_ad9162_channel.v
index 9195b83db..b62683591 100644
--- a/library/axi_ad9162/axi_ad9162_channel.v
+++ b/library/axi_ad9162/axi_ad9162_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9162/axi_ad9162_core.v b/library/axi_ad9162/axi_ad9162_core.v
index 334295919..7177b95f5 100644
--- a/library/axi_ad9162/axi_ad9162_core.v
+++ b/library/axi_ad9162/axi_ad9162_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9162/axi_ad9162_if.v b/library/axi_ad9162/axi_ad9162_if.v
index 2675fe2b3..69dcfdf6d 100644
--- a/library/axi_ad9162/axi_ad9162_if.v
+++ b/library/axi_ad9162/axi_ad9162_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9234/axi_ad9234.v b/library/axi_ad9234/axi_ad9234.v
index 94f065bc1..ba63cef9d 100644
--- a/library/axi_ad9234/axi_ad9234.v
+++ b/library/axi_ad9234/axi_ad9234.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9234/axi_ad9234_channel.v b/library/axi_ad9234/axi_ad9234_channel.v
index 3ccf7e8d4..133088a4a 100644
--- a/library/axi_ad9234/axi_ad9234_channel.v
+++ b/library/axi_ad9234/axi_ad9234_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9234/axi_ad9234_if.v b/library/axi_ad9234/axi_ad9234_if.v
index f22d82603..3dc0b36f3 100644
--- a/library/axi_ad9234/axi_ad9234_if.v
+++ b/library/axi_ad9234/axi_ad9234_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9234/axi_ad9234_pnmon.v b/library/axi_ad9234/axi_ad9234_pnmon.v
index 9c9148be5..fb6ee748c 100644
--- a/library/axi_ad9234/axi_ad9234_pnmon.v
+++ b/library/axi_ad9234/axi_ad9234_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9250/axi_ad9250.v b/library/axi_ad9250/axi_ad9250.v
index dae4bfc5e..4f9c6d7d3 100644
--- a/library/axi_ad9250/axi_ad9250.v
+++ b/library/axi_ad9250/axi_ad9250.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9250/axi_ad9250_channel.v b/library/axi_ad9250/axi_ad9250_channel.v
index cfe6ce235..95f0acc44 100644
--- a/library/axi_ad9250/axi_ad9250_channel.v
+++ b/library/axi_ad9250/axi_ad9250_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9250/axi_ad9250_if.v b/library/axi_ad9250/axi_ad9250_if.v
index baa00cc46..d221d8102 100644
--- a/library/axi_ad9250/axi_ad9250_if.v
+++ b/library/axi_ad9250/axi_ad9250_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9250/axi_ad9250_pnmon.v b/library/axi_ad9250/axi_ad9250_pnmon.v
index 051f9d284..5a52d110c 100644
--- a/library/axi_ad9250/axi_ad9250_pnmon.v
+++ b/library/axi_ad9250/axi_ad9250_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9265/axi_ad9265.v b/library/axi_ad9265/axi_ad9265.v
index 817124632..3ddf51bf5 100644
--- a/library/axi_ad9265/axi_ad9265.v
+++ b/library/axi_ad9265/axi_ad9265.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9265/axi_ad9265_channel.v b/library/axi_ad9265/axi_ad9265_channel.v
index af98b6ea9..cbf4bf4b2 100644
--- a/library/axi_ad9265/axi_ad9265_channel.v
+++ b/library/axi_ad9265/axi_ad9265_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9265/axi_ad9265_if.v b/library/axi_ad9265/axi_ad9265_if.v
index 77bcf8326..cd51deaee 100644
--- a/library/axi_ad9265/axi_ad9265_if.v
+++ b/library/axi_ad9265/axi_ad9265_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9265/axi_ad9265_pnmon.v b/library/axi_ad9265/axi_ad9265_pnmon.v
index a69a93994..91e8dd234 100644
--- a/library/axi_ad9265/axi_ad9265_pnmon.v
+++ b/library/axi_ad9265/axi_ad9265_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/altera/axi_ad9361_cmos_if.v b/library/axi_ad9361/altera/axi_ad9361_cmos_if.v
index a40bc0c8e..130e2d82c 100644
--- a/library/axi_ad9361/altera/axi_ad9361_cmos_if.v
+++ b/library/axi_ad9361/altera/axi_ad9361_cmos_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/altera/axi_ad9361_cmos_out.v b/library/axi_ad9361/altera/axi_ad9361_cmos_out.v
index 5babc8813..5e8e86cc7 100644
--- a/library/axi_ad9361/altera/axi_ad9361_cmos_out.v
+++ b/library/axi_ad9361/altera/axi_ad9361_cmos_out.v
@@ -2,21 +2,33 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// Each core or library found in this collection may have its own licensing terms. 
-// The user should keep this in in mind while exploring these cores. 
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
 //
-// Redistribution and use in source and binary forms,
-// with or without modification of this file, are permitted under the terms of either
-//  (at the option of the user):
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
+// A PARTICULAR PURPOSE.
+//
+// Redistribution and use of source or resulting binaries, with or without modification
+// of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory, or at:
-// https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
-// https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
+//      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
+//      This will allow to generate bit files and not release the source code,
+//      as long as it attaches to an ADI device.
 //
 // ***************************************************************************
 // ***************************************************************************
diff --git a/library/axi_ad9361/altera/axi_ad9361_lvds_if.v b/library/axi_ad9361/altera/axi_ad9361_lvds_if.v
index d7f51750d..68c1b666b 100644
--- a/library/axi_ad9361/altera/axi_ad9361_lvds_if.v
+++ b/library/axi_ad9361/altera/axi_ad9361_lvds_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/altera/axi_ad9361_serdes_clk.v b/library/axi_ad9361/altera/axi_ad9361_serdes_clk.v
index 6e21f54d0..aabb68649 100644
--- a/library/axi_ad9361/altera/axi_ad9361_serdes_clk.v
+++ b/library/axi_ad9361/altera/axi_ad9361_serdes_clk.v
@@ -2,21 +2,33 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// Each core or library found in this collection may have its own licensing terms. 
-// The user should keep this in in mind while exploring these cores. 
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
 //
-// Redistribution and use in source and binary forms,
-// with or without modification of this file, are permitted under the terms of either
-//  (at the option of the user):
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
+// A PARTICULAR PURPOSE.
+//
+// Redistribution and use of source or resulting binaries, with or without modification
+// of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory, or at:
-// https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
-// https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
+//      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
+//      This will allow to generate bit files and not release the source code,
+//      as long as it attaches to an ADI device.
 //
 // ***************************************************************************
 // ***************************************************************************
diff --git a/library/axi_ad9361/altera/axi_ad9361_serdes_in.v b/library/axi_ad9361/altera/axi_ad9361_serdes_in.v
index 54af3627e..5863006d1 100644
--- a/library/axi_ad9361/altera/axi_ad9361_serdes_in.v
+++ b/library/axi_ad9361/altera/axi_ad9361_serdes_in.v
@@ -2,21 +2,33 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// Each core or library found in this collection may have its own licensing terms. 
-// The user should keep this in in mind while exploring these cores. 
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
 //
-// Redistribution and use in source and binary forms,
-// with or without modification of this file, are permitted under the terms of either
-//  (at the option of the user):
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
+// A PARTICULAR PURPOSE.
+//
+// Redistribution and use of source or resulting binaries, with or without modification
+// of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory, or at:
-// https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
-// https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
+//      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
+//      This will allow to generate bit files and not release the source code,
+//      as long as it attaches to an ADI device.
 //
 // ***************************************************************************
 // ***************************************************************************
diff --git a/library/axi_ad9361/altera/axi_ad9361_serdes_out.v b/library/axi_ad9361/altera/axi_ad9361_serdes_out.v
index 7e271083f..f771f27ef 100644
--- a/library/axi_ad9361/altera/axi_ad9361_serdes_out.v
+++ b/library/axi_ad9361/altera/axi_ad9361_serdes_out.v
@@ -2,21 +2,33 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// Each core or library found in this collection may have its own licensing terms. 
-// The user should keep this in in mind while exploring these cores. 
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
 //
-// Redistribution and use in source and binary forms,
-// with or without modification of this file, are permitted under the terms of either
-//  (at the option of the user):
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
+// A PARTICULAR PURPOSE.
+//
+// Redistribution and use of source or resulting binaries, with or without modification
+// of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory, or at:
-// https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
-// https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
+//      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
+//      This will allow to generate bit files and not release the source code,
+//      as long as it attaches to an ADI device.
 //
 // ***************************************************************************
 // ***************************************************************************
diff --git a/library/axi_ad9361/axi_ad9361.v b/library/axi_ad9361/axi_ad9361.v
index 6df191a0f..e96c32a26 100644
--- a/library/axi_ad9361/axi_ad9361.v
+++ b/library/axi_ad9361/axi_ad9361.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/axi_ad9361_rx.v b/library/axi_ad9361/axi_ad9361_rx.v
index a082fd113..cf7d42c2d 100644
--- a/library/axi_ad9361/axi_ad9361_rx.v
+++ b/library/axi_ad9361/axi_ad9361_rx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/axi_ad9361_rx_channel.v b/library/axi_ad9361/axi_ad9361_rx_channel.v
index feaf58bcc..476e4cd72 100644
--- a/library/axi_ad9361/axi_ad9361_rx_channel.v
+++ b/library/axi_ad9361/axi_ad9361_rx_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/axi_ad9361_rx_pnmon.v b/library/axi_ad9361/axi_ad9361_rx_pnmon.v
index 3e87d7d37..f24b778ff 100644
--- a/library/axi_ad9361/axi_ad9361_rx_pnmon.v
+++ b/library/axi_ad9361/axi_ad9361_rx_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/axi_ad9361_tdd.v b/library/axi_ad9361/axi_ad9361_tdd.v
index 5e271a800..768baf651 100644
--- a/library/axi_ad9361/axi_ad9361_tdd.v
+++ b/library/axi_ad9361/axi_ad9361_tdd.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/axi_ad9361_tdd_if.v b/library/axi_ad9361/axi_ad9361_tdd_if.v
index 8fde0f513..477aed25e 100644
--- a/library/axi_ad9361/axi_ad9361_tdd_if.v
+++ b/library/axi_ad9361/axi_ad9361_tdd_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/axi_ad9361_tx.v b/library/axi_ad9361/axi_ad9361_tx.v
index 97b5a9900..d7e489aee 100644
--- a/library/axi_ad9361/axi_ad9361_tx.v
+++ b/library/axi_ad9361/axi_ad9361_tx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/axi_ad9361_tx_channel.v b/library/axi_ad9361/axi_ad9361_tx_channel.v
index d328c568d..745d35d84 100644
--- a/library/axi_ad9361/axi_ad9361_tx_channel.v
+++ b/library/axi_ad9361/axi_ad9361_tx_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v b/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v
index 4229fad7d..b2f08cfaf 100644
--- a/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v
+++ b/library/axi_ad9361/xilinx/axi_ad9361_cmos_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9361/xilinx/axi_ad9361_lvds_if.v b/library/axi_ad9361/xilinx/axi_ad9361_lvds_if.v
index e37950ccf..72c4abc4a 100644
--- a/library/axi_ad9361/xilinx/axi_ad9361_lvds_if.v
+++ b/library/axi_ad9361/xilinx/axi_ad9361_lvds_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9371/axi_ad9371.v b/library/axi_ad9371/axi_ad9371.v
index 1c479ef20..e2b6ea781 100644
--- a/library/axi_ad9371/axi_ad9371.v
+++ b/library/axi_ad9371/axi_ad9371.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9371/axi_ad9371_if.v b/library/axi_ad9371/axi_ad9371_if.v
index 93ba1ac1f..e5a29bfe7 100644
--- a/library/axi_ad9371/axi_ad9371_if.v
+++ b/library/axi_ad9371/axi_ad9371_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9371/axi_ad9371_rx.v b/library/axi_ad9371/axi_ad9371_rx.v
index 9039e5c97..d6d1f119f 100644
--- a/library/axi_ad9371/axi_ad9371_rx.v
+++ b/library/axi_ad9371/axi_ad9371_rx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9371/axi_ad9371_rx_channel.v b/library/axi_ad9371/axi_ad9371_rx_channel.v
index 1a08b218f..0a0d56e0d 100644
--- a/library/axi_ad9371/axi_ad9371_rx_channel.v
+++ b/library/axi_ad9371/axi_ad9371_rx_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9371/axi_ad9371_rx_os.v b/library/axi_ad9371/axi_ad9371_rx_os.v
index 7a55c8b32..aeb445737 100644
--- a/library/axi_ad9371/axi_ad9371_rx_os.v
+++ b/library/axi_ad9371/axi_ad9371_rx_os.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9371/axi_ad9371_tx.v b/library/axi_ad9371/axi_ad9371_tx.v
index fc8b1913d..e49f1e9e0 100644
--- a/library/axi_ad9371/axi_ad9371_tx.v
+++ b/library/axi_ad9371/axi_ad9371_tx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9371/axi_ad9371_tx_channel.v b/library/axi_ad9371/axi_ad9371_tx_channel.v
index cbf6d925f..b69b4cc4d 100644
--- a/library/axi_ad9371/axi_ad9371_tx_channel.v
+++ b/library/axi_ad9371/axi_ad9371_tx_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9434/axi_ad9434.v b/library/axi_ad9434/axi_ad9434.v
index ac2ea2551..9ecfedb5a 100644
--- a/library/axi_ad9434/axi_ad9434.v
+++ b/library/axi_ad9434/axi_ad9434.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9434/axi_ad9434_core.v b/library/axi_ad9434/axi_ad9434_core.v
index dbbedcfae..da4a1fe56 100644
--- a/library/axi_ad9434/axi_ad9434_core.v
+++ b/library/axi_ad9434/axi_ad9434_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9434/axi_ad9434_if.v b/library/axi_ad9434/axi_ad9434_if.v
index 2987d6807..dc68f137a 100644
--- a/library/axi_ad9434/axi_ad9434_if.v
+++ b/library/axi_ad9434/axi_ad9434_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9434/axi_ad9434_pnmon.v b/library/axi_ad9434/axi_ad9434_pnmon.v
index 1e89475c9..153a057c1 100644
--- a/library/axi_ad9434/axi_ad9434_pnmon.v
+++ b/library/axi_ad9434/axi_ad9434_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9467/axi_ad9467.v b/library/axi_ad9467/axi_ad9467.v
index 49cdf88af..540f17279 100644
--- a/library/axi_ad9467/axi_ad9467.v
+++ b/library/axi_ad9467/axi_ad9467.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9467/axi_ad9467_channel.v b/library/axi_ad9467/axi_ad9467_channel.v
index dd707c3d8..4a43efd4f 100644
--- a/library/axi_ad9467/axi_ad9467_channel.v
+++ b/library/axi_ad9467/axi_ad9467_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9467/axi_ad9467_if.v b/library/axi_ad9467/axi_ad9467_if.v
index 6e90fefd1..6129d746e 100644
--- a/library/axi_ad9467/axi_ad9467_if.v
+++ b/library/axi_ad9467/axi_ad9467_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9467/axi_ad9467_pnmon.v b/library/axi_ad9467/axi_ad9467_pnmon.v
index 691196f73..bd212a66f 100644
--- a/library/axi_ad9467/axi_ad9467_pnmon.v
+++ b/library/axi_ad9467/axi_ad9467_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9625/axi_ad9625.v b/library/axi_ad9625/axi_ad9625.v
index e7d20c74e..fe635cd50 100644
--- a/library/axi_ad9625/axi_ad9625.v
+++ b/library/axi_ad9625/axi_ad9625.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9625/axi_ad9625_channel.v b/library/axi_ad9625/axi_ad9625_channel.v
index 1e1757fec..bc276c96e 100644
--- a/library/axi_ad9625/axi_ad9625_channel.v
+++ b/library/axi_ad9625/axi_ad9625_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9625/axi_ad9625_if.v b/library/axi_ad9625/axi_ad9625_if.v
index dca976cab..bdbec8aba 100644
--- a/library/axi_ad9625/axi_ad9625_if.v
+++ b/library/axi_ad9625/axi_ad9625_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9625/axi_ad9625_pnmon.v b/library/axi_ad9625/axi_ad9625_pnmon.v
index c2851930a..38570c246 100644
--- a/library/axi_ad9625/axi_ad9625_pnmon.v
+++ b/library/axi_ad9625/axi_ad9625_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9643/axi_ad9643.v b/library/axi_ad9643/axi_ad9643.v
index ba5733fcc..e264346ab 100644
--- a/library/axi_ad9643/axi_ad9643.v
+++ b/library/axi_ad9643/axi_ad9643.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9643/axi_ad9643_channel.v b/library/axi_ad9643/axi_ad9643_channel.v
index a22e04fd1..0a6bc15f9 100644
--- a/library/axi_ad9643/axi_ad9643_channel.v
+++ b/library/axi_ad9643/axi_ad9643_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9643/axi_ad9643_if.v b/library/axi_ad9643/axi_ad9643_if.v
index d0e015179..a903bf2db 100644
--- a/library/axi_ad9643/axi_ad9643_if.v
+++ b/library/axi_ad9643/axi_ad9643_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9643/axi_ad9643_pnmon.v b/library/axi_ad9643/axi_ad9643_pnmon.v
index e88b1335e..0bf87882d 100644
--- a/library/axi_ad9643/axi_ad9643_pnmon.v
+++ b/library/axi_ad9643/axi_ad9643_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9652/axi_ad9652.v b/library/axi_ad9652/axi_ad9652.v
index 32ef5aa2a..4d636131d 100644
--- a/library/axi_ad9652/axi_ad9652.v
+++ b/library/axi_ad9652/axi_ad9652.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9652/axi_ad9652_channel.v b/library/axi_ad9652/axi_ad9652_channel.v
index 138508a08..12093a64e 100644
--- a/library/axi_ad9652/axi_ad9652_channel.v
+++ b/library/axi_ad9652/axi_ad9652_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9652/axi_ad9652_if.v b/library/axi_ad9652/axi_ad9652_if.v
index 84f0a4bd6..d79ec8055 100644
--- a/library/axi_ad9652/axi_ad9652_if.v
+++ b/library/axi_ad9652/axi_ad9652_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9652/axi_ad9652_pnmon.v b/library/axi_ad9652/axi_ad9652_pnmon.v
index 4ef62bbee..10436291b 100644
--- a/library/axi_ad9652/axi_ad9652_pnmon.v
+++ b/library/axi_ad9652/axi_ad9652_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9671/axi_ad9671.v b/library/axi_ad9671/axi_ad9671.v
index 2aeb81a78..221ff1e1e 100644
--- a/library/axi_ad9671/axi_ad9671.v
+++ b/library/axi_ad9671/axi_ad9671.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9671/axi_ad9671_channel.v b/library/axi_ad9671/axi_ad9671_channel.v
index f2a4cf3b6..9b34f6fd1 100644
--- a/library/axi_ad9671/axi_ad9671_channel.v
+++ b/library/axi_ad9671/axi_ad9671_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9671/axi_ad9671_if.v b/library/axi_ad9671/axi_ad9671_if.v
index 071999d07..2543bdd38 100644
--- a/library/axi_ad9671/axi_ad9671_if.v
+++ b/library/axi_ad9671/axi_ad9671_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9671/axi_ad9671_pnmon.v b/library/axi_ad9671/axi_ad9671_pnmon.v
index fea4f051d..e235c1a02 100644
--- a/library/axi_ad9671/axi_ad9671_pnmon.v
+++ b/library/axi_ad9671/axi_ad9671_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9680/axi_ad9680.v b/library/axi_ad9680/axi_ad9680.v
index 420ec0963..7011adce5 100644
--- a/library/axi_ad9680/axi_ad9680.v
+++ b/library/axi_ad9680/axi_ad9680.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9680/axi_ad9680_channel.v b/library/axi_ad9680/axi_ad9680_channel.v
index f84fb9b03..91be6cbe8 100644
--- a/library/axi_ad9680/axi_ad9680_channel.v
+++ b/library/axi_ad9680/axi_ad9680_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9680/axi_ad9680_if.v b/library/axi_ad9680/axi_ad9680_if.v
index 836eeea2f..8bfa89854 100644
--- a/library/axi_ad9680/axi_ad9680_if.v
+++ b/library/axi_ad9680/axi_ad9680_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9680/axi_ad9680_pnmon.v b/library/axi_ad9680/axi_ad9680_pnmon.v
index 48966a96a..e64fbb63c 100644
--- a/library/axi_ad9680/axi_ad9680_pnmon.v
+++ b/library/axi_ad9680/axi_ad9680_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9684/axi_ad9684.v b/library/axi_ad9684/axi_ad9684.v
index 176d0b1af..4bea82e3f 100644
--- a/library/axi_ad9684/axi_ad9684.v
+++ b/library/axi_ad9684/axi_ad9684.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9684/axi_ad9684_channel.v b/library/axi_ad9684/axi_ad9684_channel.v
index e0424d8cc..a3b36c7ef 100644
--- a/library/axi_ad9684/axi_ad9684_channel.v
+++ b/library/axi_ad9684/axi_ad9684_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9684/axi_ad9684_if.v b/library/axi_ad9684/axi_ad9684_if.v
index 3b5d690d2..878553f8c 100644
--- a/library/axi_ad9684/axi_ad9684_if.v
+++ b/library/axi_ad9684/axi_ad9684_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9684/axi_ad9684_pnmon.v b/library/axi_ad9684/axi_ad9684_pnmon.v
index e5f43e7b9..c1f64a288 100644
--- a/library/axi_ad9684/axi_ad9684_pnmon.v
+++ b/library/axi_ad9684/axi_ad9684_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9739a/axi_ad9739a.v b/library/axi_ad9739a/axi_ad9739a.v
index 6f14b8ec6..58132f6f2 100644
--- a/library/axi_ad9739a/axi_ad9739a.v
+++ b/library/axi_ad9739a/axi_ad9739a.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9739a/axi_ad9739a_channel.v b/library/axi_ad9739a/axi_ad9739a_channel.v
index 995d6f607..d9e923b30 100644
--- a/library/axi_ad9739a/axi_ad9739a_channel.v
+++ b/library/axi_ad9739a/axi_ad9739a_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9739a/axi_ad9739a_core.v b/library/axi_ad9739a/axi_ad9739a_core.v
index e5b944bc4..09efb8cd8 100644
--- a/library/axi_ad9739a/axi_ad9739a_core.v
+++ b/library/axi_ad9739a/axi_ad9739a_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9739a/axi_ad9739a_if.v b/library/axi_ad9739a/axi_ad9739a_if.v
index b51a03c23..43184d9d6 100644
--- a/library/axi_ad9739a/axi_ad9739a_if.v
+++ b/library/axi_ad9739a/axi_ad9739a_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9963/axi_ad9963.v b/library/axi_ad9963/axi_ad9963.v
index effa4c2c4..eb9a5e842 100644
--- a/library/axi_ad9963/axi_ad9963.v
+++ b/library/axi_ad9963/axi_ad9963.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9963/axi_ad9963_if.v b/library/axi_ad9963/axi_ad9963_if.v
index a2aea7f27..877888d00 100644
--- a/library/axi_ad9963/axi_ad9963_if.v
+++ b/library/axi_ad9963/axi_ad9963_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9963/axi_ad9963_rx.v b/library/axi_ad9963/axi_ad9963_rx.v
index f50bef763..a6c82dbe8 100644
--- a/library/axi_ad9963/axi_ad9963_rx.v
+++ b/library/axi_ad9963/axi_ad9963_rx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9963/axi_ad9963_rx_channel.v b/library/axi_ad9963/axi_ad9963_rx_channel.v
index a33626526..07d74619e 100644
--- a/library/axi_ad9963/axi_ad9963_rx_channel.v
+++ b/library/axi_ad9963/axi_ad9963_rx_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9963/axi_ad9963_rx_pnmon.v b/library/axi_ad9963/axi_ad9963_rx_pnmon.v
index 4e9dfc528..b71933dfa 100644
--- a/library/axi_ad9963/axi_ad9963_rx_pnmon.v
+++ b/library/axi_ad9963/axi_ad9963_rx_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9963/axi_ad9963_tx.v b/library/axi_ad9963/axi_ad9963_tx.v
index ded6f67e5..ec961d438 100644
--- a/library/axi_ad9963/axi_ad9963_tx.v
+++ b/library/axi_ad9963/axi_ad9963_tx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_ad9963/axi_ad9963_tx_channel.v b/library/axi_ad9963/axi_ad9963_tx_channel.v
index 48daef7a1..774b9b849 100644
--- a/library/axi_ad9963/axi_ad9963_tx_channel.v
+++ b/library/axi_ad9963/axi_ad9963_tx_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_adc_decimate/axi_adc_decimate.v b/library/axi_adc_decimate/axi_adc_decimate.v
index cd6f18395..3aff82c45 100644
--- a/library/axi_adc_decimate/axi_adc_decimate.v
+++ b/library/axi_adc_decimate/axi_adc_decimate.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_adc_decimate/axi_adc_decimate_filter.v b/library/axi_adc_decimate/axi_adc_decimate_filter.v
index 50a849624..a7261c80f 100644
--- a/library/axi_adc_decimate/axi_adc_decimate_filter.v
+++ b/library/axi_adc_decimate/axi_adc_decimate_filter.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_adc_decimate/axi_adc_decimate_reg.v b/library/axi_adc_decimate/axi_adc_decimate_reg.v
index ec4210ec5..09d6f58cf 100644
--- a/library/axi_adc_decimate/axi_adc_decimate_reg.v
+++ b/library/axi_adc_decimate/axi_adc_decimate_reg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_adc_decimate/cic_decim.v b/library/axi_adc_decimate/cic_decim.v
index ad214a216..33258568a 100644
--- a/library/axi_adc_decimate/cic_decim.v
+++ b/library/axi_adc_decimate/cic_decim.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_adc_decimate/fir_decim.v b/library/axi_adc_decimate/fir_decim.v
index 09a7966a9..1e67f0fa6 100644
--- a/library/axi_adc_decimate/fir_decim.v
+++ b/library/axi_adc_decimate/fir_decim.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_adc_trigger/axi_adc_trigger.v b/library/axi_adc_trigger/axi_adc_trigger.v
index d6d0c8ed2..9d3555ec9 100644
--- a/library/axi_adc_trigger/axi_adc_trigger.v
+++ b/library/axi_adc_trigger/axi_adc_trigger.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_adc_trigger/axi_adc_trigger_reg.v b/library/axi_adc_trigger/axi_adc_trigger_reg.v
index 8dec52c13..8ecd6b204 100644
--- a/library/axi_adc_trigger/axi_adc_trigger_reg.v
+++ b/library/axi_adc_trigger/axi_adc_trigger_reg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_clkgen/axi_clkgen.v b/library/axi_clkgen/axi_clkgen.v
index 5aeff0bd4..920420961 100644
--- a/library/axi_clkgen/axi_clkgen.v
+++ b/library/axi_clkgen/axi_clkgen.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dac_interpolate/axi_dac_interpolate.v b/library/axi_dac_interpolate/axi_dac_interpolate.v
index 0acaee8d1..e09146eb2 100644
--- a/library/axi_dac_interpolate/axi_dac_interpolate.v
+++ b/library/axi_dac_interpolate/axi_dac_interpolate.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dac_interpolate/axi_dac_interpolate_filter.v b/library/axi_dac_interpolate/axi_dac_interpolate_filter.v
index b71054e25..36f5fc1b2 100644
--- a/library/axi_dac_interpolate/axi_dac_interpolate_filter.v
+++ b/library/axi_dac_interpolate/axi_dac_interpolate_filter.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dac_interpolate/axi_dac_interpolate_reg.v b/library/axi_dac_interpolate/axi_dac_interpolate_reg.v
index 4f43597fd..d8be8da03 100644
--- a/library/axi_dac_interpolate/axi_dac_interpolate_reg.v
+++ b/library/axi_dac_interpolate/axi_dac_interpolate_reg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/2d_transfer.v b/library/axi_dmac/2d_transfer.v
index 50b007d02..bdf22db41 100644
--- a/library/axi_dmac/2d_transfer.v
+++ b/library/axi_dmac/2d_transfer.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/address_generator.v b/library/axi_dmac/address_generator.v
index 1d97bba74..bd1d69db7 100644
--- a/library/axi_dmac/address_generator.v
+++ b/library/axi_dmac/address_generator.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/axi_dmac.v b/library/axi_dmac/axi_dmac.v
index 9c189a88d..3b2158c65 100644
--- a/library/axi_dmac/axi_dmac.v
+++ b/library/axi_dmac/axi_dmac.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/axi_register_slice.v b/library/axi_dmac/axi_register_slice.v
index 2e926fd3a..1c6ce7782 100644
--- a/library/axi_dmac/axi_register_slice.v
+++ b/library/axi_dmac/axi_register_slice.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/data_mover.v b/library/axi_dmac/data_mover.v
index 69c12caf7..05884b320 100644
--- a/library/axi_dmac/data_mover.v
+++ b/library/axi_dmac/data_mover.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/dest_axi_mm.v b/library/axi_dmac/dest_axi_mm.v
index 9be863d08..1f5e36888 100644
--- a/library/axi_dmac/dest_axi_mm.v
+++ b/library/axi_dmac/dest_axi_mm.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/dest_axi_stream.v b/library/axi_dmac/dest_axi_stream.v
index 0899e38c2..1c660e005 100644
--- a/library/axi_dmac/dest_axi_stream.v
+++ b/library/axi_dmac/dest_axi_stream.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/dest_fifo_inf.v b/library/axi_dmac/dest_fifo_inf.v
index 653b1eecc..9a1152c95 100644
--- a/library/axi_dmac/dest_fifo_inf.v
+++ b/library/axi_dmac/dest_fifo_inf.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/request_arb.v b/library/axi_dmac/request_arb.v
index 28c46de6a..3eb42769d 100644
--- a/library/axi_dmac/request_arb.v
+++ b/library/axi_dmac/request_arb.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/request_generator.v b/library/axi_dmac/request_generator.v
index 2435018d3..c2999eb54 100644
--- a/library/axi_dmac/request_generator.v
+++ b/library/axi_dmac/request_generator.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/response_generator.v b/library/axi_dmac/response_generator.v
index 142522c28..8cef2ac7e 100644
--- a/library/axi_dmac/response_generator.v
+++ b/library/axi_dmac/response_generator.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/response_handler.v b/library/axi_dmac/response_handler.v
index f6636de34..db7508f26 100644
--- a/library/axi_dmac/response_handler.v
+++ b/library/axi_dmac/response_handler.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/splitter.v b/library/axi_dmac/splitter.v
index 2fd578627..052969d12 100644
--- a/library/axi_dmac/splitter.v
+++ b/library/axi_dmac/splitter.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/src_axi_mm.v b/library/axi_dmac/src_axi_mm.v
index ff9668079..83e93aba3 100644
--- a/library/axi_dmac/src_axi_mm.v
+++ b/library/axi_dmac/src_axi_mm.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/src_axi_stream.v b/library/axi_dmac/src_axi_stream.v
index 709215a9b..fee466957 100644
--- a/library/axi_dmac/src_axi_stream.v
+++ b/library/axi_dmac/src_axi_stream.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_dmac/src_fifo_inf.v b/library/axi_dmac/src_fifo_inf.v
index b7e461ddf..b3970ebcb 100644
--- a/library/axi_dmac/src_fifo_inf.v
+++ b/library/axi_dmac/src_fifo_inf.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v b/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v
index b97e018f4..c1d76555a 100644
--- a/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v
+++ b/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_fmcadc5_sync/axi_fmcadc5_sync_calcor.v b/library/axi_fmcadc5_sync/axi_fmcadc5_sync_calcor.v
index 5adafc686..40e141a35 100644
--- a/library/axi_fmcadc5_sync/axi_fmcadc5_sync_calcor.v
+++ b/library/axi_fmcadc5_sync/axi_fmcadc5_sync_calcor.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_generic_adc/axi_generic_adc.v b/library/axi_generic_adc/axi_generic_adc.v
index db588b957..f5e49a080 100644
--- a/library/axi_generic_adc/axi_generic_adc.v
+++ b/library/axi_generic_adc/axi_generic_adc.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_gpreg/axi_gpreg.v b/library/axi_gpreg/axi_gpreg.v
index d36c4ae2d..8a85ea378 100644
--- a/library/axi_gpreg/axi_gpreg.v
+++ b/library/axi_gpreg/axi_gpreg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_gpreg/axi_gpreg_clock_mon.v b/library/axi_gpreg/axi_gpreg_clock_mon.v
index be6272039..90b9e56da 100644
--- a/library/axi_gpreg/axi_gpreg_clock_mon.v
+++ b/library/axi_gpreg/axi_gpreg_clock_mon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_gpreg/axi_gpreg_io.v b/library/axi_gpreg/axi_gpreg_io.v
index 2d5da2afd..47795bcbc 100644
--- a/library/axi_gpreg/axi_gpreg_io.v
+++ b/library/axi_gpreg/axi_gpreg_io.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_rx/axi_hdmi_rx.v b/library/axi_hdmi_rx/axi_hdmi_rx.v
index 7ef96b4f4..c642015c0 100644
--- a/library/axi_hdmi_rx/axi_hdmi_rx.v
+++ b/library/axi_hdmi_rx/axi_hdmi_rx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_rx/axi_hdmi_rx_core.v b/library/axi_hdmi_rx/axi_hdmi_rx_core.v
index cb117e23e..0f9d8b692 100644
--- a/library/axi_hdmi_rx/axi_hdmi_rx_core.v
+++ b/library/axi_hdmi_rx/axi_hdmi_rx_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_rx/axi_hdmi_rx_es.v b/library/axi_hdmi_rx/axi_hdmi_rx_es.v
index fcc206d05..af94f7981 100644
--- a/library/axi_hdmi_rx/axi_hdmi_rx_es.v
+++ b/library/axi_hdmi_rx/axi_hdmi_rx_es.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_rx/axi_hdmi_rx_tpm.v b/library/axi_hdmi_rx/axi_hdmi_rx_tpm.v
index c1fead5f4..6264cd426 100644
--- a/library/axi_hdmi_rx/axi_hdmi_rx_tpm.v
+++ b/library/axi_hdmi_rx/axi_hdmi_rx_tpm.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_tx/axi_hdmi_tx.v b/library/axi_hdmi_tx/axi_hdmi_tx.v
index 48defe9be..c83db9c9c 100644
--- a/library/axi_hdmi_tx/axi_hdmi_tx.v
+++ b/library/axi_hdmi_tx/axi_hdmi_tx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_tx/axi_hdmi_tx_core.v b/library/axi_hdmi_tx/axi_hdmi_tx_core.v
index fa2b62f6b..2297941c2 100644
--- a/library/axi_hdmi_tx/axi_hdmi_tx_core.v
+++ b/library/axi_hdmi_tx/axi_hdmi_tx_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_tx/axi_hdmi_tx_es.v b/library/axi_hdmi_tx/axi_hdmi_tx_es.v
index 87d7fe10f..7c7ed95aa 100644
--- a/library/axi_hdmi_tx/axi_hdmi_tx_es.v
+++ b/library/axi_hdmi_tx/axi_hdmi_tx_es.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_hdmi_tx/axi_hdmi_tx_vdma.v b/library/axi_hdmi_tx/axi_hdmi_tx_vdma.v
index cf7e9c337..593ef5b97 100644
--- a/library/axi_hdmi_tx/axi_hdmi_tx_vdma.v
+++ b/library/axi_hdmi_tx/axi_hdmi_tx_vdma.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_i2s_adi/axi_i2s_adi.vhd b/library/axi_i2s_adi/axi_i2s_adi.vhd
index fdbe6b3c6..9062ca380 100644
--- a/library/axi_i2s_adi/axi_i2s_adi.vhd
+++ b/library/axi_i2s_adi/axi_i2s_adi.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_i2s_adi/fifo_synchronizer.vhd b/library/axi_i2s_adi/fifo_synchronizer.vhd
index d1c1da974..4d95daeef 100644
--- a/library/axi_i2s_adi/fifo_synchronizer.vhd
+++ b/library/axi_i2s_adi/fifo_synchronizer.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_i2s_adi/i2s_clkgen.vhd b/library/axi_i2s_adi/i2s_clkgen.vhd
index bae52ddce..15f7c3cac 100644
--- a/library/axi_i2s_adi/i2s_clkgen.vhd
+++ b/library/axi_i2s_adi/i2s_clkgen.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_i2s_adi/i2s_controller.vhd b/library/axi_i2s_adi/i2s_controller.vhd
index b172d48d9..324ba4737 100644
--- a/library/axi_i2s_adi/i2s_controller.vhd
+++ b/library/axi_i2s_adi/i2s_controller.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_i2s_adi/i2s_rx.vhd b/library/axi_i2s_adi/i2s_rx.vhd
index d7a66bc8b..54f72fb77 100644
--- a/library/axi_i2s_adi/i2s_rx.vhd
+++ b/library/axi_i2s_adi/i2s_rx.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_i2s_adi/i2s_tx.vhd b/library/axi_i2s_adi/i2s_tx.vhd
index 605cb5687..cabe5ec29 100644
--- a/library/axi_i2s_adi/i2s_tx.vhd
+++ b/library/axi_i2s_adi/i2s_tx.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_intr_monitor/axi_intr_monitor.v b/library/axi_intr_monitor/axi_intr_monitor.v
index 94d600d66..eb7e68146 100644
--- a/library/axi_intr_monitor/axi_intr_monitor.v
+++ b/library/axi_intr_monitor/axi_intr_monitor.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_logic_analyzer/axi_logic_analyzer.v b/library/axi_logic_analyzer/axi_logic_analyzer.v
index 2c3e73c74..da1292825 100644
--- a/library/axi_logic_analyzer/axi_logic_analyzer.v
+++ b/library/axi_logic_analyzer/axi_logic_analyzer.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_logic_analyzer/axi_logic_analyzer_reg.v b/library/axi_logic_analyzer/axi_logic_analyzer_reg.v
index 9a7fdbd41..da052a35e 100644
--- a/library/axi_logic_analyzer/axi_logic_analyzer_reg.v
+++ b/library/axi_logic_analyzer/axi_logic_analyzer_reg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v b/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v
index e4fa7477f..48e03880e 100644
--- a/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v
+++ b/library/axi_logic_analyzer/axi_logic_analyzer_trigger.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_controller/axi_mc_controller.v b/library/axi_mc_controller/axi_mc_controller.v
index 4bbdb29c3..af020c2a3 100644
--- a/library/axi_mc_controller/axi_mc_controller.v
+++ b/library/axi_mc_controller/axi_mc_controller.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_controller/control_registers.v b/library/axi_mc_controller/control_registers.v
index a16d84e2f..bb7f1bd44 100644
--- a/library/axi_mc_controller/control_registers.v
+++ b/library/axi_mc_controller/control_registers.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_controller/delay.v b/library/axi_mc_controller/delay.v
index fe1db5c48..5ea79ca0e 100644
--- a/library/axi_mc_controller/delay.v
+++ b/library/axi_mc_controller/delay.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_controller/motor_driver.v b/library/axi_mc_controller/motor_driver.v
index 7701142dc..db1a87764 100644
--- a/library/axi_mc_controller/motor_driver.v
+++ b/library/axi_mc_controller/motor_driver.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_current_monitor/ad7401.v b/library/axi_mc_current_monitor/ad7401.v
index 9b34a11f6..b506269fd 100644
--- a/library/axi_mc_current_monitor/ad7401.v
+++ b/library/axi_mc_current_monitor/ad7401.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_current_monitor/axi_mc_current_monitor.v b/library/axi_mc_current_monitor/axi_mc_current_monitor.v
index cc65cad8c..9427a4bd7 100644
--- a/library/axi_mc_current_monitor/axi_mc_current_monitor.v
+++ b/library/axi_mc_current_monitor/axi_mc_current_monitor.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_current_monitor/dec256sinc24b.v b/library/axi_mc_current_monitor/dec256sinc24b.v
index 472b6524c..115d464c5 100644
--- a/library/axi_mc_current_monitor/dec256sinc24b.v
+++ b/library/axi_mc_current_monitor/dec256sinc24b.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_speed/axi_mc_speed.v b/library/axi_mc_speed/axi_mc_speed.v
index a69089bf8..f6be68397 100644
--- a/library/axi_mc_speed/axi_mc_speed.v
+++ b/library/axi_mc_speed/axi_mc_speed.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_speed/debouncer.v b/library/axi_mc_speed/debouncer.v
index b54f252b9..a37479fbb 100644
--- a/library/axi_mc_speed/debouncer.v
+++ b/library/axi_mc_speed/debouncer.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_speed/delay_30_degrees.v b/library/axi_mc_speed/delay_30_degrees.v
index f858dc11c..364ac39b0 100644
--- a/library/axi_mc_speed/delay_30_degrees.v
+++ b/library/axi_mc_speed/delay_30_degrees.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_mc_speed/speed_detector.v b/library/axi_mc_speed/speed_detector.v
index d2399ee7a..7518552f6 100644
--- a/library/axi_mc_speed/speed_detector.v
+++ b/library/axi_mc_speed/speed_detector.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_rd_wr_combiner/axi_rd_wr_combiner.v b/library/axi_rd_wr_combiner/axi_rd_wr_combiner.v
index 42eb31a31..b61ab2beb 100644
--- a/library/axi_rd_wr_combiner/axi_rd_wr_combiner.v
+++ b/library/axi_rd_wr_combiner/axi_rd_wr_combiner.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_spdif_rx/axi_spdif_rx.vhd b/library/axi_spdif_rx/axi_spdif_rx.vhd
index d63071b5b..d239955b1 100644
--- a/library/axi_spdif_rx/axi_spdif_rx.vhd
+++ b/library/axi_spdif_rx/axi_spdif_rx.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_spdif_tx/axi_spdif_tx.vhd b/library/axi_spdif_tx/axi_spdif_tx.vhd
index afe1f5da0..879842568 100644
--- a/library/axi_spdif_tx/axi_spdif_tx.vhd
+++ b/library/axi_spdif_tx/axi_spdif_tx.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/axi_usb_fx3/axi_usb_fx3.v b/library/axi_usb_fx3/axi_usb_fx3.v
index fa87ab6de..ef0e0eff4 100644
--- a/library/axi_usb_fx3/axi_usb_fx3.v
+++ b/library/axi_usb_fx3/axi_usb_fx3.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_usb_fx3/axi_usb_fx3_core.v b/library/axi_usb_fx3/axi_usb_fx3_core.v
index 842930794..9398bf0f3 100644
--- a/library/axi_usb_fx3/axi_usb_fx3_core.v
+++ b/library/axi_usb_fx3/axi_usb_fx3_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_usb_fx3/axi_usb_fx3_if.v b/library/axi_usb_fx3/axi_usb_fx3_if.v
index 0c3d7537a..bef27d76c 100644
--- a/library/axi_usb_fx3/axi_usb_fx3_if.v
+++ b/library/axi_usb_fx3/axi_usb_fx3_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/axi_usb_fx3/axi_usb_fx3_reg.v b/library/axi_usb_fx3/axi_usb_fx3_reg.v
index 2334517a4..3a80a627c 100644
--- a/library/axi_usb_fx3/axi_usb_fx3_reg.v
+++ b/library/axi_usb_fx3/axi_usb_fx3_reg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v b/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v
index e113ad682..a6764aafc 100644
--- a/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v
+++ b/library/cn0363/cn0363_dma_sequencer/cn0363_dma_sequencer.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v b/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v
index 96ee2e382..6f2fde062 100644
--- a/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v
+++ b/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_addsub.v b/library/common/ad_addsub.v
index 4a06f7393..4cbfdf353 100644
--- a/library/common/ad_addsub.v
+++ b/library/common/ad_addsub.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_axis_inf_rx.v b/library/common/ad_axis_inf_rx.v
index 8b67a8df4..87aed736e 100644
--- a/library/common/ad_axis_inf_rx.v
+++ b/library/common/ad_axis_inf_rx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_b2g.v b/library/common/ad_b2g.v
index 0f3c65be7..64177d621 100644
--- a/library/common/ad_b2g.v
+++ b/library/common/ad_b2g.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_csc_1.v b/library/common/ad_csc_1.v
index 74262ea5a..27503a844 100644
--- a/library/common/ad_csc_1.v
+++ b/library/common/ad_csc_1.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_csc_1_add.v b/library/common/ad_csc_1_add.v
index 564660413..239b7bfeb 100644
--- a/library/common/ad_csc_1_add.v
+++ b/library/common/ad_csc_1_add.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_csc_1_mul.v b/library/common/ad_csc_1_mul.v
index 3b79e9e95..733adf7f4 100644
--- a/library/common/ad_csc_1_mul.v
+++ b/library/common/ad_csc_1_mul.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_csc_CrYCb2RGB.v b/library/common/ad_csc_CrYCb2RGB.v
index ac538f112..11e962305 100644
--- a/library/common/ad_csc_CrYCb2RGB.v
+++ b/library/common/ad_csc_CrYCb2RGB.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_csc_RGB2CrYCb.v b/library/common/ad_csc_RGB2CrYCb.v
index eb7b6de94..9341910f9 100644
--- a/library/common/ad_csc_RGB2CrYCb.v
+++ b/library/common/ad_csc_RGB2CrYCb.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_datafmt.v b/library/common/ad_datafmt.v
index 75a55065e..bc1db8b00 100644
--- a/library/common/ad_datafmt.v
+++ b/library/common/ad_datafmt.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_dcfilter.v b/library/common/ad_dcfilter.v
index d5932a197..3cc221038 100644
--- a/library/common/ad_dcfilter.v
+++ b/library/common/ad_dcfilter.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_dds.v b/library/common/ad_dds.v
index 49f6f0829..c3ef30c4d 100644
--- a/library/common/ad_dds.v
+++ b/library/common/ad_dds.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_dds_1.v b/library/common/ad_dds_1.v
index 146ffc4f3..82da9893c 100644
--- a/library/common/ad_dds_1.v
+++ b/library/common/ad_dds_1.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_dds_sine.v b/library/common/ad_dds_sine.v
index 17ee98f00..190a9a41d 100644
--- a/library/common/ad_dds_sine.v
+++ b/library/common/ad_dds_sine.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_edge_detect.v b/library/common/ad_edge_detect.v
index ad77957d9..357604254 100644
--- a/library/common/ad_edge_detect.v
+++ b/library/common/ad_edge_detect.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_g2b.v b/library/common/ad_g2b.v
index fe3001ea4..dd818b411 100644
--- a/library/common/ad_g2b.v
+++ b/library/common/ad_g2b.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_gt_channel.v b/library/common/ad_gt_channel.v
index 1fb8a20d7..372615d59 100644
--- a/library/common/ad_gt_channel.v
+++ b/library/common/ad_gt_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_gt_channel_1.v b/library/common/ad_gt_channel_1.v
index 53be8f10b..cf57edf8b 100644
--- a/library/common/ad_gt_channel_1.v
+++ b/library/common/ad_gt_channel_1.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_gt_common.v b/library/common/ad_gt_common.v
index 2bfbc233c..827194ea0 100644
--- a/library/common/ad_gt_common.v
+++ b/library/common/ad_gt_common.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_gt_common_1.v b/library/common/ad_gt_common_1.v
index 3caf3c0c3..a0d755840 100644
--- a/library/common/ad_gt_common_1.v
+++ b/library/common/ad_gt_common_1.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_gt_es.v b/library/common/ad_gt_es.v
index 039fea18a..ddf16bf68 100644
--- a/library/common/ad_gt_es.v
+++ b/library/common/ad_gt_es.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_gt_es_axi.v b/library/common/ad_gt_es_axi.v
index 965da3c21..b7d4d9116 100644
--- a/library/common/ad_gt_es_axi.v
+++ b/library/common/ad_gt_es_axi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_iqcor.v b/library/common/ad_iqcor.v
index 4fa6fce57..ed6ca2a44 100644
--- a/library/common/ad_iqcor.v
+++ b/library/common/ad_iqcor.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_jesd_align.v b/library/common/ad_jesd_align.v
index 7d2fe9543..3ab09c57f 100644
--- a/library/common/ad_jesd_align.v
+++ b/library/common/ad_jesd_align.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_mem.v b/library/common/ad_mem.v
index 64c80e0c0..63a27e119 100644
--- a/library/common/ad_mem.v
+++ b/library/common/ad_mem.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_mem_asym.v b/library/common/ad_mem_asym.v
index 38902e3ef..ad2d1ee62 100644
--- a/library/common/ad_mem_asym.v
+++ b/library/common/ad_mem_asym.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_pnmon.v b/library/common/ad_pnmon.v
index e28fab491..b57372991 100644
--- a/library/common/ad_pnmon.v
+++ b/library/common/ad_pnmon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_rst.v b/library/common/ad_rst.v
index 2b56b6ef9..c03630498 100644
--- a/library/common/ad_rst.v
+++ b/library/common/ad_rst.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_ss_422to444.v b/library/common/ad_ss_422to444.v
index 6b7a2ef61..e0fdb84bb 100644
--- a/library/common/ad_ss_422to444.v
+++ b/library/common/ad_ss_422to444.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_ss_444to422.v b/library/common/ad_ss_444to422.v
index 44258631f..191bf7113 100644
--- a/library/common/ad_ss_444to422.v
+++ b/library/common/ad_ss_444to422.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_sysref_gen.v b/library/common/ad_sysref_gen.v
index 5eb9460d4..8a98bcd99 100644
--- a/library/common/ad_sysref_gen.v
+++ b/library/common/ad_sysref_gen.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_tdd_control.v b/library/common/ad_tdd_control.v
index 71d0df140..b57abfd22 100644
--- a/library/common/ad_tdd_control.v
+++ b/library/common/ad_tdd_control.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/ad_xcvr_rx_if.v b/library/common/ad_xcvr_rx_if.v
index b6bb80a1e..0a447dbb8 100644
--- a/library/common/ad_xcvr_rx_if.v
+++ b/library/common/ad_xcvr_rx_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/axi_ctrlif.vhd b/library/common/axi_ctrlif.vhd
index 27324b9bd..60e60c487 100644
--- a/library/common/axi_ctrlif.vhd
+++ b/library/common/axi_ctrlif.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/common/axi_streaming_dma_rx_fifo.vhd b/library/common/axi_streaming_dma_rx_fifo.vhd
index 1c554900a..7a353f472 100644
--- a/library/common/axi_streaming_dma_rx_fifo.vhd
+++ b/library/common/axi_streaming_dma_rx_fifo.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/common/axi_streaming_dma_tx_fifo.vhd b/library/common/axi_streaming_dma_tx_fifo.vhd
index ccb43858c..79c13c7be 100644
--- a/library/common/axi_streaming_dma_tx_fifo.vhd
+++ b/library/common/axi_streaming_dma_tx_fifo.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/common/dma_fifo.vhd b/library/common/dma_fifo.vhd
index 5389b7749..821009e67 100644
--- a/library/common/dma_fifo.vhd
+++ b/library/common/dma_fifo.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/common/pl330_dma_fifo.vhd b/library/common/pl330_dma_fifo.vhd
index bc3714f60..0352d64e2 100644
--- a/library/common/pl330_dma_fifo.vhd
+++ b/library/common/pl330_dma_fifo.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/common/sync_bits.v b/library/common/sync_bits.v
index 1c633920c..7bf791dc9 100644
--- a/library/common/sync_bits.v
+++ b/library/common/sync_bits.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/sync_gray.v b/library/common/sync_gray.v
index 04515e288..a336d72da 100644
--- a/library/common/sync_gray.v
+++ b/library/common/sync_gray.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_adc_channel.v b/library/common/up_adc_channel.v
index 0ded0429a..8c4ce22fe 100644
--- a/library/common/up_adc_channel.v
+++ b/library/common/up_adc_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_adc_common.v b/library/common/up_adc_common.v
index 8436354a8..b1fd6d067 100644
--- a/library/common/up_adc_common.v
+++ b/library/common/up_adc_common.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_axi.v b/library/common/up_axi.v
index 8747dbb64..df2f01eca 100644
--- a/library/common/up_axi.v
+++ b/library/common/up_axi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_clkgen.v b/library/common/up_clkgen.v
index 83fff950d..b8b671515 100644
--- a/library/common/up_clkgen.v
+++ b/library/common/up_clkgen.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_clock_mon.v b/library/common/up_clock_mon.v
index d2aeb32e0..354933dec 100644
--- a/library/common/up_clock_mon.v
+++ b/library/common/up_clock_mon.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_dac_channel.v b/library/common/up_dac_channel.v
index 97b689006..41ef93a32 100644
--- a/library/common/up_dac_channel.v
+++ b/library/common/up_dac_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_dac_common.v b/library/common/up_dac_common.v
index e6b7b8366..94b5c28b7 100644
--- a/library/common/up_dac_common.v
+++ b/library/common/up_dac_common.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_delay_cntrl.v b/library/common/up_delay_cntrl.v
index a24cc5ad9..0d1db2a37 100644
--- a/library/common/up_delay_cntrl.v
+++ b/library/common/up_delay_cntrl.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_gt.v b/library/common/up_gt.v
index 2961fa4d5..8a03d92b9 100644
--- a/library/common/up_gt.v
+++ b/library/common/up_gt.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_gt_channel.v b/library/common/up_gt_channel.v
index d25be3c96..87b0719aa 100644
--- a/library/common/up_gt_channel.v
+++ b/library/common/up_gt_channel.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_hdmi_rx.v b/library/common/up_hdmi_rx.v
index 46eacdf31..674a7e552 100644
--- a/library/common/up_hdmi_rx.v
+++ b/library/common/up_hdmi_rx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_hdmi_tx.v b/library/common/up_hdmi_tx.v
index 6b4da94c8..2c89756b4 100644
--- a/library/common/up_hdmi_tx.v
+++ b/library/common/up_hdmi_tx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_pmod.v b/library/common/up_pmod.v
index af469e27e..fd4bd5de5 100644
--- a/library/common/up_pmod.v
+++ b/library/common/up_pmod.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_tdd_cntrl.v b/library/common/up_tdd_cntrl.v
index 4a51709c6..a7e89c019 100644
--- a/library/common/up_tdd_cntrl.v
+++ b/library/common/up_tdd_cntrl.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_xfer_cntrl.v b/library/common/up_xfer_cntrl.v
index a2c5eef92..27e607b4f 100644
--- a/library/common/up_xfer_cntrl.v
+++ b/library/common/up_xfer_cntrl.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/up_xfer_status.v b/library/common/up_xfer_status.v
index a54c9fbf1..047526a7a 100644
--- a/library/common/up_xfer_status.v
+++ b/library/common/up_xfer_status.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/util_dacfifo_bypass.v b/library/common/util_dacfifo_bypass.v
index ba155e555..876a87a92 100644
--- a/library/common/util_dacfifo_bypass.v
+++ b/library/common/util_dacfifo_bypass.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/util_delay.v b/library/common/util_delay.v
index ee2963e4e..28a5e9eb9 100644
--- a/library/common/util_delay.v
+++ b/library/common/util_delay.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/common/util_pulse_gen.v b/library/common/util_pulse_gen.v
index 0a8d31b55..5e55ea0cf 100644
--- a/library/common/util_pulse_gen.v
+++ b/library/common/util_pulse_gen.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/cordic_demod/cordic_demod.v b/library/cordic_demod/cordic_demod.v
index d1932a7ea..bba529375 100644
--- a/library/cordic_demod/cordic_demod.v
+++ b/library/cordic_demod/cordic_demod.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/bist/prcfg_adc.v b/library/prcfg/bist/prcfg_adc.v
index b5c0c9bca..bb40b6a45 100644
--- a/library/prcfg/bist/prcfg_adc.v
+++ b/library/prcfg/bist/prcfg_adc.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/bist/prcfg_dac.v b/library/prcfg/bist/prcfg_dac.v
index 68d95b129..6c475d8fa 100644
--- a/library/prcfg/bist/prcfg_dac.v
+++ b/library/prcfg/bist/prcfg_dac.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/common/prcfg_top.v b/library/prcfg/common/prcfg_top.v
index e71cbf6dd..59fcba170 100644
--- a/library/prcfg/common/prcfg_top.v
+++ b/library/prcfg/common/prcfg_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/default/prcfg_adc.v b/library/prcfg/default/prcfg_adc.v
index 73e44335c..31434838d 100644
--- a/library/prcfg/default/prcfg_adc.v
+++ b/library/prcfg/default/prcfg_adc.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/default/prcfg_dac.v b/library/prcfg/default/prcfg_dac.v
index 3c506ea00..4691c42e4 100644
--- a/library/prcfg/default/prcfg_dac.v
+++ b/library/prcfg/default/prcfg_dac.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/qpsk/prcfg_adc.v b/library/prcfg/qpsk/prcfg_adc.v
index ef2fa4b99..1de150035 100644
--- a/library/prcfg/qpsk/prcfg_adc.v
+++ b/library/prcfg/qpsk/prcfg_adc.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/qpsk/prcfg_dac.v b/library/prcfg/qpsk/prcfg_dac.v
index 5c4bb6c6b..d8323bb5c 100644
--- a/library/prcfg/qpsk/prcfg_dac.v
+++ b/library/prcfg/qpsk/prcfg_dac.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/qpsk/qpsk_demod.v b/library/prcfg/qpsk/qpsk_demod.v
index 1d91bd216..35814e7b1 100644
--- a/library/prcfg/qpsk/qpsk_demod.v
+++ b/library/prcfg/qpsk/qpsk_demod.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/prcfg/qpsk/qpsk_mod.v b/library/prcfg/qpsk/qpsk_mod.v
index f513dd5bb..e6f6dceab 100644
--- a/library/prcfg/qpsk/qpsk_mod.v
+++ b/library/prcfg/qpsk/qpsk_mod.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine.v b/library/spi_engine/axi_spi_engine/axi_spi_engine.v
index 6fdf92f3b..a4bdeef5a 100644
--- a/library/spi_engine/axi_spi_engine/axi_spi_engine.v
+++ b/library/spi_engine/axi_spi_engine/axi_spi_engine.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/spi_engine/spi_engine_execution/spi_engine_execution.v b/library/spi_engine/spi_engine_execution/spi_engine_execution.v
index bbe30c3f3..b65a4f3b4 100644
--- a/library/spi_engine/spi_engine_execution/spi_engine_execution.v
+++ b/library/spi_engine/spi_engine_execution/spi_engine_execution.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v b/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v
index b5fd1faa2..b45e3ac74 100644
--- a/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v
+++ b/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/spi_engine/spi_engine_offload/spi_engine_offload.v b/library/spi_engine/spi_engine_offload/spi_engine_offload.v
index f9b336942..4411d4499 100644
--- a/library/spi_engine/spi_engine_offload/spi_engine_offload.v
+++ b/library/spi_engine/spi_engine_offload/spi_engine_offload.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_adcfifo/util_adcfifo.v b/library/util_adcfifo/util_adcfifo.v
index 96dc25940..4192d3cd5 100644
--- a/library/util_adcfifo/util_adcfifo.v
+++ b/library/util_adcfifo/util_adcfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_axis_fifo/address_gray.v b/library/util_axis_fifo/address_gray.v
index 8a4643c3c..58532dba1 100644
--- a/library/util_axis_fifo/address_gray.v
+++ b/library/util_axis_fifo/address_gray.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_axis_fifo/address_gray_pipelined.v b/library/util_axis_fifo/address_gray_pipelined.v
index a3d297f10..b8940f2ac 100644
--- a/library/util_axis_fifo/address_gray_pipelined.v
+++ b/library/util_axis_fifo/address_gray_pipelined.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_axis_fifo/address_sync.v b/library/util_axis_fifo/address_sync.v
index 992eecd33..f7312bac3 100644
--- a/library/util_axis_fifo/address_sync.v
+++ b/library/util_axis_fifo/address_sync.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_axis_fifo/util_axis_fifo.v b/library/util_axis_fifo/util_axis_fifo.v
index 77ab993db..76b9b59d4 100644
--- a/library/util_axis_fifo/util_axis_fifo.v
+++ b/library/util_axis_fifo/util_axis_fifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_axis_resize/util_axis_resize.v b/library/util_axis_resize/util_axis_resize.v
index dca788790..546c56221 100644
--- a/library/util_axis_resize/util_axis_resize.v
+++ b/library/util_axis_resize/util_axis_resize.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_bsplit/util_bsplit.v b/library/util_bsplit/util_bsplit.v
index a7995ac53..5446da9c2 100755
--- a/library/util_bsplit/util_bsplit.v
+++ b/library/util_bsplit/util_bsplit.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_ccat/util_ccat.v b/library/util_ccat/util_ccat.v
index 9fe1fabe5..6eacb6be8 100755
--- a/library/util_ccat/util_ccat.v
+++ b/library/util_ccat/util_ccat.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_cic/cic_comb.v b/library/util_cic/cic_comb.v
index b4de98eab..d49a500b5 100644
--- a/library/util_cic/cic_comb.v
+++ b/library/util_cic/cic_comb.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_cic/cic_int.v b/library/util_cic/cic_int.v
index 4ed1d2290..401306a25 100644
--- a/library/util_cic/cic_int.v
+++ b/library/util_cic/cic_int.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_clkdiv/util_clkdiv.v b/library/util_clkdiv/util_clkdiv.v
index 5fe1a6c45..4dacc8bb6 100644
--- a/library/util_clkdiv/util_clkdiv.v
+++ b/library/util_clkdiv/util_clkdiv.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_cpack/util_cpack.v b/library/util_cpack/util_cpack.v
index 430d1e440..4af11f672 100755
--- a/library/util_cpack/util_cpack.v
+++ b/library/util_cpack/util_cpack.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_cpack/util_cpack_dsf.v b/library/util_cpack/util_cpack_dsf.v
index b16f340a2..0b239dc4a 100755
--- a/library/util_cpack/util_cpack_dsf.v
+++ b/library/util_cpack/util_cpack_dsf.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_cpack/util_cpack_mux.v b/library/util_cpack/util_cpack_mux.v
index 8892552bc..667f45942 100755
--- a/library/util_cpack/util_cpack_mux.v
+++ b/library/util_cpack/util_cpack_mux.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_dacfifo/util_dacfifo.v b/library/util_dacfifo/util_dacfifo.v
index 916d7eb7e..715c23318 100644
--- a/library/util_dacfifo/util_dacfifo.v
+++ b/library/util_dacfifo/util_dacfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_extract/util_extract.v b/library/util_extract/util_extract.v
index eb8e81961..d68362f78 100644
--- a/library/util_extract/util_extract.v
+++ b/library/util_extract/util_extract.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_fir_dec/util_fir_dec.v b/library/util_fir_dec/util_fir_dec.v
index 594ae7a23..b2c9423ce 100644
--- a/library/util_fir_dec/util_fir_dec.v
+++ b/library/util_fir_dec/util_fir_dec.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_fir_int/util_fir_int.v b/library/util_fir_int/util_fir_int.v
index 88f7b235e..15a0a45d2 100644
--- a/library/util_fir_int/util_fir_int.v
+++ b/library/util_fir_int/util_fir_int.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_gmii_to_rgmii/mdc_mdio.v b/library/util_gmii_to_rgmii/mdc_mdio.v
index 2bb2d8147..2c8f2b0f0 100644
--- a/library/util_gmii_to_rgmii/mdc_mdio.v
+++ b/library/util_gmii_to_rgmii/mdc_mdio.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_gmii_to_rgmii/util_gmii_to_rgmii.v b/library/util_gmii_to_rgmii/util_gmii_to_rgmii.v
index 9863e91ca..bd389b1f2 100644
--- a/library/util_gmii_to_rgmii/util_gmii_to_rgmii.v
+++ b/library/util_gmii_to_rgmii/util_gmii_to_rgmii.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_i2c_mixer/util_i2c_mixer.vhd b/library/util_i2c_mixer/util_i2c_mixer.vhd
index 69c79684f..50f5078d5 100644
--- a/library/util_i2c_mixer/util_i2c_mixer.vhd
+++ b/library/util_i2c_mixer/util_i2c_mixer.vhd
@@ -2,7 +2,15 @@
 -- ***************************************************************************
 -- Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 --
--- This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+-- In this HDL repository, there are many different and unique modules, consisting
+-- of various HDL (Verilog or VHDL) components. The individual modules are
+-- developed independently, and may be accompanied by separate and unique license
+-- terms.
+--
+-- The user should read each of these license terms, and understand the
+-- freedoms and responsabilities that he or she has by using this source/core.
+--
+-- This core is distributed in the hope that it will be useful, but WITHOUT ANY
 -- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 -- A PARTICULAR PURPOSE.
 --
@@ -10,12 +18,14 @@
 -- of this file, are permitted under one of the following two license terms:
 --
 --   1. The GNU General Public License version 2 as published by the
---      Free Software Foundation, which can be found in the top level directory of
---      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+--      Free Software Foundation, which can be found in the top level directory
+--      of this repository (LICENSE_GPL2), and also online at:
+--      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 --
 -- OR
 --
---   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+--   2. An ADI specific BSD license, which can be found in the top level directory
+--      of this repository (LICENSE_ADIBSD), and also on-line at:
 --      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 --      This will allow to generate bit files and not release the source code,
 --      as long as it attaches to an ADI device.
diff --git a/library/util_mfifo/util_mfifo.v b/library/util_mfifo/util_mfifo.v
index 850cb9587..3fdc663a9 100644
--- a/library/util_mfifo/util_mfifo.v
+++ b/library/util_mfifo/util_mfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_pmod_adc/util_pmod_adc.v b/library/util_pmod_adc/util_pmod_adc.v
index 633afac7c..b023d35fc 100644
--- a/library/util_pmod_adc/util_pmod_adc.v
+++ b/library/util_pmod_adc/util_pmod_adc.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_pmod_fmeter/util_pmod_fmeter.v b/library/util_pmod_fmeter/util_pmod_fmeter.v
index 5f7ae3427..bed120db2 100644
--- a/library/util_pmod_fmeter/util_pmod_fmeter.v
+++ b/library/util_pmod_fmeter/util_pmod_fmeter.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_pmod_fmeter/util_pmod_fmeter_core.v b/library/util_pmod_fmeter/util_pmod_fmeter_core.v
index 74533fa61..22057f895 100644
--- a/library/util_pmod_fmeter/util_pmod_fmeter_core.v
+++ b/library/util_pmod_fmeter/util_pmod_fmeter_core.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_rfifo/util_rfifo.v b/library/util_rfifo/util_rfifo.v
index 322835f99..101cd0e7b 100644
--- a/library/util_rfifo/util_rfifo.v
+++ b/library/util_rfifo/util_rfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_sigma_delta_spi/util_sigma_delta_spi.v b/library/util_sigma_delta_spi/util_sigma_delta_spi.v
index 1e736cc44..0c74d8f87 100644
--- a/library/util_sigma_delta_spi/util_sigma_delta_spi.v
+++ b/library/util_sigma_delta_spi/util_sigma_delta_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_tdd_sync/util_tdd_sync.v b/library/util_tdd_sync/util_tdd_sync.v
index fad712954..ac1200343 100644
--- a/library/util_tdd_sync/util_tdd_sync.v
+++ b/library/util_tdd_sync/util_tdd_sync.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_upack/util_upack.v b/library/util_upack/util_upack.v
index 7a74f8bd0..28a130391 100755
--- a/library/util_upack/util_upack.v
+++ b/library/util_upack/util_upack.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_upack/util_upack_dmx.v b/library/util_upack/util_upack_dmx.v
index f3dcf3a65..a3ae0d7e8 100755
--- a/library/util_upack/util_upack_dmx.v
+++ b/library/util_upack/util_upack_dmx.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_upack/util_upack_dsf.v b/library/util_upack/util_upack_dsf.v
index 0c4cead13..b76630b5a 100755
--- a/library/util_upack/util_upack_dsf.v
+++ b/library/util_upack/util_upack_dsf.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_var_fifo/util_var_fifo.v b/library/util_var_fifo/util_var_fifo.v
index a73582ff1..e0ee18528 100644
--- a/library/util_var_fifo/util_var_fifo.v
+++ b/library/util_var_fifo/util_var_fifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/util_wfifo/util_wfifo.v b/library/util_wfifo/util_wfifo.v
index 92fbeba04..ff5657736 100644
--- a/library/util_wfifo/util_wfifo.v
+++ b/library/util_wfifo/util_wfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adcfifo/axi_adcfifo.v b/library/xilinx/axi_adcfifo/axi_adcfifo.v
index 12e4ba634..b2780ac3d 100644
--- a/library/xilinx/axi_adcfifo/axi_adcfifo.v
+++ b/library/xilinx/axi_adcfifo/axi_adcfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adcfifo/axi_adcfifo_adc.v b/library/xilinx/axi_adcfifo/axi_adcfifo_adc.v
index 4ee6805cd..90dc6c8d6 100644
--- a/library/xilinx/axi_adcfifo/axi_adcfifo_adc.v
+++ b/library/xilinx/axi_adcfifo/axi_adcfifo_adc.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adcfifo/axi_adcfifo_dma.v b/library/xilinx/axi_adcfifo/axi_adcfifo_dma.v
index da24b5fb4..ea07f1bbb 100644
--- a/library/xilinx/axi_adcfifo/axi_adcfifo_dma.v
+++ b/library/xilinx/axi_adcfifo/axi_adcfifo_dma.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adcfifo/axi_adcfifo_rd.v b/library/xilinx/axi_adcfifo/axi_adcfifo_rd.v
index 85fab769c..8b7e2a6f7 100644
--- a/library/xilinx/axi_adcfifo/axi_adcfifo_rd.v
+++ b/library/xilinx/axi_adcfifo/axi_adcfifo_rd.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adcfifo/axi_adcfifo_wr.v b/library/xilinx/axi_adcfifo/axi_adcfifo_wr.v
index 29d647a79..0ff5c13e3 100644
--- a/library/xilinx/axi_adcfifo/axi_adcfifo_wr.v
+++ b/library/xilinx/axi_adcfifo/axi_adcfifo_wr.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adxcvr/axi_adxcvr.v b/library/xilinx/axi_adxcvr/axi_adxcvr.v
index d696abaf8..d320d5153 100644
--- a/library/xilinx/axi_adxcvr/axi_adxcvr.v
+++ b/library/xilinx/axi_adxcvr/axi_adxcvr.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adxcvr/axi_adxcvr_es.v b/library/xilinx/axi_adxcvr/axi_adxcvr_es.v
index e7cf31f25..4fa474955 100644
--- a/library/xilinx/axi_adxcvr/axi_adxcvr_es.v
+++ b/library/xilinx/axi_adxcvr/axi_adxcvr_es.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adxcvr/axi_adxcvr_mdrp.v b/library/xilinx/axi_adxcvr/axi_adxcvr_mdrp.v
index 748580da6..583fd6729 100644
--- a/library/xilinx/axi_adxcvr/axi_adxcvr_mdrp.v
+++ b/library/xilinx/axi_adxcvr/axi_adxcvr_mdrp.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adxcvr/axi_adxcvr_mstatus.v b/library/xilinx/axi_adxcvr/axi_adxcvr_mstatus.v
index f58562d77..b388cbc2d 100644
--- a/library/xilinx/axi_adxcvr/axi_adxcvr_mstatus.v
+++ b/library/xilinx/axi_adxcvr/axi_adxcvr_mstatus.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_adxcvr/axi_adxcvr_up.v b/library/xilinx/axi_adxcvr/axi_adxcvr_up.v
index e2d05e43b..47313a129 100644
--- a/library/xilinx/axi_adxcvr/axi_adxcvr_up.v
+++ b/library/xilinx/axi_adxcvr/axi_adxcvr_up.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_dacfifo/axi_dacfifo.v b/library/xilinx/axi_dacfifo/axi_dacfifo.v
index 1850c50d7..10cc9a8c0 100644
--- a/library/xilinx/axi_dacfifo/axi_dacfifo.v
+++ b/library/xilinx/axi_dacfifo/axi_dacfifo.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_dacfifo/axi_dacfifo_dac.v b/library/xilinx/axi_dacfifo/axi_dacfifo_dac.v
index 721363a3b..cab7b4441 100644
--- a/library/xilinx/axi_dacfifo/axi_dacfifo_dac.v
+++ b/library/xilinx/axi_dacfifo/axi_dacfifo_dac.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_dacfifo/axi_dacfifo_rd.v b/library/xilinx/axi_dacfifo/axi_dacfifo_rd.v
index 7b6b07717..47d9ebd9f 100644
--- a/library/xilinx/axi_dacfifo/axi_dacfifo_rd.v
+++ b/library/xilinx/axi_dacfifo/axi_dacfifo_rd.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_dacfifo/axi_dacfifo_wr.v b/library/xilinx/axi_dacfifo/axi_dacfifo_wr.v
index 03f529964..eca39b5f6 100644
--- a/library/xilinx/axi_dacfifo/axi_dacfifo_wr.v
+++ b/library/xilinx/axi_dacfifo/axi_dacfifo_wr.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_xcvrlb/axi_xcvrlb.v b/library/xilinx/axi_xcvrlb/axi_xcvrlb.v
index 7b5559f79..15f9412e0 100644
--- a/library/xilinx/axi_xcvrlb/axi_xcvrlb.v
+++ b/library/xilinx/axi_xcvrlb/axi_xcvrlb.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/axi_xcvrlb/axi_xcvrlb_1.v b/library/xilinx/axi_xcvrlb/axi_xcvrlb_1.v
index 377955ae4..ca5a1649b 100644
--- a/library/xilinx/axi_xcvrlb/axi_xcvrlb_1.v
+++ b/library/xilinx/axi_xcvrlb/axi_xcvrlb_1.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_cmos_clk.v b/library/xilinx/common/ad_cmos_clk.v
index 14771645b..622b58481 100644
--- a/library/xilinx/common/ad_cmos_clk.v
+++ b/library/xilinx/common/ad_cmos_clk.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_cmos_in.v b/library/xilinx/common/ad_cmos_in.v
index f789c7d35..e84c7e69d 100644
--- a/library/xilinx/common/ad_cmos_in.v
+++ b/library/xilinx/common/ad_cmos_in.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_cmos_out.v b/library/xilinx/common/ad_cmos_out.v
index 4794234e4..21142c689 100644
--- a/library/xilinx/common/ad_cmos_out.v
+++ b/library/xilinx/common/ad_cmos_out.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_iobuf.v b/library/xilinx/common/ad_iobuf.v
index 00b5f170a..e03d10a5d 100644
--- a/library/xilinx/common/ad_iobuf.v
+++ b/library/xilinx/common/ad_iobuf.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_lvds_clk.v b/library/xilinx/common/ad_lvds_clk.v
index da4051dca..d80a6a8d0 100644
--- a/library/xilinx/common/ad_lvds_clk.v
+++ b/library/xilinx/common/ad_lvds_clk.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_lvds_in.v b/library/xilinx/common/ad_lvds_in.v
index 36974ef46..3542f1857 100644
--- a/library/xilinx/common/ad_lvds_in.v
+++ b/library/xilinx/common/ad_lvds_in.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_lvds_out.v b/library/xilinx/common/ad_lvds_out.v
index 7f81a04ca..32fb79845 100644
--- a/library/xilinx/common/ad_lvds_out.v
+++ b/library/xilinx/common/ad_lvds_out.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_mmcm_drp.v b/library/xilinx/common/ad_mmcm_drp.v
index 0d51efbae..a08e0b5cb 100644
--- a/library/xilinx/common/ad_mmcm_drp.v
+++ b/library/xilinx/common/ad_mmcm_drp.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_mul.v b/library/xilinx/common/ad_mul.v
index 1cf8b374c..839218e94 100644
--- a/library/xilinx/common/ad_mul.v
+++ b/library/xilinx/common/ad_mul.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_serdes_clk.v b/library/xilinx/common/ad_serdes_clk.v
index bf4a6fdb7..9d8675b84 100644
--- a/library/xilinx/common/ad_serdes_clk.v
+++ b/library/xilinx/common/ad_serdes_clk.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_serdes_in.v b/library/xilinx/common/ad_serdes_in.v
index 8d3fe8ed9..4cbd35dfb 100644
--- a/library/xilinx/common/ad_serdes_in.v
+++ b/library/xilinx/common/ad_serdes_in.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/common/ad_serdes_out.v b/library/xilinx/common/ad_serdes_out.v
index e22a6b706..a577a0f94 100644
--- a/library/xilinx/common/ad_serdes_out.v
+++ b/library/xilinx/common/ad_serdes_out.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/util_adxcvr/util_adxcvr.v b/library/xilinx/util_adxcvr/util_adxcvr.v
index df90dfb0b..1bd6af07b 100644
--- a/library/xilinx/util_adxcvr/util_adxcvr.v
+++ b/library/xilinx/util_adxcvr/util_adxcvr.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/util_adxcvr/util_adxcvr_xch.v b/library/xilinx/util_adxcvr/util_adxcvr_xch.v
index b9795d2d1..88ae8ae8b 100644
--- a/library/xilinx/util_adxcvr/util_adxcvr_xch.v
+++ b/library/xilinx/util_adxcvr/util_adxcvr_xch.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/library/xilinx/util_adxcvr/util_adxcvr_xcm.v b/library/xilinx/util_adxcvr/util_adxcvr_xcm.v
index 877e5df0b..59a964f9d 100644
--- a/library/xilinx/util_adxcvr/util_adxcvr_xcm.v
+++ b/library/xilinx/util_adxcvr/util_adxcvr_xcm.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad5766_sdz/zed/system_top.v b/projects/ad5766_sdz/zed/system_top.v
index 52c673cdf..e2d7cddf7 100644
--- a/projects/ad5766_sdz/zed/system_top.v
+++ b/projects/ad5766_sdz/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad6676evb/vc707/system_top.v b/projects/ad6676evb/vc707/system_top.v
index 066bf5111..9ab125697 100644
--- a/projects/ad6676evb/vc707/system_top.v
+++ b/projects/ad6676evb/vc707/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad6676evb/zc706/system_top.v b/projects/ad6676evb/zc706/system_top.v
index 2ce43b8cb..1a7139929 100644
--- a/projects/ad6676evb/zc706/system_top.v
+++ b/projects/ad6676evb/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad7616_sdz/zc706/system_top_pi.v b/projects/ad7616_sdz/zc706/system_top_pi.v
index 004ace2eb..a44785d5f 100644
--- a/projects/ad7616_sdz/zc706/system_top_pi.v
+++ b/projects/ad7616_sdz/zc706/system_top_pi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad7616_sdz/zc706/system_top_si.v b/projects/ad7616_sdz/zc706/system_top_si.v
index 8abdc758a..7c5cafe46 100644
--- a/projects/ad7616_sdz/zc706/system_top_si.v
+++ b/projects/ad7616_sdz/zc706/system_top_si.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad7616_sdz/zed/system_top_pi.v b/projects/ad7616_sdz/zed/system_top_pi.v
index 856e5123d..090e1c23a 100644
--- a/projects/ad7616_sdz/zed/system_top_pi.v
+++ b/projects/ad7616_sdz/zed/system_top_pi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad7616_sdz/zed/system_top_si.v b/projects/ad7616_sdz/zed/system_top_si.v
index b7a39150d..c35c0300c 100644
--- a/projects/ad7616_sdz/zed/system_top_si.v
+++ b/projects/ad7616_sdz/zed/system_top_si.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad77681evb/zed/system_top.v b/projects/ad77681evb/zed/system_top.v
index 8cf657871..1246b94c3 100644
--- a/projects/ad77681evb/zed/system_top.v
+++ b/projects/ad77681evb/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad7768evb/common/ad7768_if.v b/projects/ad7768evb/common/ad7768_if.v
index 940f7d350..1aa27f36a 100644
--- a/projects/ad7768evb/common/ad7768_if.v
+++ b/projects/ad7768evb/common/ad7768_if.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad7768evb/zed/system_top.v b/projects/ad7768evb/zed/system_top.v
index 2dba20269..243b4920b 100644
--- a/projects/ad7768evb/zed/system_top.v
+++ b/projects/ad7768evb/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9265_fmc/common/ad9265_spi.v b/projects/ad9265_fmc/common/ad9265_spi.v
index b3305e809..65a7e7440 100644
--- a/projects/ad9265_fmc/common/ad9265_spi.v
+++ b/projects/ad9265_fmc/common/ad9265_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9265_fmc/zc706/system_top.v b/projects/ad9265_fmc/zc706/system_top.v
index 40d4f4cc2..5224ceffb 100644
--- a/projects/ad9265_fmc/zc706/system_top.v
+++ b/projects/ad9265_fmc/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9434_fmc/common/ad9434_spi.v b/projects/ad9434_fmc/common/ad9434_spi.v
index 699f349a6..f86c1a1c0 100644
--- a/projects/ad9434_fmc/common/ad9434_spi.v
+++ b/projects/ad9434_fmc/common/ad9434_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9434_fmc/zc706/system_top.v b/projects/ad9434_fmc/zc706/system_top.v
index 1395d6edf..3b87e715c 100644
--- a/projects/ad9434_fmc/zc706/system_top.v
+++ b/projects/ad9434_fmc/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9467_fmc/common/ad9467_spi.v b/projects/ad9467_fmc/common/ad9467_spi.v
index 1d7eecc1a..30fe544a5 100644
--- a/projects/ad9467_fmc/common/ad9467_spi.v
+++ b/projects/ad9467_fmc/common/ad9467_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9467_fmc/kc705/system_top.v b/projects/ad9467_fmc/kc705/system_top.v
index 372ac2381..ae7a068d6 100644
--- a/projects/ad9467_fmc/kc705/system_top.v
+++ b/projects/ad9467_fmc/kc705/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9467_fmc/zed/system_top.v b/projects/ad9467_fmc/zed/system_top.v
index fd144b29a..6780dde6e 100644
--- a/projects/ad9467_fmc/zed/system_top.v
+++ b/projects/ad9467_fmc/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/ad9739a_fmc/zc706/system_top.v b/projects/ad9739a_fmc/zc706/system_top.v
index 64ac7f608..46e6c2f46 100644
--- a/projects/ad9739a_fmc/zc706/system_top.v
+++ b/projects/ad9739a_fmc/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adaq7980_sdz/zed/system_top.v b/projects/adaq7980_sdz/zed/system_top.v
index ec794da19..abdd96d41 100644
--- a/projects/adaq7980_sdz/zed/system_top.v
+++ b/projects/adaq7980_sdz/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9361z7035/ccbob_cmos/system_top.v b/projects/adrv9361z7035/ccbob_cmos/system_top.v
index f1f2a5bb5..a6d33035b 100644
--- a/projects/adrv9361z7035/ccbob_cmos/system_top.v
+++ b/projects/adrv9361z7035/ccbob_cmos/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9361z7035/ccbob_lvds/system_top.v b/projects/adrv9361z7035/ccbob_lvds/system_top.v
index d07561d8a..99abbfe60 100644
--- a/projects/adrv9361z7035/ccbob_lvds/system_top.v
+++ b/projects/adrv9361z7035/ccbob_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9361z7035/ccbox_lvds/system_top.v b/projects/adrv9361z7035/ccbox_lvds/system_top.v
index 21f707cbd..2f8f383eb 100644
--- a/projects/adrv9361z7035/ccbox_lvds/system_top.v
+++ b/projects/adrv9361z7035/ccbox_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9361z7035/ccfmc_lvds/system_top.v b/projects/adrv9361z7035/ccfmc_lvds/system_top.v
index 5f8cc3c76..9d9ebd381 100644
--- a/projects/adrv9361z7035/ccfmc_lvds/system_top.v
+++ b/projects/adrv9361z7035/ccfmc_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9361z7035/ccpci_lvds/system_top.v b/projects/adrv9361z7035/ccpci_lvds/system_top.v
index 6d5efffa7..761793aba 100644
--- a/projects/adrv9361z7035/ccpci_lvds/system_top.v
+++ b/projects/adrv9361z7035/ccpci_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9361z7035/ccusb_lvds/system_top.v b/projects/adrv9361z7035/ccusb_lvds/system_top.v
index 6cd220b7a..2acf584a6 100644
--- a/projects/adrv9361z7035/ccusb_lvds/system_top.v
+++ b/projects/adrv9361z7035/ccusb_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9364z7020/ccbob_cmos/system_top.v b/projects/adrv9364z7020/ccbob_cmos/system_top.v
index eea0b32bd..b11f3508d 100644
--- a/projects/adrv9364z7020/ccbob_cmos/system_top.v
+++ b/projects/adrv9364z7020/ccbob_cmos/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9364z7020/ccbob_lvds/system_top.v b/projects/adrv9364z7020/ccbob_lvds/system_top.v
index 9c25f910a..eaf57ea55 100644
--- a/projects/adrv9364z7020/ccbob_lvds/system_top.v
+++ b/projects/adrv9364z7020/ccbob_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9364z7020/ccbox_lvds/system_top.v b/projects/adrv9364z7020/ccbox_lvds/system_top.v
index ff63ba4ae..3464f8d8d 100644
--- a/projects/adrv9364z7020/ccbox_lvds/system_top.v
+++ b/projects/adrv9364z7020/ccbox_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9364z7020/ccusb_lvds/system_top.v b/projects/adrv9364z7020/ccusb_lvds/system_top.v
index 6cd220b7a..2acf584a6 100644
--- a/projects/adrv9364z7020/ccusb_lvds/system_top.v
+++ b/projects/adrv9364z7020/ccusb_lvds/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9371x/a10gx/system_top.v b/projects/adrv9371x/a10gx/system_top.v
index 3f27fe1e2..16073e7bc 100644
--- a/projects/adrv9371x/a10gx/system_top.v
+++ b/projects/adrv9371x/a10gx/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9371x/a10soc/system_top.v b/projects/adrv9371x/a10soc/system_top.v
index 968d84606..f4ba46649 100644
--- a/projects/adrv9371x/a10soc/system_top.v
+++ b/projects/adrv9371x/a10soc/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adrv9371x/zc706/system_top.v b/projects/adrv9371x/zc706/system_top.v
index f0771ee89..4ed794e2b 100644
--- a/projects/adrv9371x/zc706/system_top.v
+++ b/projects/adrv9371x/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/ac701/system_top.v b/projects/adv7511/ac701/system_top.v
index d8db73138..0fb4f26b3 100644
--- a/projects/adv7511/ac701/system_top.v
+++ b/projects/adv7511/ac701/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/kc705/system_top.v b/projects/adv7511/kc705/system_top.v
index 9e61fdc99..b02cda278 100644
--- a/projects/adv7511/kc705/system_top.v
+++ b/projects/adv7511/kc705/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/kcu105/system_top.v b/projects/adv7511/kcu105/system_top.v
index 95ca3d4d8..293a0bd0d 100644
--- a/projects/adv7511/kcu105/system_top.v
+++ b/projects/adv7511/kcu105/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/mitx045/system_top.v b/projects/adv7511/mitx045/system_top.v
index eec488208..9f00deaee 100644
--- a/projects/adv7511/mitx045/system_top.v
+++ b/projects/adv7511/mitx045/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/vc707/system_top.v b/projects/adv7511/vc707/system_top.v
index 6800931ec..ff7631bc2 100644
--- a/projects/adv7511/vc707/system_top.v
+++ b/projects/adv7511/vc707/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/zc702/system_top.v b/projects/adv7511/zc702/system_top.v
index d6f078227..1748e75a6 100644
--- a/projects/adv7511/zc702/system_top.v
+++ b/projects/adv7511/zc702/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/zc706/system_top.v b/projects/adv7511/zc706/system_top.v
index 46b1d993e..56d626010 100644
--- a/projects/adv7511/zc706/system_top.v
+++ b/projects/adv7511/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/adv7511/zed/system_top.v b/projects/adv7511/zed/system_top.v
index 642b4e38b..9a149352b 100644
--- a/projects/adv7511/zed/system_top.v
+++ b/projects/adv7511/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/arradio/c5soc/system_top.v b/projects/arradio/c5soc/system_top.v
index 05deeaab4..0cae0f88d 100644
--- a/projects/arradio/c5soc/system_top.v
+++ b/projects/arradio/c5soc/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/cftl_cip/zed/system_top.v b/projects/cftl_cip/zed/system_top.v
index 256fb5d8d..d7d6bee64 100644
--- a/projects/cftl_cip/zed/system_top.v
+++ b/projects/cftl_cip/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/cftl_std/zed/system_top.v b/projects/cftl_std/zed/system_top.v
index 8ddb82db6..d3e4ec81c 100644
--- a/projects/cftl_std/zed/system_top.v
+++ b/projects/cftl_std/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/cn0363/microzed/system_top.v b/projects/cn0363/microzed/system_top.v
index d3249717c..85a7f2c00 100644
--- a/projects/cn0363/microzed/system_top.v
+++ b/projects/cn0363/microzed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/cn0363/zed/system_top.v b/projects/cn0363/zed/system_top.v
index cb2dd27c7..7c748ca73 100644
--- a/projects/cn0363/zed/system_top.v
+++ b/projects/cn0363/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/common/a5gte/system_top.v b/projects/common/a5gte/system_top.v
index a7dbba108..4e42e423b 100644
--- a/projects/common/a5gte/system_top.v
+++ b/projects/common/a5gte/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq1/common/daq1_spi.v b/projects/daq1/common/daq1_spi.v
index 21bfe8182..b1719a0f1 100644
--- a/projects/daq1/common/daq1_spi.v
+++ b/projects/daq1/common/daq1_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq1/cpld/daq1_cpld.v b/projects/daq1/cpld/daq1_cpld.v
index fa30761a5..317e0d1cc 100644
--- a/projects/daq1/cpld/daq1_cpld.v
+++ b/projects/daq1/cpld/daq1_cpld.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq1/zc706/system_top.v b/projects/daq1/zc706/system_top.v
index 1aed8e512..d37507f68 100644
--- a/projects/daq1/zc706/system_top.v
+++ b/projects/daq1/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq2/a10gx/system_top.v b/projects/daq2/a10gx/system_top.v
index 69872f0f4..50ff8b759 100644
--- a/projects/daq2/a10gx/system_top.v
+++ b/projects/daq2/a10gx/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq2/common/daq2_spi.v b/projects/daq2/common/daq2_spi.v
index ac0ea768c..67657d81f 100644
--- a/projects/daq2/common/daq2_spi.v
+++ b/projects/daq2/common/daq2_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq2/kc705/system_top.v b/projects/daq2/kc705/system_top.v
index e8d4b33d8..c64707943 100644
--- a/projects/daq2/kc705/system_top.v
+++ b/projects/daq2/kc705/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq2/kcu105/system_top.v b/projects/daq2/kcu105/system_top.v
index d0ed4116d..92b2d4f00 100644
--- a/projects/daq2/kcu105/system_top.v
+++ b/projects/daq2/kcu105/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq2/vc707/system_top.v b/projects/daq2/vc707/system_top.v
index 09145b99a..cc866c016 100644
--- a/projects/daq2/vc707/system_top.v
+++ b/projects/daq2/vc707/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq2/zc706/system_top.v b/projects/daq2/zc706/system_top.v
index 2ba61a4de..72d42fd8d 100644
--- a/projects/daq2/zc706/system_top.v
+++ b/projects/daq2/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq2/zcu102/system_top.v b/projects/daq2/zcu102/system_top.v
index 15da90e0d..96f5b155a 100644
--- a/projects/daq2/zcu102/system_top.v
+++ b/projects/daq2/zcu102/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq3/a10gx/system_top.v b/projects/daq3/a10gx/system_top.v
index c574e061a..a88100ec2 100644
--- a/projects/daq3/a10gx/system_top.v
+++ b/projects/daq3/a10gx/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq3/common/daq3_spi.v b/projects/daq3/common/daq3_spi.v
index 7896445ed..65ba3b058 100644
--- a/projects/daq3/common/daq3_spi.v
+++ b/projects/daq3/common/daq3_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq3/kcu105/system_top.v b/projects/daq3/kcu105/system_top.v
index c5944c6be..ec9014fba 100644
--- a/projects/daq3/kcu105/system_top.v
+++ b/projects/daq3/kcu105/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/daq3/zc706/system_top.v b/projects/daq3/zc706/system_top.v
index d2eb635e5..3dc9a4e17 100644
--- a/projects/daq3/zc706/system_top.v
+++ b/projects/daq3/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcadc2/common/fmcadc2_spi.v b/projects/fmcadc2/common/fmcadc2_spi.v
index 3add229eb..d5e40deb0 100644
--- a/projects/fmcadc2/common/fmcadc2_spi.v
+++ b/projects/fmcadc2/common/fmcadc2_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcadc2/vc707/system_top.v b/projects/fmcadc2/vc707/system_top.v
index 5c7b1a004..8b71b521e 100644
--- a/projects/fmcadc2/vc707/system_top.v
+++ b/projects/fmcadc2/vc707/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcadc2/zc706/system_top.v b/projects/fmcadc2/zc706/system_top.v
index 9c6759747..36a1541f2 100644
--- a/projects/fmcadc2/zc706/system_top.v
+++ b/projects/fmcadc2/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcadc4/common/fmcadc4_spi.v b/projects/fmcadc4/common/fmcadc4_spi.v
index a29840e43..a7357dfc3 100644
--- a/projects/fmcadc4/common/fmcadc4_spi.v
+++ b/projects/fmcadc4/common/fmcadc4_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcadc4/zc706/system_top.v b/projects/fmcadc4/zc706/system_top.v
index 64ff6f5c9..9b3da8959 100644
--- a/projects/fmcadc4/zc706/system_top.v
+++ b/projects/fmcadc4/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcadc5/common/fmcadc5_spi.v b/projects/fmcadc5/common/fmcadc5_spi.v
index 68fef0d59..fa535fb16 100644
--- a/projects/fmcadc5/common/fmcadc5_spi.v
+++ b/projects/fmcadc5/common/fmcadc5_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcadc5/vc707/system_top.v b/projects/fmcadc5/vc707/system_top.v
index a072f7d94..005e56570 100644
--- a/projects/fmcadc5/vc707/system_top.v
+++ b/projects/fmcadc5/vc707/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcjesdadc1/a5gt/system_top.v b/projects/fmcjesdadc1/a5gt/system_top.v
index 7e127aa13..0cf556a11 100644
--- a/projects/fmcjesdadc1/a5gt/system_top.v
+++ b/projects/fmcjesdadc1/a5gt/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcjesdadc1/a5soc/system_top.v b/projects/fmcjesdadc1/a5soc/system_top.v
index e93760655..5aafb9a8e 100644
--- a/projects/fmcjesdadc1/a5soc/system_top.v
+++ b/projects/fmcjesdadc1/a5soc/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcjesdadc1/common/fmcjesdadc1_spi.v b/projects/fmcjesdadc1/common/fmcjesdadc1_spi.v
index 2bec73dfd..7b016818a 100644
--- a/projects/fmcjesdadc1/common/fmcjesdadc1_spi.v
+++ b/projects/fmcjesdadc1/common/fmcjesdadc1_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcjesdadc1/kc705/system_top.v b/projects/fmcjesdadc1/kc705/system_top.v
index 4db077fff..85579e26d 100644
--- a/projects/fmcjesdadc1/kc705/system_top.v
+++ b/projects/fmcjesdadc1/kc705/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcjesdadc1/vc707/system_top.v b/projects/fmcjesdadc1/vc707/system_top.v
index a314ae725..dc72d9c2e 100644
--- a/projects/fmcjesdadc1/vc707/system_top.v
+++ b/projects/fmcjesdadc1/vc707/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcjesdadc1/zc706/system_top.v b/projects/fmcjesdadc1/zc706/system_top.v
index 17ff2c73f..daa2cd880 100644
--- a/projects/fmcjesdadc1/zc706/system_top.v
+++ b/projects/fmcjesdadc1/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms11/common/fmcomms11_spi.v b/projects/fmcomms11/common/fmcomms11_spi.v
index b827f8f4d..9763c7be4 100644
--- a/projects/fmcomms11/common/fmcomms11_spi.v
+++ b/projects/fmcomms11/common/fmcomms11_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms11/zc706/system_top.v b/projects/fmcomms11/zc706/system_top.v
index b17c80e44..5efe04440 100644
--- a/projects/fmcomms11/zc706/system_top.v
+++ b/projects/fmcomms11/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/ac701/system_top.v b/projects/fmcomms2/ac701/system_top.v
index 21a1cfeb2..df20f4bc7 100644
--- a/projects/fmcomms2/ac701/system_top.v
+++ b/projects/fmcomms2/ac701/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/common/prcfg.v b/projects/fmcomms2/common/prcfg.v
index e61403cdc..aa6f669f4 100644
--- a/projects/fmcomms2/common/prcfg.v
+++ b/projects/fmcomms2/common/prcfg.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/common/prcfg_bb.v b/projects/fmcomms2/common/prcfg_bb.v
index d49d8aecd..69ea41df9 100644
--- a/projects/fmcomms2/common/prcfg_bb.v
+++ b/projects/fmcomms2/common/prcfg_bb.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/kc705/system_top.v b/projects/fmcomms2/kc705/system_top.v
index ea9cc806b..271588cb0 100644
--- a/projects/fmcomms2/kc705/system_top.v
+++ b/projects/fmcomms2/kc705/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/mitx045/system_top.v b/projects/fmcomms2/mitx045/system_top.v
index b0a0f24d7..62c10d547 100644
--- a/projects/fmcomms2/mitx045/system_top.v
+++ b/projects/fmcomms2/mitx045/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/vc707/system_top.v b/projects/fmcomms2/vc707/system_top.v
index cdd3b767c..223352136 100644
--- a/projects/fmcomms2/vc707/system_top.v
+++ b/projects/fmcomms2/vc707/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/zc702/system_top.v b/projects/fmcomms2/zc702/system_top.v
index 8511c7dfd..73e50a8ac 100644
--- a/projects/fmcomms2/zc702/system_top.v
+++ b/projects/fmcomms2/zc702/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/zc706/system_top.v b/projects/fmcomms2/zc706/system_top.v
index 6608b6635..89822d5d7 100644
--- a/projects/fmcomms2/zc706/system_top.v
+++ b/projects/fmcomms2/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/zc706pr/system_top.v b/projects/fmcomms2/zc706pr/system_top.v
index cc894feaf..74c9424e7 100644
--- a/projects/fmcomms2/zc706pr/system_top.v
+++ b/projects/fmcomms2/zc706pr/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/zcu102/system_top.v b/projects/fmcomms2/zcu102/system_top.v
index b01117509..03f30f7d8 100644
--- a/projects/fmcomms2/zcu102/system_top.v
+++ b/projects/fmcomms2/zcu102/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms2/zed/system_top.v b/projects/fmcomms2/zed/system_top.v
index 719ca689c..29e20ddb8 100644
--- a/projects/fmcomms2/zed/system_top.v
+++ b/projects/fmcomms2/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms5/zc702/system_top.v b/projects/fmcomms5/zc702/system_top.v
index e32457a82..c73c62563 100644
--- a/projects/fmcomms5/zc702/system_top.v
+++ b/projects/fmcomms5/zc702/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms5/zc706/system_top.v b/projects/fmcomms5/zc706/system_top.v
index 6db84ea4a..eebfc282b 100644
--- a/projects/fmcomms5/zc706/system_top.v
+++ b/projects/fmcomms5/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms5/zcu102/system_top.v b/projects/fmcomms5/zcu102/system_top.v
index 4b089697c..16cbda018 100644
--- a/projects/fmcomms5/zcu102/system_top.v
+++ b/projects/fmcomms5/zcu102/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms7/common/fmcomms7_spi.v b/projects/fmcomms7/common/fmcomms7_spi.v
index 9ec496bd8..f739912e8 100644
--- a/projects/fmcomms7/common/fmcomms7_spi.v
+++ b/projects/fmcomms7/common/fmcomms7_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/fmcomms7/zc706/system_top.v b/projects/fmcomms7/zc706/system_top.v
index 587a3352a..a580f4d50 100644
--- a/projects/fmcomms7/zc706/system_top.v
+++ b/projects/fmcomms7/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/imageon/zc706/system_top.v b/projects/imageon/zc706/system_top.v
index f93d02f62..150a8944a 100644
--- a/projects/imageon/zc706/system_top.v
+++ b/projects/imageon/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/imageon/zed/system_top.v b/projects/imageon/zed/system_top.v
index d09c2d10a..7792bba5c 100644
--- a/projects/imageon/zed/system_top.v
+++ b/projects/imageon/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/m2k/common/m2k_spi.v b/projects/m2k/common/m2k_spi.v
index 7e6ec6463..e636dc80f 100644
--- a/projects/m2k/common/m2k_spi.v
+++ b/projects/m2k/common/m2k_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/m2k/standalone/system_top.v b/projects/m2k/standalone/system_top.v
index c105441c4..e99842a80 100644
--- a/projects/m2k/standalone/system_top.v
+++ b/projects/m2k/standalone/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/m2k/zed/system_top.v b/projects/m2k/zed/system_top.v
index 9c075e9c7..73a99e9b0 100644
--- a/projects/m2k/zed/system_top.v
+++ b/projects/m2k/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/motcon2_fmc/zed/system_top.v b/projects/motcon2_fmc/zed/system_top.v
index a8fb8ef03..962475fc4 100644
--- a/projects/motcon2_fmc/zed/system_top.v
+++ b/projects/motcon2_fmc/zed/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/pluto/system_top.v b/projects/pluto/system_top.v
index af8285ffb..aef9ea190 100644
--- a/projects/pluto/system_top.v
+++ b/projects/pluto/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/usb_fx3/zc706/system_top.v b/projects/usb_fx3/zc706/system_top.v
index 53779c9db..4e0402529 100644
--- a/projects/usb_fx3/zc706/system_top.v
+++ b/projects/usb_fx3/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/usdrx1/a5gt/system_top.v b/projects/usdrx1/a5gt/system_top.v
index ece143632..cd6a90812 100644
--- a/projects/usdrx1/a5gt/system_top.v
+++ b/projects/usdrx1/a5gt/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/usdrx1/common/usdrx1_spi.v b/projects/usdrx1/common/usdrx1_spi.v
index f23da66e5..08b309aba 100644
--- a/projects/usdrx1/common/usdrx1_spi.v
+++ b/projects/usdrx1/common/usdrx1_spi.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/usdrx1/cpld/usdrx1_cpld.v b/projects/usdrx1/cpld/usdrx1_cpld.v
index cee3b24ef..55bfd0be8 100644
--- a/projects/usdrx1/cpld/usdrx1_cpld.v
+++ b/projects/usdrx1/cpld/usdrx1_cpld.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/usdrx1/zc706/system_top.v b/projects/usdrx1/zc706/system_top.v
index c56cd5f03..53ca939a3 100644
--- a/projects/usdrx1/zc706/system_top.v
+++ b/projects/usdrx1/zc706/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.
diff --git a/projects/usrpe31x/system_top.v b/projects/usrpe31x/system_top.v
index 32a90ef3e..7c3b9aee7 100644
--- a/projects/usrpe31x/system_top.v
+++ b/projects/usrpe31x/system_top.v
@@ -2,7 +2,15 @@
 // ***************************************************************************
 // Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
 //
-// This core  is distributed in the hope that it will be useful, but WITHOUT ANY
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsabilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
 // WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
 // A PARTICULAR PURPOSE.
 //
@@ -10,12 +18,14 @@
 // of this file, are permitted under one of the following two license terms:
 //
 //   1. The GNU General Public License version 2 as published by the
-//      Free Software Foundation, which can be found in the top level directory of
-//      the repository (LICENSE_GPL2), and at: <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
 //
 // OR
 //
-//   2. An ADI specific BSD license as noted in the top level directory, or on-line at:
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
 //      https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
 //      This will allow to generate bit files and not release the source code,
 //      as long as it attaches to an ADI device.